1/* SPDX-License-Identifier: GPL-2.0
2 *
3 * Copyright 2016-2018 HabanaLabs, Ltd.
4 * All Rights Reserved.
5 *
6 */
7
8/************************************
9 ** This is an auto-generated file **
10 **       DO NOT EDIT BELOW        **
11 ************************************/
12
13#ifndef ASIC_REG_PSOC_ETR_REGS_H_
14#define ASIC_REG_PSOC_ETR_REGS_H_
15
16/*
17 *****************************************
18 *   PSOC_ETR (Prototype: ETR)
19 *****************************************
20 */
21
22#define mmPSOC_ETR_RSZ                                               0x2C43004
23
24#define mmPSOC_ETR_STS                                               0x2C4300C
25
26#define mmPSOC_ETR_RRD                                               0x2C43010
27
28#define mmPSOC_ETR_RRP                                               0x2C43014
29
30#define mmPSOC_ETR_RWP                                               0x2C43018
31
32#define mmPSOC_ETR_TRG                                               0x2C4301C
33
34#define mmPSOC_ETR_CTL                                               0x2C43020
35
36#define mmPSOC_ETR_RWD                                               0x2C43024
37
38#define mmPSOC_ETR_MODE                                              0x2C43028
39
40#define mmPSOC_ETR_LBUFLEVEL                                         0x2C4302C
41
42#define mmPSOC_ETR_CBUFLEVEL                                         0x2C43030
43
44#define mmPSOC_ETR_BUFWM                                             0x2C43034
45
46#define mmPSOC_ETR_RRPHI                                             0x2C43038
47
48#define mmPSOC_ETR_RWPHI                                             0x2C4303C
49
50#define mmPSOC_ETR_AXICTL                                            0x2C43110
51
52#define mmPSOC_ETR_DBALO                                             0x2C43118
53
54#define mmPSOC_ETR_DBAHI                                             0x2C4311C
55
56#define mmPSOC_ETR_FFSR                                              0x2C43300
57
58#define mmPSOC_ETR_FFCR                                              0x2C43304
59
60#define mmPSOC_ETR_PSCR                                              0x2C43308
61
62#define mmPSOC_ETR_ITMISCOP0                                         0x2C43EE0
63
64#define mmPSOC_ETR_ITTRFLIN                                          0x2C43EE8
65
66#define mmPSOC_ETR_ITATBDATA0                                        0x2C43EEC
67
68#define mmPSOC_ETR_ITATBCTR2                                         0x2C43EF0
69
70#define mmPSOC_ETR_ITATBCTR1                                         0x2C43EF4
71
72#define mmPSOC_ETR_ITATBCTR0                                         0x2C43EF8
73
74#define mmPSOC_ETR_ITCTRL                                            0x2C43F00
75
76#define mmPSOC_ETR_CLAIMSET                                          0x2C43FA0
77
78#define mmPSOC_ETR_CLAIMCLR                                          0x2C43FA4
79
80#define mmPSOC_ETR_LAR                                               0x2C43FB0
81
82#define mmPSOC_ETR_LSR                                               0x2C43FB4
83
84#define mmPSOC_ETR_AUTHSTATUS                                        0x2C43FB8
85
86#define mmPSOC_ETR_DEVID                                             0x2C43FC8
87
88#define mmPSOC_ETR_DEVTYPE                                           0x2C43FCC
89
90#define mmPSOC_ETR_PERIPHID4                                         0x2C43FD0
91
92#define mmPSOC_ETR_PERIPHID5                                         0x2C43FD4
93
94#define mmPSOC_ETR_PERIPHID6                                         0x2C43FD8
95
96#define mmPSOC_ETR_PERIPHID7                                         0x2C43FDC
97
98#define mmPSOC_ETR_PERIPHID0                                         0x2C43FE0
99
100#define mmPSOC_ETR_PERIPHID1                                         0x2C43FE4
101
102#define mmPSOC_ETR_PERIPHID2                                         0x2C43FE8
103
104#define mmPSOC_ETR_PERIPHID3                                         0x2C43FEC
105
106#define mmPSOC_ETR_COMPID0                                           0x2C43FF0
107
108#define mmPSOC_ETR_COMPID1                                           0x2C43FF4
109
110#define mmPSOC_ETR_COMPID2                                           0x2C43FF8
111
112#define mmPSOC_ETR_COMPID3                                           0x2C43FFC
113
114#endif /* ASIC_REG_PSOC_ETR_REGS_H_ */
115