1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * mbus.h:  Various defines for MBUS modules.
4 *
5 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
6 */
7
8#ifndef _SPARC_MBUS_H
9#define _SPARC_MBUS_H
10
11#include <asm/ross.h>    /* HyperSparc stuff */
12#include <asm/viking.h>  /* Ugh, bug city... */
13
14enum mbus_module {
15	HyperSparc        = 0,
16	Swift_ok          = 4,
17	Swift_bad_c       = 5,
18	Swift_lots_o_bugs = 6,
19	Tsunami           = 7,
20	Viking_12         = 8,
21	Viking_2x         = 9,
22	Viking_30         = 10,
23	Viking_35         = 11,
24	Viking_new        = 12,
25	TurboSparc	  = 13,
26	SRMMU_INVAL_MOD   = 14,
27};
28
29extern enum mbus_module srmmu_modtype;
30extern unsigned int viking_rev, swift_rev, cypress_rev;
31
32/* HW Mbus module bugs we have to deal with */
33#define HWBUG_COPYBACK_BROKEN        0x00000001
34#define HWBUG_ASIFLUSH_BROKEN        0x00000002
35#define HWBUG_VACFLUSH_BITROT        0x00000004
36#define HWBUG_KERN_ACCBROKEN         0x00000008
37#define HWBUG_KERN_CBITBROKEN        0x00000010
38#define HWBUG_MODIFIED_BITROT        0x00000020
39#define HWBUG_PC_BADFAULT_ADDR       0x00000040
40#define HWBUG_SUPERSCALAR_BAD        0x00000080
41#define HWBUG_PACINIT_BITROT         0x00000100
42
43/* First the module type values. To find out which you have, just load
44 * the mmu control register from ASI_M_MMUREG alternate address space and
45 * shift the value right 28 bits.
46 */
47/* IMPL field means the company which produced the chip. */
48#define MBUS_VIKING        0x4   /* bleech, Texas Instruments Module */
49#define MBUS_LSI           0x3   /* LSI Logics */
50#define MBUS_ROSS          0x1   /* Ross is nice */
51#define MBUS_FMI           0x0   /* Fujitsu Microelectronics/Swift */
52
53/* Ross Module versions */
54#define ROSS_604_REV_CDE        0x0   /* revisions c, d, and e */
55#define ROSS_604_REV_F          0x1   /* revision f */
56#define ROSS_605                0xf   /* revision a, a.1, and a.2 */
57#define ROSS_605_REV_B          0xe   /* revision b */
58
59/* TI Viking Module versions */
60#define VIKING_REV_12           0x1   /* Version 1.2 or SPARCclassic's CPU */
61#define VIKING_REV_2            0x2   /* Version 2.1, 2.2, 2.3, and 2.4 */
62#define VIKING_REV_30           0x3   /* Version 3.0 */
63#define VIKING_REV_35           0x4   /* Version 3.5 */
64
65/* LSI Logics. */
66#define LSI_L64815		0x0
67
68/* Fujitsu */
69#define FMI_AURORA		0x4   /* MB8690x, a Swift module... */
70#define FMI_TURBO		0x5   /* MB86907, a TurboSparc module... */
71
72/* For multiprocessor support we need to be able to obtain the CPU id and
73 * the MBUS Module id.
74 */
75
76/* The CPU ID is encoded in the trap base register, 20 bits to the left of
77 * bit zero, with 2 bits being significant.
78 */
79#define TBR_ID_SHIFT            20
80
81static inline int get_cpuid(void)
82{
83	register int retval;
84	__asm__ __volatile__("rd %%tbr, %0\n\t"
85			     "srl %0, %1, %0\n\t" :
86			     "=r" (retval) :
87			     "i" (TBR_ID_SHIFT));
88	return (retval & 3);
89}
90
91static inline int get_modid(void)
92{
93	return (get_cpuid() | 0x8);
94}
95
96
97#endif /* !(_SPARC_MBUS_H) */
98