1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3*Copyright (C) 2004 Konrad Eisele (eiselekd@web.de,konrad@gaisler.com), Gaisler Research 4*Copyright (C) 2004 Stefan Holst (mail@s-holst.de), Uni-Stuttgart 5*Copyright (C) 2009 Daniel Hellstrom (daniel@gaisler.com),Konrad Eisele (konrad@gaisler.com) Aeroflex Gaisler AB 6*/ 7 8#ifndef LEON_AMBA_H_INCLUDE 9#define LEON_AMBA_H_INCLUDE 10 11#ifndef __ASSEMBLY__ 12 13struct amba_prom_registers { 14 unsigned int phys_addr; /* The physical address of this register */ 15 unsigned int reg_size; /* How many bytes does this register take up? */ 16}; 17 18#endif 19 20/* 21 * The following defines the bits in the LEON UART Status Registers. 22 */ 23 24#define LEON_REG_UART_STATUS_DR 0x00000001 /* Data Ready */ 25#define LEON_REG_UART_STATUS_TSE 0x00000002 /* TX Send Register Empty */ 26#define LEON_REG_UART_STATUS_THE 0x00000004 /* TX Hold Register Empty */ 27#define LEON_REG_UART_STATUS_BR 0x00000008 /* Break Error */ 28#define LEON_REG_UART_STATUS_OE 0x00000010 /* RX Overrun Error */ 29#define LEON_REG_UART_STATUS_PE 0x00000020 /* RX Parity Error */ 30#define LEON_REG_UART_STATUS_FE 0x00000040 /* RX Framing Error */ 31#define LEON_REG_UART_STATUS_ERR 0x00000078 /* Error Mask */ 32 33/* 34 * The following defines the bits in the LEON UART Ctrl Registers. 35 */ 36 37#define LEON_REG_UART_CTRL_RE 0x00000001 /* Receiver enable */ 38#define LEON_REG_UART_CTRL_TE 0x00000002 /* Transmitter enable */ 39#define LEON_REG_UART_CTRL_RI 0x00000004 /* Receiver interrupt enable */ 40#define LEON_REG_UART_CTRL_TI 0x00000008 /* Transmitter irq */ 41#define LEON_REG_UART_CTRL_PS 0x00000010 /* Parity select */ 42#define LEON_REG_UART_CTRL_PE 0x00000020 /* Parity enable */ 43#define LEON_REG_UART_CTRL_FL 0x00000040 /* Flow control enable */ 44#define LEON_REG_UART_CTRL_LB 0x00000080 /* Loop Back enable */ 45 46#define LEON3_GPTIMER_EN 1 47#define LEON3_GPTIMER_RL 2 48#define LEON3_GPTIMER_LD 4 49#define LEON3_GPTIMER_IRQEN 8 50#define LEON3_GPTIMER_SEPIRQ 8 51#define LEON3_GPTIMER_TIMERS 0x7 52 53#define LEON23_REG_TIMER_CONTROL_EN 0x00000001 /* 1 = enable counting */ 54/* 0 = hold scalar and counter */ 55#define LEON23_REG_TIMER_CONTROL_RL 0x00000002 /* 1 = reload at 0 */ 56 /* 0 = stop at 0 */ 57#define LEON23_REG_TIMER_CONTROL_LD 0x00000004 /* 1 = load counter */ 58 /* 0 = no function */ 59#define LEON23_REG_TIMER_CONTROL_IQ 0x00000008 /* 1 = irq enable */ 60 /* 0 = no function */ 61 62/* 63 * The following defines the bits in the LEON PS/2 Status Registers. 64 */ 65 66#define LEON_REG_PS2_STATUS_DR 0x00000001 /* Data Ready */ 67#define LEON_REG_PS2_STATUS_PE 0x00000002 /* Parity error */ 68#define LEON_REG_PS2_STATUS_FE 0x00000004 /* Framing error */ 69#define LEON_REG_PS2_STATUS_KI 0x00000008 /* Keyboard inhibit */ 70#define LEON_REG_PS2_STATUS_RF 0x00000010 /* RX buffer full */ 71#define LEON_REG_PS2_STATUS_TF 0x00000020 /* TX buffer full */ 72 73/* 74 * The following defines the bits in the LEON PS/2 Ctrl Registers. 75 */ 76 77#define LEON_REG_PS2_CTRL_RE 0x00000001 /* Receiver enable */ 78#define LEON_REG_PS2_CTRL_TE 0x00000002 /* Transmitter enable */ 79#define LEON_REG_PS2_CTRL_RI 0x00000004 /* Keyboard receive irq */ 80#define LEON_REG_PS2_CTRL_TI 0x00000008 /* Keyboard transmit irq */ 81 82#define LEON3_IRQMPSTATUS_CPUNR 28 83#define LEON3_IRQMPSTATUS_BROADCAST 27 84 85#define GPTIMER_CONFIG_IRQNT(a) (((a) >> 3) & 0x1f) 86#define GPTIMER_CONFIG_ISSEP(a) ((a) & (1 << 8)) 87#define GPTIMER_CONFIG_NTIMERS(a) ((a) & (0x7)) 88#define LEON3_GPTIMER_CTRL_PENDING 0x10 89#define LEON3_GPTIMER_CONFIG_NRTIMERS(c) ((c)->config & 0x7) 90#define LEON3_GPTIMER_CTRL_ISPENDING(r) (((r)&LEON3_GPTIMER_CTRL_PENDING) ? 1 : 0) 91 92#ifndef __ASSEMBLY__ 93 94struct leon3_irqctrl_regs_map { 95 u32 ilevel; 96 u32 ipend; 97 u32 iforce; 98 u32 iclear; 99 u32 mpstatus; 100 u32 mpbroadcast; 101 u32 notused02; 102 u32 notused03; 103 u32 ampctrl; 104 u32 icsel[2]; 105 u32 notused13; 106 u32 notused20; 107 u32 notused21; 108 u32 notused22; 109 u32 notused23; 110 u32 mask[16]; 111 u32 force[16]; 112 /* Extended IRQ registers */ 113 u32 intid[16]; /* 0xc0 */ 114 u32 unused[(0x1000-0x100)/4]; 115}; 116 117struct leon3_apbuart_regs_map { 118 u32 data; 119 u32 status; 120 u32 ctrl; 121 u32 scaler; 122}; 123 124struct leon3_gptimerelem_regs_map { 125 u32 val; 126 u32 rld; 127 u32 ctrl; 128 u32 unused; 129}; 130 131struct leon3_gptimer_regs_map { 132 u32 scalar; 133 u32 scalar_reload; 134 u32 config; 135 u32 unused; 136 struct leon3_gptimerelem_regs_map e[8]; 137}; 138 139/* 140 * Types and structure used for AMBA Plug & Play bus scanning 141 */ 142 143#define AMBA_MAXAPB_DEVS 64 144#define AMBA_MAXAPB_DEVS_PERBUS 16 145 146struct amba_device_table { 147 int devnr; /* number of devices on AHB or APB bus */ 148 unsigned int *addr[16]; /* addresses to the devices configuration tables */ 149 unsigned int allocbits[1]; /* 0=unallocated, 1=allocated driver */ 150}; 151 152struct amba_apbslv_device_table { 153 int devnr; /* number of devices on AHB or APB bus */ 154 unsigned int *addr[AMBA_MAXAPB_DEVS]; /* addresses to the devices configuration tables */ 155 unsigned int apbmst[AMBA_MAXAPB_DEVS]; /* apb master if a entry is a apb slave */ 156 unsigned int apbmstidx[AMBA_MAXAPB_DEVS]; /* apb master idx if a entry is a apb slave */ 157 unsigned int allocbits[4]; /* 0=unallocated, 1=allocated driver */ 158}; 159 160struct amba_confarea_type { 161 struct amba_confarea_type *next;/* next bus in chain */ 162 struct amba_device_table ahbmst; 163 struct amba_device_table ahbslv; 164 struct amba_apbslv_device_table apbslv; 165 unsigned int apbmst; 166}; 167 168/* collect apb slaves */ 169struct amba_apb_device { 170 unsigned int start, irq, bus_id; 171 struct amba_confarea_type *bus; 172}; 173 174/* collect ahb slaves */ 175struct amba_ahb_device { 176 unsigned int start[4], irq, bus_id; 177 struct amba_confarea_type *bus; 178}; 179 180struct device_node; 181void _amba_init(struct device_node *dp, struct device_node ***nextp); 182 183extern unsigned long amba_system_id; 184extern struct leon3_irqctrl_regs_map *leon3_irqctrl_regs; 185extern struct leon3_gptimer_regs_map *leon3_gptimer_regs; 186extern struct amba_apb_device leon_percpu_timer_dev[16]; 187extern int leondebug_irq_disable; 188extern int leon_debug_irqout; 189extern unsigned long leon3_gptimer_irq; 190extern unsigned int sparc_leon_eirq; 191 192#endif /* __ASSEMBLY__ */ 193 194#define LEON3_IO_AREA 0xfff00000 195#define LEON3_CONF_AREA 0xff000 196#define LEON3_AHB_SLAVE_CONF_AREA (1 << 11) 197 198#define LEON3_AHB_CONF_WORDS 8 199#define LEON3_APB_CONF_WORDS 2 200#define LEON3_AHB_MASTERS 16 201#define LEON3_AHB_SLAVES 16 202#define LEON3_APB_SLAVES 16 203#define LEON3_APBUARTS 8 204 205/* Vendor codes */ 206#define VENDOR_GAISLER 1 207#define VENDOR_PENDER 2 208#define VENDOR_ESA 4 209#define VENDOR_OPENCORES 8 210 211/* Gaisler Research device id's */ 212#define GAISLER_LEON3 0x003 213#define GAISLER_LEON3DSU 0x004 214#define GAISLER_ETHAHB 0x005 215#define GAISLER_APBMST 0x006 216#define GAISLER_AHBUART 0x007 217#define GAISLER_SRCTRL 0x008 218#define GAISLER_SDCTRL 0x009 219#define GAISLER_APBUART 0x00C 220#define GAISLER_IRQMP 0x00D 221#define GAISLER_AHBRAM 0x00E 222#define GAISLER_GPTIMER 0x011 223#define GAISLER_PCITRG 0x012 224#define GAISLER_PCISBRG 0x013 225#define GAISLER_PCIFBRG 0x014 226#define GAISLER_PCITRACE 0x015 227#define GAISLER_PCIDMA 0x016 228#define GAISLER_AHBTRACE 0x017 229#define GAISLER_ETHDSU 0x018 230#define GAISLER_PIOPORT 0x01A 231#define GAISLER_GRGPIO 0x01A 232#define GAISLER_AHBJTAG 0x01c 233#define GAISLER_ETHMAC 0x01D 234#define GAISLER_AHB2AHB 0x020 235#define GAISLER_USBDC 0x021 236#define GAISLER_ATACTRL 0x024 237#define GAISLER_DDRSPA 0x025 238#define GAISLER_USBEHC 0x026 239#define GAISLER_USBUHC 0x027 240#define GAISLER_I2CMST 0x028 241#define GAISLER_SPICTRL 0x02D 242#define GAISLER_DDR2SPA 0x02E 243#define GAISLER_SPIMCTRL 0x045 244#define GAISLER_LEON4 0x048 245#define GAISLER_LEON4DSU 0x049 246#define GAISLER_AHBSTAT 0x052 247#define GAISLER_FTMCTRL 0x054 248#define GAISLER_KBD 0x060 249#define GAISLER_VGA 0x061 250#define GAISLER_SVGA 0x063 251#define GAISLER_GRSYSMON 0x066 252#define GAISLER_GRACECTRL 0x067 253 254#define GAISLER_L2TIME 0xffd /* internal device: leon2 timer */ 255#define GAISLER_L2C 0xffe /* internal device: leon2compat */ 256#define GAISLER_PLUGPLAY 0xfff /* internal device: plug & play configarea */ 257 258/* Chip IDs */ 259#define AEROFLEX_UT699 0x0699 260#define LEON4_NEXTREME1 0x0102 261#define GAISLER_GR712RC 0x0712 262 263#define amba_vendor(x) (((x) >> 24) & 0xff) 264 265#define amba_device(x) (((x) >> 12) & 0xfff) 266 267#endif 268