1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * auxio.h:  Definitions and code for the Auxiliary I/O registers.
4 *
5 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
6 *
7 * Refactoring for unified NCR/PCIO support 2002 Eric Brower (ebrower@usa.net)
8 */
9#ifndef _SPARC64_AUXIO_H
10#define _SPARC64_AUXIO_H
11
12/* AUXIO implementations:
13 * sbus-based NCR89C105 "Slavio"
14 *	LED/Floppy (AUX1) register
15 *	Power (AUX2) register
16 *
17 * ebus-based auxio on PCIO
18 *	LED Auxio Register
19 *	Power Auxio Register
20 *
21 * Register definitions from NCR _NCR89C105 Chip Specification_
22 *
23 * SLAVIO AUX1 @ 0x1900000
24 * -------------------------------------------------
25 * | (R) | (R) |  D  | (R) |  E  |  M  |  T  |  L  |
26 * -------------------------------------------------
27 * (R) - bit 7:6,4 are reserved and should be masked in s/w
28 *  D  - Floppy Density Sense (1=high density) R/O
29 *  E  - Link Test Enable, directly reflected on AT&T 7213 LTE pin
30 *  M  - Monitor/Mouse Mux, directly reflected on MON_MSE_MUX pin
31 *  T  - Terminal Count: sends TC pulse to 82077 floppy controller
32 *  L  - System LED on front panel (0=off, 1=on)
33 */
34#define AUXIO_AUX1_MASK		0xc0 /* Mask bits 		*/
35#define AUXIO_AUX1_FDENS	0x20 /* Floppy Density Sense	*/
36#define AUXIO_AUX1_LTE 		0x08 /* Link Test Enable 	*/
37#define AUXIO_AUX1_MMUX		0x04 /* Monitor/Mouse Mux	*/
38#define AUXIO_AUX1_FTCNT	0x02 /* Terminal Count, 	*/
39#define AUXIO_AUX1_LED		0x01 /* System LED		*/
40
41/* SLAVIO AUX2 @ 0x1910000
42 * -------------------------------------------------
43 * | (R) | (R) |  D  | (R) | (R) | (R) |  C  |  F  |
44 * -------------------------------------------------
45 * (R) - bits 7:6,4:2 are reserved and should be masked in s/w
46 *  D  - Power Failure Detect (1=power fail)
47 *  C  - Clear Power Failure Detect Int (1=clear)
48 *  F  - Power Off (1=power off)
49 */
50#define AUXIO_AUX2_MASK		0xdc /* Mask Bits		*/
51#define AUXIO_AUX2_PFAILDET	0x20 /* Power Fail Detect	*/
52#define AUXIO_AUX2_PFAILCLR 	0x02 /* Clear Pwr Fail Det Intr	*/
53#define AUXIO_AUX2_PWR_OFF	0x01 /* Power Off		*/
54
55/* Register definitions from Sun Microsystems _PCIO_ p/n 802-7837
56 *
57 * PCIO LED Auxio @ 0x726000
58 * -------------------------------------------------
59 * |             31:1 Unused                 | LED |
60 * -------------------------------------------------
61 * Bits 31:1 unused
62 * LED - System LED on front panel (0=off, 1=on)
63 */
64#define AUXIO_PCIO_LED		0x01 /* System LED 		*/
65
66/* PCIO Power Auxio @ 0x724000
67 * -------------------------------------------------
68 * |             31:2 Unused           | CPO | SPO |
69 * -------------------------------------------------
70 * Bits 31:2 unused
71 * CPO - Courtesy Power Off (1=off)
72 * SPO - System Power Off   (1=off)
73 */
74#define AUXIO_PCIO_CPWR_OFF	0x02 /* Courtesy Power Off	*/
75#define AUXIO_PCIO_SPWR_OFF	0x01 /* System Power Off	*/
76
77#ifndef __ASSEMBLY__
78
79#define AUXIO_LTE_ON	1
80#define AUXIO_LTE_OFF	0
81
82/* auxio_set_lte - Set Link Test Enable (TPE Link Detect)
83 *
84 * on - AUXIO_LTE_ON or AUXIO_LTE_OFF
85 */
86void auxio_set_lte(int on);
87
88#define AUXIO_LED_ON	1
89#define AUXIO_LED_OFF	0
90
91/* auxio_set_led - Set system front panel LED
92 *
93 * on - AUXIO_LED_ON or AUXIO_LED_OFF
94 */
95void auxio_set_led(int on);
96
97#endif /* ifndef __ASSEMBLY__ */
98
99#endif /* !(_SPARC64_AUXIO_H) */
100