1// SPDX-License-Identifier: GPL-2.0 2/* 3 * linux/arch/sh/boards/se/770x/setup.c 4 * 5 * Copyright (C) 2000 Kazumoto Kojima 6 * 7 * Hitachi SolutionEngine Support. 8 * 9 */ 10#include <linux/init.h> 11#include <linux/platform_device.h> 12#include <linux/sh_eth.h> 13#include <mach-se/mach/se.h> 14#include <mach-se/mach/mrshpc.h> 15#include <asm/machvec.h> 16#include <asm/io.h> 17#include <asm/smc37c93x.h> 18#include <asm/heartbeat.h> 19 20/* 21 * Configure the Super I/O chip 22 */ 23static void __init smsc_config(int index, int data) 24{ 25 outb_p(index, INDEX_PORT); 26 outb_p(data, DATA_PORT); 27} 28 29/* XXX: Another candidate for a more generic cchip machine vector */ 30static void __init smsc_setup(char **cmdline_p) 31{ 32 outb_p(CONFIG_ENTER, CONFIG_PORT); 33 outb_p(CONFIG_ENTER, CONFIG_PORT); 34 35 /* FDC */ 36 smsc_config(CURRENT_LDN_INDEX, LDN_FDC); 37 smsc_config(ACTIVATE_INDEX, 0x01); 38 smsc_config(IRQ_SELECT_INDEX, 6); /* IRQ6 */ 39 40 /* AUXIO (GPIO): to use IDE1 */ 41 smsc_config(CURRENT_LDN_INDEX, LDN_AUXIO); 42 smsc_config(GPIO46_INDEX, 0x00); /* nIOROP */ 43 smsc_config(GPIO47_INDEX, 0x00); /* nIOWOP */ 44 45 /* COM1 */ 46 smsc_config(CURRENT_LDN_INDEX, LDN_COM1); 47 smsc_config(ACTIVATE_INDEX, 0x01); 48 smsc_config(IO_BASE_HI_INDEX, 0x03); 49 smsc_config(IO_BASE_LO_INDEX, 0xf8); 50 smsc_config(IRQ_SELECT_INDEX, 4); /* IRQ4 */ 51 52 /* COM2 */ 53 smsc_config(CURRENT_LDN_INDEX, LDN_COM2); 54 smsc_config(ACTIVATE_INDEX, 0x01); 55 smsc_config(IO_BASE_HI_INDEX, 0x02); 56 smsc_config(IO_BASE_LO_INDEX, 0xf8); 57 smsc_config(IRQ_SELECT_INDEX, 3); /* IRQ3 */ 58 59 /* RTC */ 60 smsc_config(CURRENT_LDN_INDEX, LDN_RTC); 61 smsc_config(ACTIVATE_INDEX, 0x01); 62 smsc_config(IRQ_SELECT_INDEX, 8); /* IRQ8 */ 63 64 /* XXX: PARPORT, KBD, and MOUSE will come here... */ 65 outb_p(CONFIG_EXIT, CONFIG_PORT); 66} 67 68 69static struct resource cf_ide_resources[] = { 70 [0] = { 71 .start = PA_MRSHPC_IO + 0x1f0, 72 .end = PA_MRSHPC_IO + 0x1f0 + 8, 73 .flags = IORESOURCE_MEM, 74 }, 75 [1] = { 76 .start = PA_MRSHPC_IO + 0x1f0 + 0x206, 77 .end = PA_MRSHPC_IO + 0x1f0 + 8 + 0x206 + 8, 78 .flags = IORESOURCE_MEM, 79 }, 80 [2] = { 81 .start = IRQ_CFCARD, 82 .flags = IORESOURCE_IRQ, 83 }, 84}; 85 86static struct platform_device cf_ide_device = { 87 .name = "pata_platform", 88 .id = -1, 89 .num_resources = ARRAY_SIZE(cf_ide_resources), 90 .resource = cf_ide_resources, 91}; 92 93static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 }; 94 95static struct heartbeat_data heartbeat_data = { 96 .bit_pos = heartbeat_bit_pos, 97 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos), 98}; 99 100static struct resource heartbeat_resource = { 101 .start = PA_LED, 102 .end = PA_LED, 103 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT, 104}; 105 106static struct platform_device heartbeat_device = { 107 .name = "heartbeat", 108 .id = -1, 109 .dev = { 110 .platform_data = &heartbeat_data, 111 }, 112 .num_resources = 1, 113 .resource = &heartbeat_resource, 114}; 115 116#if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\ 117 defined(CONFIG_CPU_SUBTYPE_SH7712) 118/* SH771X Ethernet driver */ 119static struct sh_eth_plat_data sh_eth_plat = { 120 .phy = PHY_ID, 121 .phy_interface = PHY_INTERFACE_MODE_MII, 122}; 123 124static struct resource sh_eth0_resources[] = { 125 [0] = { 126 .start = SH_ETH0_BASE, 127 .end = SH_ETH0_BASE + 0x1B8 - 1, 128 .flags = IORESOURCE_MEM, 129 }, 130 [1] = { 131 .start = SH_TSU_BASE, 132 .end = SH_TSU_BASE + 0x200 - 1, 133 .flags = IORESOURCE_MEM, 134 }, 135 [2] = { 136 .start = SH_ETH0_IRQ, 137 .end = SH_ETH0_IRQ, 138 .flags = IORESOURCE_IRQ, 139 }, 140}; 141 142static struct platform_device sh_eth0_device = { 143 .name = "sh771x-ether", 144 .id = 0, 145 .dev = { 146 .platform_data = &sh_eth_plat, 147 }, 148 .num_resources = ARRAY_SIZE(sh_eth0_resources), 149 .resource = sh_eth0_resources, 150}; 151 152static struct resource sh_eth1_resources[] = { 153 [0] = { 154 .start = SH_ETH1_BASE, 155 .end = SH_ETH1_BASE + 0x1B8 - 1, 156 .flags = IORESOURCE_MEM, 157 }, 158 [1] = { 159 .start = SH_TSU_BASE, 160 .end = SH_TSU_BASE + 0x200 - 1, 161 .flags = IORESOURCE_MEM, 162 }, 163 [2] = { 164 .start = SH_ETH1_IRQ, 165 .end = SH_ETH1_IRQ, 166 .flags = IORESOURCE_IRQ, 167 }, 168}; 169 170static struct platform_device sh_eth1_device = { 171 .name = "sh771x-ether", 172 .id = 1, 173 .dev = { 174 .platform_data = &sh_eth_plat, 175 }, 176 .num_resources = ARRAY_SIZE(sh_eth1_resources), 177 .resource = sh_eth1_resources, 178}; 179#endif 180 181static struct platform_device *se_devices[] __initdata = { 182 &heartbeat_device, 183 &cf_ide_device, 184#if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\ 185 defined(CONFIG_CPU_SUBTYPE_SH7712) 186 &sh_eth0_device, 187 &sh_eth1_device, 188#endif 189}; 190 191static int __init se_devices_setup(void) 192{ 193 mrshpc_setup_windows(); 194 return platform_add_devices(se_devices, ARRAY_SIZE(se_devices)); 195} 196device_initcall(se_devices_setup); 197 198/* 199 * The Machine Vector 200 */ 201static struct sh_machine_vector mv_se __initmv = { 202 .mv_name = "SolutionEngine", 203 .mv_setup = smsc_setup, 204 .mv_init_irq = init_se_IRQ, 205}; 206