1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2/*
3 *  S390 version
4 *    Copyright IBM Corp. 1999, 2000
5 *    Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
6 */
7
8#ifndef _UAPI_S390_PTRACE_H
9#define _UAPI_S390_PTRACE_H
10
11#include <linux/const.h>
12
13/*
14 * Offsets in the user_regs_struct. They are used for the ptrace
15 * system call and in entry.S
16 */
17#ifndef __s390x__
18
19#define PT_PSWMASK  0x00
20#define PT_PSWADDR  0x04
21#define PT_GPR0     0x08
22#define PT_GPR1     0x0C
23#define PT_GPR2     0x10
24#define PT_GPR3     0x14
25#define PT_GPR4     0x18
26#define PT_GPR5     0x1C
27#define PT_GPR6     0x20
28#define PT_GPR7     0x24
29#define PT_GPR8     0x28
30#define PT_GPR9     0x2C
31#define PT_GPR10    0x30
32#define PT_GPR11    0x34
33#define PT_GPR12    0x38
34#define PT_GPR13    0x3C
35#define PT_GPR14    0x40
36#define PT_GPR15    0x44
37#define PT_ACR0     0x48
38#define PT_ACR1     0x4C
39#define PT_ACR2     0x50
40#define PT_ACR3     0x54
41#define PT_ACR4	    0x58
42#define PT_ACR5	    0x5C
43#define PT_ACR6	    0x60
44#define PT_ACR7	    0x64
45#define PT_ACR8	    0x68
46#define PT_ACR9	    0x6C
47#define PT_ACR10    0x70
48#define PT_ACR11    0x74
49#define PT_ACR12    0x78
50#define PT_ACR13    0x7C
51#define PT_ACR14    0x80
52#define PT_ACR15    0x84
53#define PT_ORIGGPR2 0x88
54#define PT_FPC	    0x90
55/*
56 * A nasty fact of life that the ptrace api
57 * only supports passing of longs.
58 */
59#define PT_FPR0_HI  0x98
60#define PT_FPR0_LO  0x9C
61#define PT_FPR1_HI  0xA0
62#define PT_FPR1_LO  0xA4
63#define PT_FPR2_HI  0xA8
64#define PT_FPR2_LO  0xAC
65#define PT_FPR3_HI  0xB0
66#define PT_FPR3_LO  0xB4
67#define PT_FPR4_HI  0xB8
68#define PT_FPR4_LO  0xBC
69#define PT_FPR5_HI  0xC0
70#define PT_FPR5_LO  0xC4
71#define PT_FPR6_HI  0xC8
72#define PT_FPR6_LO  0xCC
73#define PT_FPR7_HI  0xD0
74#define PT_FPR7_LO  0xD4
75#define PT_FPR8_HI  0xD8
76#define PT_FPR8_LO  0XDC
77#define PT_FPR9_HI  0xE0
78#define PT_FPR9_LO  0xE4
79#define PT_FPR10_HI 0xE8
80#define PT_FPR10_LO 0xEC
81#define PT_FPR11_HI 0xF0
82#define PT_FPR11_LO 0xF4
83#define PT_FPR12_HI 0xF8
84#define PT_FPR12_LO 0xFC
85#define PT_FPR13_HI 0x100
86#define PT_FPR13_LO 0x104
87#define PT_FPR14_HI 0x108
88#define PT_FPR14_LO 0x10C
89#define PT_FPR15_HI 0x110
90#define PT_FPR15_LO 0x114
91#define PT_CR_9	    0x118
92#define PT_CR_10    0x11C
93#define PT_CR_11    0x120
94#define PT_IEEE_IP  0x13C
95#define PT_LASTOFF  PT_IEEE_IP
96#define PT_ENDREGS  0x140-1
97
98#define GPR_SIZE	4
99#define CR_SIZE		4
100
101#define STACK_FRAME_OVERHEAD	96	/* size of minimum stack frame */
102
103#else /* __s390x__ */
104
105#define PT_PSWMASK  0x00
106#define PT_PSWADDR  0x08
107#define PT_GPR0     0x10
108#define PT_GPR1     0x18
109#define PT_GPR2     0x20
110#define PT_GPR3     0x28
111#define PT_GPR4     0x30
112#define PT_GPR5     0x38
113#define PT_GPR6     0x40
114#define PT_GPR7     0x48
115#define PT_GPR8     0x50
116#define PT_GPR9     0x58
117#define PT_GPR10    0x60
118#define PT_GPR11    0x68
119#define PT_GPR12    0x70
120#define PT_GPR13    0x78
121#define PT_GPR14    0x80
122#define PT_GPR15    0x88
123#define PT_ACR0     0x90
124#define PT_ACR1     0x94
125#define PT_ACR2     0x98
126#define PT_ACR3     0x9C
127#define PT_ACR4	    0xA0
128#define PT_ACR5	    0xA4
129#define PT_ACR6	    0xA8
130#define PT_ACR7	    0xAC
131#define PT_ACR8	    0xB0
132#define PT_ACR9	    0xB4
133#define PT_ACR10    0xB8
134#define PT_ACR11    0xBC
135#define PT_ACR12    0xC0
136#define PT_ACR13    0xC4
137#define PT_ACR14    0xC8
138#define PT_ACR15    0xCC
139#define PT_ORIGGPR2 0xD0
140#define PT_FPC	    0xD8
141#define PT_FPR0     0xE0
142#define PT_FPR1     0xE8
143#define PT_FPR2     0xF0
144#define PT_FPR3     0xF8
145#define PT_FPR4     0x100
146#define PT_FPR5     0x108
147#define PT_FPR6     0x110
148#define PT_FPR7     0x118
149#define PT_FPR8     0x120
150#define PT_FPR9     0x128
151#define PT_FPR10    0x130
152#define PT_FPR11    0x138
153#define PT_FPR12    0x140
154#define PT_FPR13    0x148
155#define PT_FPR14    0x150
156#define PT_FPR15    0x158
157#define PT_CR_9     0x160
158#define PT_CR_10    0x168
159#define PT_CR_11    0x170
160#define PT_IEEE_IP  0x1A8
161#define PT_LASTOFF  PT_IEEE_IP
162#define PT_ENDREGS  0x1B0-1
163
164#define GPR_SIZE	8
165#define CR_SIZE		8
166
167#define STACK_FRAME_OVERHEAD	160	 /* size of minimum stack frame */
168
169#endif /* __s390x__ */
170
171#ifndef __s390x__
172
173#define PSW_MASK_PER		_AC(0x40000000, UL)
174#define PSW_MASK_DAT		_AC(0x04000000, UL)
175#define PSW_MASK_IO		_AC(0x02000000, UL)
176#define PSW_MASK_EXT		_AC(0x01000000, UL)
177#define PSW_MASK_KEY		_AC(0x00F00000, UL)
178#define PSW_MASK_BASE		_AC(0x00080000, UL)	/* always one */
179#define PSW_MASK_MCHECK		_AC(0x00040000, UL)
180#define PSW_MASK_WAIT		_AC(0x00020000, UL)
181#define PSW_MASK_PSTATE		_AC(0x00010000, UL)
182#define PSW_MASK_ASC		_AC(0x0000C000, UL)
183#define PSW_MASK_CC		_AC(0x00003000, UL)
184#define PSW_MASK_PM		_AC(0x00000F00, UL)
185#define PSW_MASK_RI		_AC(0x00000000, UL)
186#define PSW_MASK_EA		_AC(0x00000000, UL)
187#define PSW_MASK_BA		_AC(0x00000000, UL)
188
189#define PSW_MASK_USER		_AC(0x0000FF00, UL)
190
191#define PSW_ADDR_AMODE		_AC(0x80000000, UL)
192#define PSW_ADDR_INSN		_AC(0x7FFFFFFF, UL)
193
194#define PSW_ASC_PRIMARY		_AC(0x00000000, UL)
195#define PSW_ASC_ACCREG		_AC(0x00004000, UL)
196#define PSW_ASC_SECONDARY	_AC(0x00008000, UL)
197#define PSW_ASC_HOME		_AC(0x0000C000, UL)
198
199#else /* __s390x__ */
200
201#define PSW_MASK_PER		_AC(0x4000000000000000, UL)
202#define PSW_MASK_DAT		_AC(0x0400000000000000, UL)
203#define PSW_MASK_IO		_AC(0x0200000000000000, UL)
204#define PSW_MASK_EXT		_AC(0x0100000000000000, UL)
205#define PSW_MASK_BASE		_AC(0x0000000000000000, UL)
206#define PSW_MASK_KEY		_AC(0x00F0000000000000, UL)
207#define PSW_MASK_MCHECK		_AC(0x0004000000000000, UL)
208#define PSW_MASK_WAIT		_AC(0x0002000000000000, UL)
209#define PSW_MASK_PSTATE		_AC(0x0001000000000000, UL)
210#define PSW_MASK_ASC		_AC(0x0000C00000000000, UL)
211#define PSW_MASK_CC		_AC(0x0000300000000000, UL)
212#define PSW_MASK_PM		_AC(0x00000F0000000000, UL)
213#define PSW_MASK_RI		_AC(0x0000008000000000, UL)
214#define PSW_MASK_EA		_AC(0x0000000100000000, UL)
215#define PSW_MASK_BA		_AC(0x0000000080000000, UL)
216
217#define PSW_MASK_USER		_AC(0x0000FF0180000000, UL)
218
219#define PSW_ADDR_AMODE		_AC(0x0000000000000000, UL)
220#define PSW_ADDR_INSN		_AC(0xFFFFFFFFFFFFFFFF, UL)
221
222#define PSW_ASC_PRIMARY		_AC(0x0000000000000000, UL)
223#define PSW_ASC_ACCREG		_AC(0x0000400000000000, UL)
224#define PSW_ASC_SECONDARY	_AC(0x0000800000000000, UL)
225#define PSW_ASC_HOME		_AC(0x0000C00000000000, UL)
226
227#endif /* __s390x__ */
228
229#define NUM_GPRS	16
230#define NUM_FPRS	16
231#define NUM_CRS		16
232#define NUM_ACRS	16
233
234#define NUM_CR_WORDS	3
235
236#define FPR_SIZE	8
237#define FPC_SIZE	4
238#define FPC_PAD_SIZE	4 /* gcc insists on aligning the fpregs */
239#define ACR_SIZE	4
240
241
242#define PTRACE_OLDSETOPTIONS		21
243#define PTRACE_SYSEMU			31
244#define PTRACE_SYSEMU_SINGLESTEP	32
245#ifndef __ASSEMBLY__
246#include <linux/stddef.h>
247#include <linux/types.h>
248
249typedef union {
250	float	f;
251	double	d;
252	__u64	ui;
253	struct
254	{
255		__u32 hi;
256		__u32 lo;
257	} fp;
258} freg_t;
259
260typedef struct {
261	__u32	fpc;
262	__u32	pad;
263	freg_t	fprs[NUM_FPRS];
264} s390_fp_regs;
265
266#define FPC_EXCEPTION_MASK	0xF8000000
267#define FPC_FLAGS_MASK		0x00F80000
268#define FPC_DXC_MASK		0x0000FF00
269#define FPC_RM_MASK		0x00000003
270
271/* this typedef defines how a Program Status Word looks like */
272typedef struct {
273	unsigned long mask;
274	unsigned long addr;
275} __attribute__ ((aligned(8))) psw_t;
276
277/*
278 * The s390_regs structure is used to define the elf_gregset_t.
279 */
280typedef struct {
281	psw_t psw;
282	unsigned long gprs[NUM_GPRS];
283	unsigned int  acrs[NUM_ACRS];
284	unsigned long orig_gpr2;
285} s390_regs;
286
287/*
288 * The user_pt_regs structure exports the beginning of
289 * the in-kernel pt_regs structure to user space.
290 */
291typedef struct {
292	unsigned long args[1];
293	psw_t psw;
294	unsigned long gprs[NUM_GPRS];
295} user_pt_regs;
296
297/*
298 * Now for the user space program event recording (trace) definitions.
299 * The following structures are used only for the ptrace interface, don't
300 * touch or even look at it if you don't want to modify the user-space
301 * ptrace interface. In particular stay away from it for in-kernel PER.
302 */
303typedef struct {
304	unsigned long cr[NUM_CR_WORDS];
305} per_cr_words;
306
307#define PER_EM_MASK 0xE8000000UL
308
309typedef struct {
310#ifdef __s390x__
311	unsigned		       : 32;
312#endif /* __s390x__ */
313	unsigned em_branching	       : 1;
314	unsigned em_instruction_fetch  : 1;
315	/*
316	 * Switching on storage alteration automatically fixes
317	 * the storage alteration event bit in the users std.
318	 */
319	unsigned em_storage_alteration : 1;
320	unsigned em_gpr_alt_unused     : 1;
321	unsigned em_store_real_address : 1;
322	unsigned		       : 3;
323	unsigned branch_addr_ctl       : 1;
324	unsigned		       : 1;
325	unsigned storage_alt_space_ctl : 1;
326	unsigned		       : 21;
327	unsigned long starting_addr;
328	unsigned long ending_addr;
329} per_cr_bits;
330
331typedef struct {
332	unsigned short perc_atmid;
333	unsigned long address;
334	unsigned char access_id;
335} per_lowcore_words;
336
337typedef struct {
338	unsigned perc_branching		 : 1;
339	unsigned perc_instruction_fetch  : 1;
340	unsigned perc_storage_alteration : 1;
341	unsigned perc_gpr_alt_unused	 : 1;
342	unsigned perc_store_real_address : 1;
343	unsigned			 : 3;
344	unsigned atmid_psw_bit_31	 : 1;
345	unsigned atmid_validity_bit	 : 1;
346	unsigned atmid_psw_bit_32	 : 1;
347	unsigned atmid_psw_bit_5	 : 1;
348	unsigned atmid_psw_bit_16	 : 1;
349	unsigned atmid_psw_bit_17	 : 1;
350	unsigned si			 : 2;
351	unsigned long address;
352	unsigned			 : 4;
353	unsigned access_id		 : 4;
354} per_lowcore_bits;
355
356typedef struct {
357	union {
358		per_cr_words   words;
359		per_cr_bits    bits;
360	} control_regs;
361	/*
362	 * The single_step and instruction_fetch bits are obsolete,
363	 * the kernel always sets them to zero. To enable single
364	 * stepping use ptrace(PTRACE_SINGLESTEP) instead.
365	 */
366	unsigned  single_step	    : 1;
367	unsigned  instruction_fetch : 1;
368	unsigned		    : 30;
369	/*
370	 * These addresses are copied into cr10 & cr11 if single
371	 * stepping is switched off
372	 */
373	unsigned long starting_addr;
374	unsigned long ending_addr;
375	union {
376		per_lowcore_words words;
377		per_lowcore_bits  bits;
378	} lowcore;
379} per_struct;
380
381typedef struct {
382	unsigned int  len;
383	unsigned long kernel_addr;
384	unsigned long process_addr;
385} ptrace_area;
386
387/*
388 * S/390 specific non posix ptrace requests. I chose unusual values so
389 * they are unlikely to clash with future ptrace definitions.
390 */
391#define PTRACE_PEEKUSR_AREA	      0x5000
392#define PTRACE_POKEUSR_AREA	      0x5001
393#define PTRACE_PEEKTEXT_AREA	      0x5002
394#define PTRACE_PEEKDATA_AREA	      0x5003
395#define PTRACE_POKETEXT_AREA	      0x5004
396#define PTRACE_POKEDATA_AREA	      0x5005
397#define PTRACE_GET_LAST_BREAK	      0x5006
398#define PTRACE_PEEK_SYSTEM_CALL       0x5007
399#define PTRACE_POKE_SYSTEM_CALL	      0x5008
400#define PTRACE_ENABLE_TE	      0x5009
401#define PTRACE_DISABLE_TE	      0x5010
402#define PTRACE_TE_ABORT_RAND	      0x5011
403
404/*
405 * The numbers chosen here are somewhat arbitrary but absolutely MUST
406 * not overlap with any of the number assigned in <linux/ptrace.h>.
407 */
408#define PTRACE_SINGLEBLOCK	12	/* resume execution until next branch */
409
410/*
411 * PT_PROT definition is loosely based on hppa bsd definition in
412 * gdb/hppab-nat.c
413 */
414#define PTRACE_PROT			  21
415
416typedef enum {
417	ptprot_set_access_watchpoint,
418	ptprot_set_write_watchpoint,
419	ptprot_disable_watchpoint
420} ptprot_flags;
421
422typedef struct {
423	unsigned long lowaddr;
424	unsigned long hiaddr;
425	ptprot_flags prot;
426} ptprot_area;
427
428/* Sequence of bytes for breakpoint illegal instruction.  */
429#define S390_BREAKPOINT     {0x0,0x1}
430#define S390_BREAKPOINT_U16 ((__u16)0x0001)
431#define S390_SYSCALL_OPCODE ((__u16)0x0a00)
432#define S390_SYSCALL_SIZE   2
433
434/*
435 * The user_regs_struct defines the way the user registers are
436 * store on the stack for signal handling.
437 */
438struct user_regs_struct {
439	psw_t psw;
440	unsigned long gprs[NUM_GPRS];
441	unsigned int  acrs[NUM_ACRS];
442	unsigned long orig_gpr2;
443	s390_fp_regs fp_regs;
444	/*
445	 * These per registers are in here so that gdb can modify them
446	 * itself as there is no "official" ptrace interface for hardware
447	 * watchpoints. This is the way intel does it.
448	 */
449	per_struct per_info;
450	unsigned long ieee_instruction_pointer;	/* obsolete, always 0 */
451};
452
453#endif /* __ASSEMBLY__ */
454
455#endif /* _UAPI_S390_PTRACE_H */
456