1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Copyright (C) 2015 Regents of the University of California 4 */ 5 6#ifndef _ASM_RISCV_CACHEFLUSH_H 7#define _ASM_RISCV_CACHEFLUSH_H 8 9#include <linux/mm.h> 10 11static inline void local_flush_icache_all(void) 12{ 13 asm volatile ("fence.i" ::: "memory"); 14} 15 16#define PG_dcache_clean PG_arch_1 17 18static inline void flush_dcache_folio(struct folio *folio) 19{ 20 if (test_bit(PG_dcache_clean, &folio->flags)) 21 clear_bit(PG_dcache_clean, &folio->flags); 22} 23#define flush_dcache_folio flush_dcache_folio 24#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1 25 26static inline void flush_dcache_page(struct page *page) 27{ 28 flush_dcache_folio(page_folio(page)); 29} 30 31/* 32 * RISC-V doesn't have an instruction to flush parts of the instruction cache, 33 * so instead we just flush the whole thing. 34 */ 35#define flush_icache_range(start, end) flush_icache_all() 36#define flush_icache_user_page(vma, pg, addr, len) \ 37 flush_icache_mm(vma->vm_mm, 0) 38 39#ifdef CONFIG_64BIT 40#define flush_cache_vmap(start, end) flush_tlb_kernel_range(start, end) 41#define flush_cache_vmap_early(start, end) local_flush_tlb_kernel_range(start, end) 42#endif 43 44#ifndef CONFIG_SMP 45 46#define flush_icache_all() local_flush_icache_all() 47#define flush_icache_mm(mm, local) flush_icache_all() 48 49#else /* CONFIG_SMP */ 50 51void flush_icache_all(void); 52void flush_icache_mm(struct mm_struct *mm, bool local); 53 54#endif /* CONFIG_SMP */ 55 56extern unsigned int riscv_cbom_block_size; 57extern unsigned int riscv_cboz_block_size; 58void riscv_init_cbo_blocksizes(void); 59 60#ifdef CONFIG_RISCV_DMA_NONCOHERENT 61void riscv_noncoherent_supported(void); 62void __init riscv_set_dma_cache_alignment(void); 63#else 64static inline void riscv_noncoherent_supported(void) {} 65static inline void riscv_set_dma_cache_alignment(void) {} 66#endif 67 68/* 69 * Bits in sys_riscv_flush_icache()'s flags argument. 70 */ 71#define SYS_RISCV_FLUSH_ICACHE_LOCAL 1UL 72#define SYS_RISCV_FLUSH_ICACHE_ALL (SYS_RISCV_FLUSH_ICACHE_LOCAL) 73 74#include <asm-generic/cacheflush.h> 75 76#endif /* _ASM_RISCV_CACHEFLUSH_H */ 77