1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (C) 2021 Sifive.
4 */
5
6#ifndef __ASM_ALTERNATIVE_H
7#define __ASM_ALTERNATIVE_H
8
9#include <asm/alternative-macros.h>
10
11#ifndef __ASSEMBLY__
12
13#ifdef CONFIG_RISCV_ALTERNATIVE
14
15#include <linux/init.h>
16#include <linux/kernel.h>
17#include <linux/types.h>
18#include <linux/stddef.h>
19#include <asm/hwcap.h>
20
21#define PATCH_ID_CPUFEATURE_ID(p)		lower_16_bits(p)
22#define PATCH_ID_CPUFEATURE_VALUE(p)		upper_16_bits(p)
23
24#define RISCV_ALTERNATIVES_BOOT		0 /* alternatives applied during regular boot */
25#define RISCV_ALTERNATIVES_MODULE	1 /* alternatives applied during module-init */
26#define RISCV_ALTERNATIVES_EARLY_BOOT	2 /* alternatives applied before mmu start */
27
28/* add the relative offset to the address of the offset to get the absolute address */
29#define __ALT_PTR(a, f)			((void *)&(a)->f + (a)->f)
30#define ALT_OLD_PTR(a)			__ALT_PTR(a, old_offset)
31#define ALT_ALT_PTR(a)			__ALT_PTR(a, alt_offset)
32
33void __init apply_boot_alternatives(void);
34void __init apply_early_boot_alternatives(void);
35void apply_module_alternatives(void *start, size_t length);
36
37void riscv_alternative_fix_offsets(void *alt_ptr, unsigned int len,
38				   int patch_offset);
39
40struct alt_entry {
41	s32 old_offset;		/* offset relative to original instruction or data  */
42	s32 alt_offset;		/* offset relative to replacement instruction or data */
43	u16 vendor_id;		/* CPU vendor ID */
44	u16 alt_len;		/* The replacement size */
45	u32 patch_id;		/* The patch ID (erratum ID or cpufeature ID) */
46};
47
48void andes_errata_patch_func(struct alt_entry *begin, struct alt_entry *end,
49			     unsigned long archid, unsigned long impid,
50			     unsigned int stage);
51void sifive_errata_patch_func(struct alt_entry *begin, struct alt_entry *end,
52			      unsigned long archid, unsigned long impid,
53			      unsigned int stage);
54void thead_errata_patch_func(struct alt_entry *begin, struct alt_entry *end,
55			     unsigned long archid, unsigned long impid,
56			     unsigned int stage);
57
58void riscv_cpufeature_patch_func(struct alt_entry *begin, struct alt_entry *end,
59				 unsigned int stage);
60
61#else /* CONFIG_RISCV_ALTERNATIVE */
62
63static inline void apply_boot_alternatives(void) { }
64static inline void apply_early_boot_alternatives(void) { }
65static inline void apply_module_alternatives(void *start, size_t length) { }
66
67#endif /* CONFIG_RISCV_ALTERNATIVE */
68
69#endif
70#endif
71