1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Routines common to most mpc85xx-based boards.
4 */
5
6#include <linux/of.h>
7#include <linux/of_irq.h>
8#include <linux/of_platform.h>
9
10#include <asm/fsl_pm.h>
11#include <soc/fsl/qe/qe.h>
12#include <sysdev/cpm2_pic.h>
13
14#include "mpc85xx.h"
15
16const struct fsl_pm_ops *qoriq_pm_ops;
17
18static const struct of_device_id mpc85xx_common_ids[] __initconst = {
19	{ .type = "soc", },
20	{ .compatible = "soc", },
21	{ .compatible = "simple-bus", },
22	{ .name = "cpm", },
23	{ .name = "localbus", },
24	{ .compatible = "gianfar", },
25	{ .compatible = "fsl,qe", },
26	{ .compatible = "fsl,cpm2", },
27	{ .compatible = "fsl,srio", },
28	/* So that the DMA channel nodes can be probed individually: */
29	{ .compatible = "fsl,eloplus-dma", },
30	/* For the PMC driver */
31	{ .compatible = "fsl,mpc8548-guts", },
32	/* Probably unnecessary? */
33	{ .compatible = "gpio-leds", },
34	/* For all PCI controllers */
35	{ .compatible = "fsl,mpc8540-pci", },
36	{ .compatible = "fsl,mpc8548-pcie", },
37	{ .compatible = "fsl,p1022-pcie", },
38	{ .compatible = "fsl,p1010-pcie", },
39	{ .compatible = "fsl,p1023-pcie", },
40	{ .compatible = "fsl,p4080-pcie", },
41	{ .compatible = "fsl,qoriq-pcie-v2.4", },
42	{ .compatible = "fsl,qoriq-pcie-v2.3", },
43	{ .compatible = "fsl,qoriq-pcie-v2.2", },
44	{ .compatible = "fsl,fman", },
45	{},
46};
47
48int __init mpc85xx_common_publish_devices(void)
49{
50	return of_platform_bus_probe(NULL, mpc85xx_common_ids, NULL);
51}
52#ifdef CONFIG_CPM2
53static void cpm2_cascade(struct irq_desc *desc)
54{
55	struct irq_chip *chip = irq_desc_get_chip(desc);
56	int cascade_irq;
57
58	while ((cascade_irq = cpm2_get_irq()) >= 0)
59		generic_handle_irq(cascade_irq);
60
61	chip->irq_eoi(&desc->irq_data);
62}
63
64
65void __init mpc85xx_cpm2_pic_init(void)
66{
67	struct device_node *np;
68	int irq;
69
70	/* Setup CPM2 PIC */
71	np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
72	if (np == NULL) {
73		printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
74		return;
75	}
76	irq = irq_of_parse_and_map(np, 0);
77	if (!irq) {
78		of_node_put(np);
79		printk(KERN_ERR "PIC init: got no IRQ for cpm cascade\n");
80		return;
81	}
82
83	cpm2_pic_init(np);
84	of_node_put(np);
85	irq_set_chained_handler(irq, cpm2_cascade);
86}
87#endif
88
89#ifdef CONFIG_QUICC_ENGINE
90void __init mpc85xx_qe_par_io_init(void)
91{
92	struct device_node *np;
93
94	np = of_find_node_by_name(NULL, "par_io");
95	if (np) {
96		struct device_node *ucc;
97
98		par_io_init(np);
99		of_node_put(np);
100
101		for_each_node_by_name(ucc, "ucc")
102			par_io_of_config(ucc);
103
104	}
105}
106#endif
107