1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright 2017 Benjamin Herrenschmidt, IBM Corporation
4 */
5
6#ifndef _KVM_PPC_BOOK3S_XIVE_H
7#define _KVM_PPC_BOOK3S_XIVE_H
8
9#ifdef CONFIG_KVM_XICS
10#include "book3s_xics.h"
11
12/*
13 * The XIVE Interrupt source numbers are within the range 0 to
14 * KVMPPC_XICS_NR_IRQS.
15 */
16#define KVMPPC_XIVE_FIRST_IRQ	0
17#define KVMPPC_XIVE_NR_IRQS	KVMPPC_XICS_NR_IRQS
18
19/*
20 * State for one guest irq source.
21 *
22 * For each guest source we allocate a HW interrupt in the XIVE
23 * which we use for all SW triggers. It will be unused for
24 * pass-through but it's easier to keep around as the same
25 * guest interrupt can alternatively be emulated or pass-through
26 * if a physical device is hot unplugged and replaced with an
27 * emulated one.
28 *
29 * This state structure is very similar to the XICS one with
30 * additional XIVE specific tracking.
31 */
32struct kvmppc_xive_irq_state {
33	bool valid;			/* Interrupt entry is valid */
34
35	u32 number;			/* Guest IRQ number */
36	u32 ipi_number;			/* XIVE IPI HW number */
37	struct xive_irq_data ipi_data;	/* XIVE IPI associated data */
38	u32 pt_number;			/* XIVE Pass-through number if any */
39	struct xive_irq_data *pt_data;	/* XIVE Pass-through associated data */
40
41	/* Targetting as set by guest */
42	u8 guest_priority;		/* Guest set priority */
43	u8 saved_priority;		/* Saved priority when masking */
44
45	/* Actual targetting */
46	u32 act_server;			/* Actual server */
47	u8 act_priority;		/* Actual priority */
48
49	/* Various state bits */
50	bool in_eoi;			/* Synchronize with H_EOI */
51	bool old_p;			/* P bit state when masking */
52	bool old_q;			/* Q bit state when masking */
53	bool lsi;			/* level-sensitive interrupt */
54	bool asserted;			/* Only for emulated LSI: current state */
55
56	/* Saved for migration state */
57	bool in_queue;
58	bool saved_p;
59	bool saved_q;
60	u8 saved_scan_prio;
61
62	/* Xive native */
63	u32 eisn;			/* Guest Effective IRQ number */
64};
65
66/* Select the "right" interrupt (IPI vs. passthrough) */
67static inline void kvmppc_xive_select_irq(struct kvmppc_xive_irq_state *state,
68					  u32 *out_hw_irq,
69					  struct xive_irq_data **out_xd)
70{
71	if (state->pt_number) {
72		if (out_hw_irq)
73			*out_hw_irq = state->pt_number;
74		if (out_xd)
75			*out_xd = state->pt_data;
76	} else {
77		if (out_hw_irq)
78			*out_hw_irq = state->ipi_number;
79		if (out_xd)
80			*out_xd = &state->ipi_data;
81	}
82}
83
84/*
85 * This corresponds to an "ICS" in XICS terminology, we use it
86 * as a mean to break up source information into multiple structures.
87 */
88struct kvmppc_xive_src_block {
89	arch_spinlock_t lock;
90	u16 id;
91	struct kvmppc_xive_irq_state irq_state[KVMPPC_XICS_IRQ_PER_ICS];
92};
93
94struct kvmppc_xive;
95
96struct kvmppc_xive_ops {
97	int (*reset_mapped)(struct kvm *kvm, unsigned long guest_irq);
98};
99
100#define KVMPPC_XIVE_FLAG_SINGLE_ESCALATION 0x1
101#define KVMPPC_XIVE_FLAG_SAVE_RESTORE 0x2
102
103struct kvmppc_xive {
104	struct kvm *kvm;
105	struct kvm_device *dev;
106	struct dentry *dentry;
107
108	/* VP block associated with the VM */
109	u32	vp_base;
110
111	/* Blocks of sources */
112	struct kvmppc_xive_src_block *src_blocks[KVMPPC_XICS_MAX_ICS_ID + 1];
113	u32	max_sbid;
114
115	/*
116	 * For state save, we lazily scan the queues on the first interrupt
117	 * being migrated. We don't have a clean way to reset that flags
118	 * so we keep track of the number of valid sources and how many of
119	 * them were migrated so we can reset when all of them have been
120	 * processed.
121	 */
122	u32	src_count;
123	u32	saved_src_count;
124
125	/*
126	 * Some irqs are delayed on restore until the source is created,
127	 * keep track here of how many of them
128	 */
129	u32	delayed_irqs;
130
131	/* Which queues (priorities) are in use by the guest */
132	u8	qmap;
133
134	/* Queue orders */
135	u32	q_order;
136	u32	q_page_order;
137
138	/* Flags */
139	u8	flags;
140
141	/* Number of entries in the VP block */
142	u32	nr_servers;
143
144	struct kvmppc_xive_ops *ops;
145	struct address_space   *mapping;
146	struct mutex mapping_lock;
147	struct mutex lock;
148};
149
150#define KVMPPC_XIVE_Q_COUNT	8
151
152struct kvmppc_xive_vcpu {
153	struct kvmppc_xive	*xive;
154	struct kvm_vcpu		*vcpu;
155	bool			valid;
156
157	/* Server number. This is the HW CPU ID from a guest perspective */
158	u32			server_num;
159
160	/*
161	 * HW VP corresponding to this VCPU. This is the base of the VP
162	 * block plus the server number.
163	 */
164	u32			vp_id;
165	u32			vp_chip_id;
166	u32			vp_cam;
167
168	/* IPI used for sending ... IPIs */
169	u32			vp_ipi;
170	struct xive_irq_data	vp_ipi_data;
171
172	/* Local emulation state */
173	uint8_t			cppr;	/* guest CPPR */
174	uint8_t			hw_cppr;/* Hardware CPPR */
175	uint8_t			mfrr;
176	uint8_t			pending;
177
178	/* Each VP has 8 queues though we only provision some */
179	struct xive_q		queues[KVMPPC_XIVE_Q_COUNT];
180	u32			esc_virq[KVMPPC_XIVE_Q_COUNT];
181	char			*esc_virq_names[KVMPPC_XIVE_Q_COUNT];
182
183	/* Stash a delayed irq on restore from migration (see set_icp) */
184	u32			delayed_irq;
185
186	/* Stats */
187	u64			stat_rm_h_xirr;
188	u64			stat_rm_h_ipoll;
189	u64			stat_rm_h_cppr;
190	u64			stat_rm_h_eoi;
191	u64			stat_rm_h_ipi;
192	u64			stat_vm_h_xirr;
193	u64			stat_vm_h_ipoll;
194	u64			stat_vm_h_cppr;
195	u64			stat_vm_h_eoi;
196	u64			stat_vm_h_ipi;
197};
198
199static inline struct kvm_vcpu *kvmppc_xive_find_server(struct kvm *kvm, u32 nr)
200{
201	struct kvm_vcpu *vcpu = NULL;
202	unsigned long i;
203
204	kvm_for_each_vcpu(i, vcpu, kvm) {
205		if (vcpu->arch.xive_vcpu && nr == vcpu->arch.xive_vcpu->server_num)
206			return vcpu;
207	}
208	return NULL;
209}
210
211static inline struct kvmppc_xive_src_block *kvmppc_xive_find_source(struct kvmppc_xive *xive,
212		u32 irq, u16 *source)
213{
214	u32 bid = irq >> KVMPPC_XICS_ICS_SHIFT;
215	u16 src = irq & KVMPPC_XICS_SRC_MASK;
216
217	if (source)
218		*source = src;
219	if (bid > KVMPPC_XICS_MAX_ICS_ID)
220		return NULL;
221	return xive->src_blocks[bid];
222}
223
224/*
225 * When the XIVE resources are allocated at the HW level, the VP
226 * structures describing the vCPUs of a guest are distributed among
227 * the chips to optimize the PowerBUS usage. For best performance, the
228 * guest vCPUs can be pinned to match the VP structure distribution.
229 *
230 * Currently, the VP identifiers are deduced from the vCPU id using
231 * the kvmppc_pack_vcpu_id() routine which is not incorrect but not
232 * optimal either. It VSMT is used, the result is not continuous and
233 * the constraints on HW resources described above can not be met.
234 */
235static inline u32 kvmppc_xive_vp(struct kvmppc_xive *xive, u32 server)
236{
237	return xive->vp_base + kvmppc_pack_vcpu_id(xive->kvm, server);
238}
239
240static inline bool kvmppc_xive_vp_in_use(struct kvm *kvm, u32 vp_id)
241{
242	struct kvm_vcpu *vcpu = NULL;
243	unsigned long i;
244
245	kvm_for_each_vcpu(i, vcpu, kvm) {
246		if (vcpu->arch.xive_vcpu && vp_id == vcpu->arch.xive_vcpu->vp_id)
247			return true;
248	}
249	return false;
250}
251
252/*
253 * Mapping between guest priorities and host priorities
254 * is as follow.
255 *
256 * Guest request for 0...6 are honored. Guest request for anything
257 * higher results in a priority of 6 being applied.
258 *
259 * Similar mapping is done for CPPR values
260 */
261static inline u8 xive_prio_from_guest(u8 prio)
262{
263	if (prio == 0xff || prio < 6)
264		return prio;
265	return 6;
266}
267
268static inline u8 xive_prio_to_guest(u8 prio)
269{
270	return prio;
271}
272
273static inline u32 __xive_read_eq(__be32 *qpage, u32 msk, u32 *idx, u32 *toggle)
274{
275	u32 cur;
276
277	if (!qpage)
278		return 0;
279	cur = be32_to_cpup(qpage + *idx);
280	if ((cur >> 31) == *toggle)
281		return 0;
282	*idx = (*idx + 1) & msk;
283	if (*idx == 0)
284		(*toggle) ^= 1;
285	return cur & 0x7fffffff;
286}
287
288/*
289 * Common Xive routines for XICS-over-XIVE and XIVE native
290 */
291void kvmppc_xive_disable_vcpu_interrupts(struct kvm_vcpu *vcpu);
292int kvmppc_xive_debug_show_queues(struct seq_file *m, struct kvm_vcpu *vcpu);
293void kvmppc_xive_debug_show_sources(struct seq_file *m,
294				    struct kvmppc_xive_src_block *sb);
295struct kvmppc_xive_src_block *kvmppc_xive_create_src_block(
296	struct kvmppc_xive *xive, int irq);
297void kvmppc_xive_free_sources(struct kvmppc_xive_src_block *sb);
298int kvmppc_xive_select_target(struct kvm *kvm, u32 *server, u8 prio);
299int kvmppc_xive_attach_escalation(struct kvm_vcpu *vcpu, u8 prio,
300				  bool single_escalation);
301struct kvmppc_xive *kvmppc_xive_get_device(struct kvm *kvm, u32 type);
302void xive_cleanup_single_escalation(struct kvm_vcpu *vcpu, int irq);
303int kvmppc_xive_compute_vp_id(struct kvmppc_xive *xive, u32 cpu, u32 *vp);
304int kvmppc_xive_set_nr_servers(struct kvmppc_xive *xive, u64 addr);
305bool kvmppc_xive_check_save_restore(struct kvm_vcpu *vcpu);
306
307static inline bool kvmppc_xive_has_single_escalation(struct kvmppc_xive *xive)
308{
309	return xive->flags & KVMPPC_XIVE_FLAG_SINGLE_ESCALATION;
310}
311
312#endif /* CONFIG_KVM_XICS */
313#endif /* _KVM_PPC_BOOK3S_XICS_H */
314