1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
2MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
3M68000 Hi-Performance Microprocessor Division
4M68060 Software Package
5Production Release P1.00 -- October 10, 1994
6
7M68060 Software Package Copyright © 1993, 1994 Motorola Inc.  All rights reserved.
8
9THE SOFTWARE is provided on an "AS IS" basis and without warranty.
10To the maximum extent permitted by applicable law,
11MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
12INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
13and any warranty against infringement with regard to the SOFTWARE
14(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials.
15
16To the maximum extent permitted by applicable law,
17IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
18(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
19BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
20ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
21Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.
22
23You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE
24so long as this entire notice is retained without alteration in any modified and/or
25redistributed versions, and that such modified versions are clearly identified as such.
26No licenses are granted by implication, estoppel or otherwise under any patents
27or trademarks of Motorola, Inc.
28~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
29
3068060 FLOATING-POINT SOFTWARE PACKAGE (Library version)
31--------------------------------------------------------
32
33The file fplsp.sa contains the "Library version" of the
3468060SP Floating-Point Software Package. The routines
35included in this module can be used to emulate the
36FP instructions not implemented in 68060 hardware. These
37instructions normally take exception vector #11
38"FP Unimplemented Instruction".
39
40By re-compiling a program that uses these instructions, and
41making subroutine calls in place of the unimplemented
42instructions, a program can avoid the overhead associated
43with taking the exception.
44
45Release file format:
46--------------------
47The file fplsp.sa is essentially a hexadecimal image of the
48release package. This is the ONLY format which will be supported.
49The hex image was created by assembling the source code and
50then converting the resulting binary output image into an
51ASCII text file. The hexadecimal numbers are listed
52using the Motorola Assembly Syntax assembler directive "dc.l"
53(define constant longword). The file can be converted to other
54assembly syntaxes by using any word processor with a global
55search and replace function.
56
57To assist in assembling and linking this module with other modules,
58the installer should add a symbolic label to the top of the file.
59This will allow calling routines to access the entry points
60of this package.
61
62The source code fplsp.s has also been included but only for
63documentation purposes.
64
65Release file structure:
66-----------------------
67The file fplsp.sa contains an "Entry-Point" section and a
68code section. The FPLSP has no "Call-Out" section. The first section
69is the "Entry-Point" section. In order to access a function in the
70package, a program must "bsr" or "jsr" to the location listed
71below in "68060FPLSP entry points" that corresponds to the desired
72function. A branch instruction located at the selected entry point
73within the package will then enter the correct emulation code routine.
74
75The entry point addresses at the beginning of the package will remain
76fixed so that a program calling the routines will not have to be
77re-compiled with every new 68060FPLSP release.
78
79There are 3 entry-points for each instruction type: single precision,
80double precision, and extended precision.
81
82As an example, the "fsin" library instruction can be passed an
83extended precision operand if program executes:
84
85# fsin.x fp0
86
87	fmovm.x	&0x01,-(%sp)	# pass operand on stack
88	bsr.l	_060FPLSP_TOP+0x1a8 # branch to fsin routine
89	add.l	&0xc,%sp	# clear operand from stack
90
91Upon return, fp0 holds the correct result. The FPSR is
92set correctly. The FPCR is unchanged. The FPIAR is undefined.
93
94Another example. This time, a dyadic operation:
95
96# frem.s %fp1,%fp0
97
98	fmov.s	%fp1,-(%sp)	# pass src operand
99	fmov.s	%fp0,-(%sp)	# pass dst operand
100	bsr.l	_060FPLSP_TOP+0x168 # branch to frem routine
101	addq.l	&0x8,%sp	# clear operands from stack
102
103Again, the result is returned in fp0. Note that BOTH operands
104are passed in single precision format.
105
106Exception reporting:
107--------------------
108The package takes exceptions according to the FPCR value upon subroutine
109entry. If an exception should be reported, then the package forces
110this exception using implemented floating-point instructions.
111For example, if the instruction being emulated should cause a
112floating-point Operand Error exception, then the library routine
113executes an FMUL of a zero and an infinity to force the OPERR
114exception. Although the FPIAR will be undefined for the enabled
115Operand Error exception handler, the user will at least be able
116to record that the event occurred.
117
118Miscellaneous:
119--------------
120The package does not attempt to correctly emulate instructions
121with Signalling NAN inputs. Use of SNANs should be avoided with
122this package.
123
124The fabs/fadd/fdiv/fint/fintrz/fmul/fneg/fsqrt/fsub entry points
125are provided for the convenience of older compilers that make
126subroutine calls for all fp instructions. The code does NOT emulate
127the instruction but rather simply executes it.
128
12968060FPLSP entry points:
130------------------------
131_060FPLSP_TOP:
1320x000:	_060LSP__facoss_
1330x008:	_060LSP__facosd_
1340x010:	_060LSP__facosx_
1350x018:	_060LSP__fasins_
1360x020:	_060LSP__fasind_
1370x028:	_060LSP__fasinx_
1380x030:	_060LSP__fatans_
1390x038:	_060LSP__fatand_
1400x040:	_060LSP__fatanx_
1410x048:	_060LSP__fatanhs_
1420x050:	_060LSP__fatanhd_
1430x058:	_060LSP__fatanhx_
1440x060:	_060LSP__fcoss_
1450x068:	_060LSP__fcosd_
1460x070:	_060LSP__fcosx_
1470x078:	_060LSP__fcoshs_
1480x080:	_060LSP__fcoshd_
1490x088:	_060LSP__fcoshx_
1500x090:	_060LSP__fetoxs_
1510x098:	_060LSP__fetoxd_
1520x0a0:	_060LSP__fetoxx_
1530x0a8:	_060LSP__fetoxm1s_
1540x0b0:	_060LSP__fetoxm1d_
1550x0b8:	_060LSP__fetoxm1x_
1560x0c0:	_060LSP__fgetexps_
1570x0c8:	_060LSP__fgetexpd_
1580x0d0:	_060LSP__fgetexpx_
1590x0d8:	_060LSP__fgetmans_
1600x0e0:	_060LSP__fgetmand_
1610x0e8:	_060LSP__fgetmanx_
1620x0f0:	_060LSP__flog10s_
1630x0f8:	_060LSP__flog10d_
1640x100:	_060LSP__flog10x_
1650x108:	_060LSP__flog2s_
1660x110:	_060LSP__flog2d_
1670x118:	_060LSP__flog2x_
1680x120:	_060LSP__flogns_
1690x128:	_060LSP__flognd_
1700x130:	_060LSP__flognx_
1710x138:	_060LSP__flognp1s_
1720x140:	_060LSP__flognp1d_
1730x148:	_060LSP__flognp1x_
1740x150:	_060LSP__fmods_
1750x158:	_060LSP__fmodd_
1760x160:	_060LSP__fmodx_
1770x168:	_060LSP__frems_
1780x170:	_060LSP__fremd_
1790x178:	_060LSP__fremx_
1800x180:	_060LSP__fscales_
1810x188:	_060LSP__fscaled_
1820x190:	_060LSP__fscalex_
1830x198:	_060LSP__fsins_
1840x1a0:	_060LSP__fsind_
1850x1a8:	_060LSP__fsinx_
1860x1b0:	_060LSP__fsincoss_
1870x1b8:	_060LSP__fsincosd_
1880x1c0:	_060LSP__fsincosx_
1890x1c8:	_060LSP__fsinhs_
1900x1d0:	_060LSP__fsinhd_
1910x1d8:	_060LSP__fsinhx_
1920x1e0:	_060LSP__ftans_
1930x1e8:	_060LSP__ftand_
1940x1f0:	_060LSP__ftanx_
1950x1f8:	_060LSP__ftanhs_
1960x200:	_060LSP__ftanhd_
1970x208:	_060LSP__ftanhx_
1980x210:	_060LSP__ftentoxs_
1990x218:	_060LSP__ftentoxd_
2000x220:	_060LSP__ftentoxx_
2010x228:	_060LSP__ftwotoxs_
2020x230:	_060LSP__ftwotoxd_
2030x238:	_060LSP__ftwotoxx_
204
2050x240:	_060LSP__fabss_
2060x248:	_060LSP__fabsd_
2070x250:	_060LSP__fabsx_
2080x258:	_060LSP__fadds_
2090x260:	_060LSP__faddd_
2100x268:	_060LSP__faddx_
2110x270:	_060LSP__fdivs_
2120x278:	_060LSP__fdivd_
2130x280:	_060LSP__fdivx_
2140x288:	_060LSP__fints_
2150x290:	_060LSP__fintd_
2160x298:	_060LSP__fintx_
2170x2a0:	_060LSP__fintrzs_
2180x2a8:	_060LSP__fintrzd_
2190x2b0:	_060LSP__fintrzx_
2200x2b8:	_060LSP__fmuls_
2210x2c0:	_060LSP__fmuld_
2220x2c8:	_060LSP__fmulx_
2230x2d0:	_060LSP__fnegs_
2240x2d8:	_060LSP__fnegd_
2250x2e0:	_060LSP__fnegx_
2260x2e8:	_060LSP__fsqrts_
2270x2f0:	_060LSP__fsqrtd_
2280x2f8:	_060LSP__fsqrtx_
2290x300:	_060LSP__fsubs_
2300x308:	_060LSP__fsubd_
2310x310:	_060LSP__fsubx_
232