1// SPDX-License-Identifier: GPL-2.0
2/***************************************************************************/
3
4/*
5 *	m5272.c  -- platform support for ColdFire 5272 based boards
6 *
7 *	Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
8 *	Copyright (C) 2001-2002, SnapGear Inc. (www.snapgear.com)
9 */
10
11/***************************************************************************/
12
13#include <linux/clkdev.h>
14#include <linux/kernel.h>
15#include <linux/param.h>
16#include <linux/init.h>
17#include <linux/io.h>
18#include <linux/phy.h>
19#include <linux/phy_fixed.h>
20#include <asm/machdep.h>
21#include <asm/coldfire.h>
22#include <asm/mcfsim.h>
23#include <asm/mcfuart.h>
24#include <asm/mcfclk.h>
25
26/***************************************************************************/
27
28/*
29 *	Some platforms need software versions of the GPIO data registers.
30 */
31unsigned short ppdata;
32unsigned char ledbank = 0xff;
33
34/***************************************************************************/
35
36DEFINE_CLK(pll, "pll.0", MCF_CLK);
37DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);
38
39static struct clk_lookup m5272_clk_lookup[] = {
40	CLKDEV_INIT(NULL, "pll.0", &clk_pll),
41	CLKDEV_INIT(NULL, "sys.0", &clk_sys),
42	CLKDEV_INIT("mcftmr.0", NULL, &clk_sys),
43	CLKDEV_INIT("mcftmr.1", NULL, &clk_sys),
44	CLKDEV_INIT("mcftmr.2", NULL, &clk_sys),
45	CLKDEV_INIT("mcftmr.3", NULL, &clk_sys),
46	CLKDEV_INIT("mcfuart.0", NULL, &clk_sys),
47	CLKDEV_INIT("mcfuart.1", NULL, &clk_sys),
48	CLKDEV_INIT("mcfqspi.0", NULL, &clk_sys),
49	CLKDEV_INIT("fec.0", NULL, &clk_sys),
50};
51
52/***************************************************************************/
53
54static void __init m5272_uarts_init(void)
55{
56	u32 v;
57
58	/* Enable the output lines for the serial ports */
59	v = readl(MCFSIM_PBCNT);
60	v = (v & ~0x000000ff) | 0x00000055;
61	writel(v, MCFSIM_PBCNT);
62
63	v = readl(MCFSIM_PDCNT);
64	v = (v & ~0x000003fc) | 0x000002a8;
65	writel(v, MCFSIM_PDCNT);
66}
67
68/***************************************************************************/
69
70static void m5272_cpu_reset(void)
71{
72	local_irq_disable();
73	/* Set watchdog to reset, and enabled */
74	__raw_writew(0, MCFSIM_WIRR);
75	__raw_writew(1, MCFSIM_WRRR);
76	__raw_writew(0, MCFSIM_WCR);
77	for (;;)
78		/* wait for watchdog to timeout */;
79}
80
81/***************************************************************************/
82
83void __init config_BSP(char *commandp, int size)
84{
85#if defined (CONFIG_MOD5272)
86	/* Set base of device vectors to be 64 */
87	writeb(0x40, MCFSIM_PIVR);
88#endif
89
90#if defined(CONFIG_NETtel) || defined(CONFIG_SCALES)
91	/* Copy command line from FLASH to local buffer... */
92	memcpy(commandp, (char *) 0xf0004000, size);
93	commandp[size-1] = 0;
94#elif defined(CONFIG_CANCam)
95	/* Copy command line from FLASH to local buffer... */
96	memcpy(commandp, (char *) 0xf0010000, size);
97	commandp[size-1] = 0;
98#endif
99
100	mach_reset = m5272_cpu_reset;
101	mach_sched_init = hw_timer_init;
102}
103
104/***************************************************************************/
105
106/*
107 * Some 5272 based boards have the FEC ethernet directly connected to
108 * an ethernet switch. In this case we need to use the fixed phy type,
109 * and we need to declare it early in boot.
110 */
111static struct fixed_phy_status nettel_fixed_phy_status __initdata = {
112	.link	= 1,
113	.speed	= 100,
114	.duplex	= 0,
115};
116
117/***************************************************************************/
118
119static int __init init_BSP(void)
120{
121	m5272_uarts_init();
122	fixed_phy_add(PHY_POLL, 0, &nettel_fixed_phy_status);
123	clkdev_add_table(m5272_clk_lookup, ARRAY_SIZE(m5272_clk_lookup));
124	return 0;
125}
126
127arch_initcall(init_BSP);
128
129/***************************************************************************/
130