1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited 4 */ 5#ifndef _ASM_IRQ_H 6#define _ASM_IRQ_H 7 8#include <linux/irqdomain.h> 9#include <linux/irqreturn.h> 10 11#define IRQ_STACK_SIZE THREAD_SIZE 12#define IRQ_STACK_START (IRQ_STACK_SIZE - 16) 13 14DECLARE_PER_CPU(unsigned long, irq_stack); 15 16/* 17 * The highest address on the IRQ stack contains a dummy frame which is 18 * structured as follows: 19 * 20 * top ------------ 21 * | task sp | <- irq_stack[cpu] + IRQ_STACK_START 22 * ------------ 23 * | | <- First frame of IRQ context 24 * ------------ 25 * 26 * task sp holds a copy of the task stack pointer where the struct pt_regs 27 * from exception entry can be found. 28 */ 29 30static inline bool on_irq_stack(int cpu, unsigned long sp) 31{ 32 unsigned long low = per_cpu(irq_stack, cpu); 33 unsigned long high = low + IRQ_STACK_SIZE; 34 35 return (low <= sp && sp <= high); 36} 37 38void spurious_interrupt(void); 39 40#define NR_IRQS_LEGACY 16 41 42#define arch_trigger_cpumask_backtrace arch_trigger_cpumask_backtrace 43void arch_trigger_cpumask_backtrace(const struct cpumask *mask, int exclude_cpu); 44 45#define MAX_IO_PICS 2 46#define NR_IRQS (64 + (256 * MAX_IO_PICS)) 47 48struct acpi_vector_group { 49 int node; 50 int pci_segment; 51 struct irq_domain *parent; 52}; 53extern struct acpi_vector_group pch_group[MAX_IO_PICS]; 54extern struct acpi_vector_group msi_group[MAX_IO_PICS]; 55 56#define CORES_PER_EIO_NODE 4 57 58#define LOONGSON_CPU_UART0_VEC 10 /* CPU UART0 */ 59#define LOONGSON_CPU_THSENS_VEC 14 /* CPU Thsens */ 60#define LOONGSON_CPU_HT0_VEC 16 /* CPU HT0 irq vector base number */ 61#define LOONGSON_CPU_HT1_VEC 24 /* CPU HT1 irq vector base number */ 62 63/* IRQ number definitions */ 64#define LOONGSON_LPC_IRQ_BASE 0 65#define LOONGSON_LPC_LAST_IRQ (LOONGSON_LPC_IRQ_BASE + 15) 66 67#define LOONGSON_CPU_IRQ_BASE 16 68#define LOONGSON_CPU_LAST_IRQ (LOONGSON_CPU_IRQ_BASE + 14) 69 70#define LOONGSON_PCH_IRQ_BASE 64 71#define LOONGSON_PCH_ACPI_IRQ (LOONGSON_PCH_IRQ_BASE + 47) 72#define LOONGSON_PCH_LAST_IRQ (LOONGSON_PCH_IRQ_BASE + 64 - 1) 73 74#define LOONGSON_MSI_IRQ_BASE (LOONGSON_PCH_IRQ_BASE + 64) 75#define LOONGSON_MSI_LAST_IRQ (LOONGSON_PCH_IRQ_BASE + 256 - 1) 76 77#define GSI_MIN_LPC_IRQ LOONGSON_LPC_IRQ_BASE 78#define GSI_MAX_LPC_IRQ (LOONGSON_LPC_IRQ_BASE + 16 - 1) 79#define GSI_MIN_CPU_IRQ LOONGSON_CPU_IRQ_BASE 80#define GSI_MAX_CPU_IRQ (LOONGSON_CPU_IRQ_BASE + 48 - 1) 81#define GSI_MIN_PCH_IRQ LOONGSON_PCH_IRQ_BASE 82#define GSI_MAX_PCH_IRQ (LOONGSON_PCH_IRQ_BASE + 256 - 1) 83 84struct acpi_madt_lio_pic; 85struct acpi_madt_eio_pic; 86struct acpi_madt_ht_pic; 87struct acpi_madt_bio_pic; 88struct acpi_madt_msi_pic; 89struct acpi_madt_lpc_pic; 90 91int liointc_acpi_init(struct irq_domain *parent, 92 struct acpi_madt_lio_pic *acpi_liointc); 93int eiointc_acpi_init(struct irq_domain *parent, 94 struct acpi_madt_eio_pic *acpi_eiointc); 95 96int htvec_acpi_init(struct irq_domain *parent, 97 struct acpi_madt_ht_pic *acpi_htvec); 98int pch_lpc_acpi_init(struct irq_domain *parent, 99 struct acpi_madt_lpc_pic *acpi_pchlpc); 100int pch_msi_acpi_init(struct irq_domain *parent, 101 struct acpi_madt_msi_pic *acpi_pchmsi); 102int pch_pic_acpi_init(struct irq_domain *parent, 103 struct acpi_madt_bio_pic *acpi_pchpic); 104int find_pch_pic(u32 gsi); 105struct fwnode_handle *get_pch_msi_handle(int pci_segment); 106 107extern struct acpi_madt_lio_pic *acpi_liointc; 108extern struct acpi_madt_eio_pic *acpi_eiointc[MAX_IO_PICS]; 109 110extern struct acpi_madt_ht_pic *acpi_htintc; 111extern struct acpi_madt_lpc_pic *acpi_pchlpc; 112extern struct acpi_madt_msi_pic *acpi_pchmsi[MAX_IO_PICS]; 113extern struct acpi_madt_bio_pic *acpi_pchpic[MAX_IO_PICS]; 114 115extern struct fwnode_handle *cpuintc_handle; 116extern struct fwnode_handle *liointc_handle; 117extern struct fwnode_handle *pch_lpc_handle; 118extern struct fwnode_handle *pch_pic_handle[MAX_IO_PICS]; 119 120extern irqreturn_t loongson_ipi_interrupt(int irq, void *dev); 121 122#include <asm-generic/irq.h> 123 124#endif /* _ASM_IRQ_H */ 125