1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 3/dts-v1/; 4 5#include <dt-bindings/gpio/gpio.h> 6#include <dt-bindings/pinctrl/rockchip.h> 7#include <dt-bindings/soc/rockchip,vop2.h> 8#include "rk3566.dtsi" 9 10/ { 11 model = "Pine64 Quartz64 Model B"; 12 compatible = "pine64,quartz64-b", "rockchip,rk3566"; 13 14 aliases { 15 ethernet0 = &gmac1; 16 mmc0 = &sdmmc0; 17 mmc1 = &sdhci; 18 mmc2 = &sdmmc1; 19 }; 20 21 chosen: chosen { 22 stdout-path = "serial2:1500000n8"; 23 }; 24 25 gmac1_clkin: external-gmac1-clock { 26 compatible = "fixed-clock"; 27 clock-frequency = <125000000>; 28 clock-output-names = "gmac1_clkin"; 29 #clock-cells = <0>; 30 }; 31 32 hdmi-con { 33 compatible = "hdmi-connector"; 34 type = "a"; 35 36 port { 37 hdmi_con_in: endpoint { 38 remote-endpoint = <&hdmi_out_con>; 39 }; 40 }; 41 }; 42 43 leds { 44 compatible = "gpio-leds"; 45 46 led-user { 47 label = "user-led"; 48 default-state = "on"; 49 gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; 50 linux,default-trigger = "heartbeat"; 51 pinctrl-names = "default"; 52 pinctrl-0 = <&user_led_enable_h>; 53 retain-state-suspended; 54 }; 55 }; 56 57 sound { 58 compatible = "simple-audio-card"; 59 simple-audio-card,format = "i2s"; 60 simple-audio-card,name = "Analog RK809"; 61 simple-audio-card,mclk-fs = <256>; 62 63 simple-audio-card,cpu { 64 sound-dai = <&i2s1_8ch>; 65 }; 66 67 simple-audio-card,codec { 68 sound-dai = <&rk809>; 69 }; 70 }; 71 72 sdio_pwrseq: sdio-pwrseq { 73 status = "okay"; 74 compatible = "mmc-pwrseq-simple"; 75 clocks = <&rk809 1>; 76 clock-names = "ext_clock"; 77 pinctrl-names = "default"; 78 pinctrl-0 = <&wifi_enable_h>; 79 reset-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>; 80 post-power-on-delay-ms = <100>; 81 power-off-delay-us = <5000000>; 82 }; 83 84 vcc3v3_pcie_p: vcc3v3-pcie-p-regulator { 85 compatible = "regulator-fixed"; 86 enable-active-high; 87 gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; 88 pinctrl-names = "default"; 89 pinctrl-0 = <&pcie_enable_h>; 90 regulator-name = "vcc3v3_pcie_p"; 91 regulator-min-microvolt = <3300000>; 92 regulator-max-microvolt = <3300000>; 93 vin-supply = <&vcc_3v3>; 94 }; 95 96 vcc5v0_in: vcc5v0-in-regulator { 97 compatible = "regulator-fixed"; 98 regulator-name = "vcc5v0_in"; 99 regulator-always-on; 100 regulator-boot-on; 101 regulator-min-microvolt = <5000000>; 102 regulator-max-microvolt = <5000000>; 103 }; 104 105 vcc5v0_sys: vcc5v0-sys-regulator { 106 compatible = "regulator-fixed"; 107 regulator-name = "vcc5v0_sys"; 108 regulator-always-on; 109 regulator-boot-on; 110 regulator-min-microvolt = <5000000>; 111 regulator-max-microvolt = <5000000>; 112 vin-supply = <&vcc5v0_in>; 113 }; 114 115 vcc3v3_sys: vcc3v3-sys-regulator { 116 compatible = "regulator-fixed"; 117 regulator-name = "vcc3v3_sys"; 118 regulator-min-microvolt = <3300000>; 119 regulator-max-microvolt = <3300000>; 120 regulator-always-on; 121 vin-supply = <&vcc5v0_sys>; 122 }; 123 124 vcc5v0_usb30_host: vcc5v0-usb30-host-regulator { 125 compatible = "regulator-fixed"; 126 regulator-name = "vcc5v0_usb30_host"; 127 enable-active-high; 128 gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; 129 pinctrl-names = "default"; 130 pinctrl-0 = <&vcc5v0_usb30_host_en_h>; 131 regulator-always-on; 132 regulator-min-microvolt = <5000000>; 133 regulator-max-microvolt = <5000000>; 134 vin-supply = <&vcc5v0_sys>; 135 }; 136 137 vcc5v0_usb_otg: vcc5v0-usb-otg-regulator { 138 compatible = "regulator-fixed"; 139 regulator-name = "vcc5v0_usb_otg"; 140 enable-active-high; 141 gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; 142 pinctrl-names = "default"; 143 pinctrl-0 = <&vcc5v0_usb_otg_en_h>; 144 regulator-always-on; 145 regulator-min-microvolt = <5000000>; 146 regulator-max-microvolt = <5000000>; 147 vin-supply = <&vcc5v0_sys>; 148 }; 149}; 150 151&combphy1 { 152 status = "okay"; 153}; 154 155&combphy2 { 156 status = "okay"; 157}; 158 159&cpu0 { 160 cpu-supply = <&vdd_cpu>; 161}; 162 163&cpu1 { 164 cpu-supply = <&vdd_cpu>; 165}; 166 167&cpu2 { 168 cpu-supply = <&vdd_cpu>; 169}; 170 171&cpu3 { 172 cpu-supply = <&vdd_cpu>; 173}; 174 175&gmac1 { 176 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>; 177 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>; 178 clock_in_out = "input"; 179 phy-mode = "rgmii"; 180 phy-supply = <&vcc_3v3>; 181 pinctrl-names = "default"; 182 pinctrl-0 = <&gmac1m1_miim 183 &gmac1m1_tx_bus2 184 &gmac1m1_rx_bus2 185 &gmac1m1_rgmii_clk 186 &gmac1m1_clkinout 187 &gmac1m1_rgmii_bus>; 188 snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; 189 snps,reset-active-low; 190 /* Reset time is 20ms, 100ms for rtl8211f, also works well here */ 191 snps,reset-delays-us = <0 20000 100000>; 192 tx_delay = <0x4f>; 193 rx_delay = <0x24>; 194 phy-handle = <&rgmii_phy1>; 195 status = "okay"; 196}; 197 198&gpu { 199 mali-supply = <&vdd_gpu>; 200 status = "okay"; 201}; 202 203&hdmi { 204 avdd-0v9-supply = <&vdda0v9_image>; 205 avdd-1v8-supply = <&vcca1v8_image>; 206 status = "okay"; 207}; 208 209&hdmi_in { 210 hdmi_in_vp0: endpoint { 211 remote-endpoint = <&vp0_out_hdmi>; 212 }; 213}; 214 215&hdmi_out { 216 hdmi_out_con: endpoint { 217 remote-endpoint = <&hdmi_con_in>; 218 }; 219}; 220 221&hdmi_sound { 222 status = "okay"; 223}; 224 225&i2c0 { 226 status = "okay"; 227 228 vdd_cpu: regulator@1c { 229 compatible = "tcs,tcs4525"; 230 reg = <0x1c>; 231 fcs,suspend-voltage-selector = <1>; 232 regulator-name = "vdd_cpu"; 233 regulator-min-microvolt = <800000>; 234 regulator-max-microvolt = <1150000>; 235 regulator-ramp-delay = <2300>; 236 regulator-always-on; 237 regulator-boot-on; 238 vin-supply = <&vcc5v0_sys>; 239 240 regulator-state-mem { 241 regulator-off-in-suspend; 242 }; 243 }; 244 245 rk809: pmic@20 { 246 compatible = "rockchip,rk809"; 247 reg = <0x20>; 248 interrupt-parent = <&gpio0>; 249 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; 250 assigned-clocks = <&cru I2S1_MCLKOUT_TX>; 251 assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; 252 clock-names = "mclk"; 253 clocks = <&cru I2S1_MCLKOUT_TX>; 254 clock-output-names = "rk808-clkout1", "rk808-clkout2"; 255 256 pinctrl-names = "default"; 257 pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>; 258 rockchip,system-power-controller; 259 #sound-dai-cells = <0>; 260 wakeup-source; 261 #clock-cells = <1>; 262 263 vcc1-supply = <&vcc3v3_sys>; 264 vcc2-supply = <&vcc3v3_sys>; 265 vcc3-supply = <&vcc3v3_sys>; 266 vcc4-supply = <&vcc3v3_sys>; 267 vcc5-supply = <&vcc3v3_sys>; 268 vcc6-supply = <&vcc3v3_sys>; 269 vcc7-supply = <&vcc3v3_sys>; 270 vcc8-supply = <&vcc3v3_sys>; 271 vcc9-supply = <&vcc3v3_sys>; 272 273 regulators { 274 vdd_log: DCDC_REG1 { 275 regulator-name = "vdd_log"; 276 regulator-always-on; 277 regulator-boot-on; 278 regulator-min-microvolt = <500000>; 279 regulator-max-microvolt = <1350000>; 280 regulator-ramp-delay = <6001>; 281 282 regulator-state-mem { 283 regulator-on-in-suspend; 284 regulator-suspend-microvolt = <900000>; 285 }; 286 }; 287 288 vdd_gpu: DCDC_REG2 { 289 regulator-name = "vdd_gpu"; 290 regulator-always-on; 291 regulator-boot-on; 292 regulator-min-microvolt = <900000>; 293 regulator-max-microvolt = <1350000>; 294 regulator-ramp-delay = <6001>; 295 296 regulator-state-mem { 297 regulator-off-in-suspend; 298 regulator-suspend-microvolt = <900000>; 299 }; 300 }; 301 302 vcc_ddr: DCDC_REG3 { 303 regulator-name = "vcc_ddr"; 304 regulator-always-on; 305 regulator-boot-on; 306 regulator-initial-mode = <0x2>; 307 regulator-state-mem { 308 regulator-on-in-suspend; 309 }; 310 }; 311 312 vdd_npu: DCDC_REG4 { 313 regulator-name = "vdd_npu"; 314 regulator-min-microvolt = <900000>; 315 regulator-max-microvolt = <1350000>; 316 regulator-initial-mode = <0x2>; 317 regulator-state-mem { 318 regulator-off-in-suspend; 319 }; 320 }; 321 322 vcc_1v8: DCDC_REG5 { 323 regulator-name = "vcc_1v8"; 324 regulator-always-on; 325 regulator-boot-on; 326 regulator-min-microvolt = <1800000>; 327 regulator-max-microvolt = <1800000>; 328 329 regulator-state-mem { 330 regulator-on-in-suspend; 331 regulator-suspend-microvolt = <1800000>; 332 }; 333 }; 334 335 vdda0v9_image: LDO_REG1 { 336 regulator-name = "vdda0v9_image"; 337 regulator-always-on; 338 regulator-boot-on; 339 regulator-min-microvolt = <900000>; 340 regulator-max-microvolt = <900000>; 341 342 regulator-state-mem { 343 regulator-on-in-suspend; 344 regulator-suspend-microvolt = <900000>; 345 }; 346 }; 347 348 vdda_0v9: LDO_REG2 { 349 regulator-name = "vdda_0v9"; 350 regulator-always-on; 351 regulator-boot-on; 352 regulator-min-microvolt = <900000>; 353 regulator-max-microvolt = <900000>; 354 355 regulator-state-mem { 356 regulator-on-in-suspend; 357 regulator-suspend-microvolt = <900000>; 358 }; 359 }; 360 361 vdda0v9_pmu: LDO_REG3 { 362 regulator-name = "vdda0v9_pmu"; 363 regulator-always-on; 364 regulator-boot-on; 365 regulator-min-microvolt = <900000>; 366 regulator-max-microvolt = <900000>; 367 regulator-state-mem { 368 regulator-on-in-suspend; 369 regulator-suspend-microvolt = <900000>; 370 }; 371 }; 372 373 vccio_acodec: LDO_REG4 { 374 regulator-name = "vccio_acodec"; 375 regulator-always-on; 376 regulator-boot-on; 377 regulator-min-microvolt = <3300000>; 378 regulator-max-microvolt = <3300000>; 379 380 regulator-state-mem { 381 regulator-on-in-suspend; 382 regulator-suspend-microvolt = <3300000>; 383 384 }; 385 }; 386 387 vccio_sd: LDO_REG5 { 388 regulator-name = "vccio_sd"; 389 regulator-always-on; 390 regulator-boot-on; 391 regulator-min-microvolt = <1800000>; 392 regulator-max-microvolt = <3300000>; 393 394 regulator-state-mem { 395 regulator-on-in-suspend; 396 regulator-suspend-microvolt = <3300000>; 397 }; 398 }; 399 400 vcc3v3_pmu: LDO_REG6 { 401 regulator-name = "vcc3v3_pmu"; 402 regulator-always-on; 403 regulator-boot-on; 404 regulator-min-microvolt = <3300000>; 405 regulator-max-microvolt = <3300000>; 406 407 regulator-state-mem { 408 regulator-on-in-suspend; 409 regulator-suspend-microvolt = <3300000>; 410 }; 411 }; 412 413 vcca_1v8: LDO_REG7 { 414 regulator-name = "vcca_1v8"; 415 regulator-always-on; 416 regulator-boot-on; 417 regulator-min-microvolt = <1800000>; 418 regulator-max-microvolt = <1800000>; 419 420 regulator-state-mem { 421 regulator-on-in-suspend; 422 regulator-suspend-microvolt = <1800000>; 423 }; 424 }; 425 426 vcca1v8_pmu: LDO_REG8 { 427 regulator-name = "vcca1v8_pmu"; 428 regulator-always-on; 429 regulator-boot-on; 430 regulator-min-microvolt = <1800000>; 431 regulator-max-microvolt = <1800000>; 432 433 regulator-state-mem { 434 regulator-on-in-suspend; 435 regulator-suspend-microvolt = <1800000>; 436 }; 437 }; 438 439 vcca1v8_image: LDO_REG9 { 440 regulator-name = "vcca1v8_image"; 441 regulator-always-on; 442 regulator-boot-on; 443 regulator-min-microvolt = <1800000>; 444 regulator-max-microvolt = <1800000>; 445 446 regulator-state-mem { 447 regulator-on-in-suspend; 448 regulator-suspend-microvolt = <1800000>; 449 }; 450 }; 451 452 vcc_3v3: SWITCH_REG1 { 453 regulator-boot-on; 454 regulator-name = "vcc_3v3"; 455 }; 456 457 vcc3v3_sd: SWITCH_REG2 { 458 regulator-name = "vcc3v3_sd"; 459 }; 460 }; 461 }; 462}; 463 464/* i2c2_m1 exposed on csi port, pulled up to vcc_3v3 */ 465&i2c2 { 466 pinctrl-names = "default"; 467 pinctrl-0 = <&i2c2m1_xfer>; 468 status = "okay"; 469}; 470 471/* i2c3_m1 exposed on dsi port, pulled up to vcc_3v3 */ 472&i2c3 { 473 pinctrl-names = "default"; 474 pinctrl-0 = <&i2c3m1_xfer>; 475 status = "okay"; 476}; 477 478/* 479 * i2c4_m0 is exposed on PI40, pulled up to vcc_3v3 480 * pin 27 - i2c4_sda_m0 481 * pin 28 - i2c4_scl_m0 482 */ 483&i2c4 { 484 status = "okay"; 485}; 486 487/* 488 * i2c5_m0 is exposed on PI40 489 * pin 29 - i2c5_scl_m0 490 * pin 31 - i2c5_sda_m0 491 */ 492&i2c5 { 493 status = "disabled"; 494}; 495 496&i2s0_8ch { 497 status = "okay"; 498}; 499 500&i2s1_8ch { 501 pinctrl-names = "default"; 502 pinctrl-0 = <&i2s1m0_sclktx 503 &i2s1m0_lrcktx 504 &i2s1m0_sdi0 505 &i2s1m0_sdo0>; 506 rockchip,trcm-sync-tx-only; 507 status = "okay"; 508}; 509 510&mdio1 { 511 rgmii_phy1: ethernet-phy@1 { 512 compatible = "ethernet-phy-ieee802.3-c22"; 513 reg = <0x1>; 514 }; 515}; 516 517&pcie2x1 { 518 pinctrl-names = "default"; 519 pinctrl-0 = <&pcie_reset_h>; 520 reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; 521 vpcie3v3-supply = <&vcc3v3_pcie_p>; 522 status = "okay"; 523}; 524 525&pinctrl { 526 bt { 527 bt_enable_h: bt-enable-h { 528 rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; 529 }; 530 531 bt_host_wake_l: bt-host-wake-l { 532 rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_down>; 533 }; 534 535 bt_wake_l: bt-wake-l { 536 rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; 537 }; 538 }; 539 540 leds { 541 user_led_enable_h: user-led-enable-h { 542 rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; 543 }; 544 }; 545 546 pcie { 547 pcie_enable_h: pcie-enable-h { 548 rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; 549 }; 550 551 pcie_reset_h: pcie-reset-h { 552 rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 553 }; 554 }; 555 556 pmic { 557 pmic_int: pmic_int { 558 rockchip,pins = 559 <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 560 }; 561 }; 562 563 sdio-pwrseq { 564 wifi_enable_h: wifi-enable-h { 565 rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; 566 }; 567 }; 568 569 usb { 570 vcc5v0_usb30_host_en_h: vcc5v0-usb30-host-en_h { 571 rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; 572 }; 573 574 vcc5v0_usb_otg_en_h: vcc5v0-usb-otg-en_h { 575 rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; 576 }; 577 }; 578}; 579 580&pmu_io_domains { 581 status = "okay"; 582 pmuio1-supply = <&vcc3v3_pmu>; 583 pmuio2-supply = <&vcca1v8_pmu>; 584 vccio1-supply = <&vccio_acodec>; 585 vccio2-supply = <&vcc_1v8>; 586 vccio3-supply = <&vccio_sd>; 587 vccio4-supply = <&vcca1v8_pmu>; 588 vccio5-supply = <&vcc_3v3>; 589 vccio6-supply = <&vcc_3v3>; 590 vccio7-supply = <&vcc_3v3>; 591}; 592 593&saradc { 594 vref-supply = <&vcca_1v8>; 595 status = "okay"; 596}; 597 598&sdhci { 599 bus-width = <8>; 600 mmc-hs200-1_8v; 601 non-removable; 602 vmmc-supply = <&vcc_3v3>; 603 vqmmc-supply = <&vcc_1v8>; 604 status = "okay"; 605}; 606 607&sdmmc0 { 608 bus-width = <4>; 609 cap-sd-highspeed; 610 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; 611 disable-wp; 612 pinctrl-names = "default"; 613 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; 614 sd-uhs-sdr50; 615 vmmc-supply = <&vcc3v3_sd>; 616 vqmmc-supply = <&vccio_sd>; 617 status = "okay"; 618}; 619 620&sdmmc1 { 621 bus-width = <4>; 622 cap-sd-highspeed; 623 cap-sdio-irq; 624 keep-power-in-suspend; 625 mmc-pwrseq = <&sdio_pwrseq>; 626 non-removable; 627 pinctrl-names = "default"; 628 pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; 629 vmmc-supply = <&vcc3v3_sys>; 630 vqmmc-supply = <&vcca1v8_pmu>; 631 status = "okay"; 632}; 633 634&sfc { 635 pinctrl-0 = <&fspi_pins>; 636 pinctrl-names = "default"; 637 #address-cells = <1>; 638 #size-cells = <0>; 639 status = "okay"; 640 641 flash@0 { 642 compatible = "jedec,spi-nor"; 643 reg = <0>; 644 spi-max-frequency = <24000000>; 645 spi-rx-bus-width = <4>; 646 spi-tx-bus-width = <1>; 647 }; 648}; 649 650&tsadc { 651 status = "okay"; 652}; 653 654&uart1 { 655 pinctrl-names = "default"; 656 pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>; 657 status = "okay"; 658 uart-has-rtscts; 659 660 bluetooth { 661 compatible = "brcm,bcm4345c5"; 662 clocks = <&rk809 1>; 663 clock-names = "lpo"; 664 device-wakeup-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; 665 host-wakeup-gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; 666 shutdown-gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; 667 pinctrl-names = "default"; 668 pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; 669 vbat-supply = <&vcc3v3_sys>; 670 vddio-supply = <&vcca1v8_pmu>; 671 }; 672}; 673 674/* 675 * uart2_m0 is exposed on PI40 676 * pin 8 - uart2_tx_m0 677 * pin 10 - uart2_rx_m0 678 */ 679&uart2 { 680 status = "okay"; 681}; 682 683&usb2phy0_host { 684 phy-supply = <&vcc5v0_usb30_host>; 685 status = "okay"; 686}; 687 688&usb2phy0_otg { 689 phy-supply = <&vcc5v0_usb_otg>; 690 status = "okay"; 691}; 692 693&usb2phy1_otg { 694 phy-supply = <&vcc5v0_usb30_host>; 695 status = "okay"; 696}; 697 698&usb2phy0 { 699 status = "okay"; 700}; 701 702&usb2phy1 { 703 status = "okay"; 704}; 705 706&usb_host0_xhci { 707 status = "okay"; 708}; 709 710&usb_host1_xhci { 711 status = "okay"; 712}; 713 714&usb_host0_ehci { 715 status = "okay"; 716}; 717 718&usb_host0_ohci { 719 status = "okay"; 720}; 721 722&vop { 723 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; 724 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; 725 status = "okay"; 726}; 727 728&vop_mmu { 729 status = "okay"; 730}; 731 732&vp0 { 733 vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 734 reg = <ROCKCHIP_VOP2_EP_HDMI0>; 735 remote-endpoint = <&hdmi_in_vp0>; 736 }; 737}; 738