1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the r8a7745 SoC 4 * 5 * Copyright (C) 2016-2017 Cogent Embedded Inc. 6 */ 7 8#include <dt-bindings/interrupt-controller/irq.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/clock/r8a7745-cpg-mssr.h> 11#include <dt-bindings/power/r8a7745-sysc.h> 12 13/ { 14 compatible = "renesas,r8a7745"; 15 #address-cells = <2>; 16 #size-cells = <2>; 17 18 aliases { 19 i2c0 = &i2c0; 20 i2c1 = &i2c1; 21 i2c2 = &i2c2; 22 i2c3 = &i2c3; 23 i2c4 = &i2c4; 24 i2c5 = &i2c5; 25 i2c6 = &iic0; 26 i2c7 = &iic1; 27 spi0 = &qspi; 28 spi1 = &msiof0; 29 spi2 = &msiof1; 30 spi3 = &msiof2; 31 vin0 = &vin0; 32 vin1 = &vin1; 33 }; 34 35 /* 36 * The external audio clocks are configured as 0 Hz fixed 37 * frequency clocks by default. Boards that provide audio 38 * clocks should override them. 39 */ 40 audio_clka: audio_clka { 41 compatible = "fixed-clock"; 42 #clock-cells = <0>; 43 clock-frequency = <0>; 44 }; 45 audio_clkb: audio_clkb { 46 compatible = "fixed-clock"; 47 #clock-cells = <0>; 48 clock-frequency = <0>; 49 }; 50 audio_clkc: audio_clkc { 51 compatible = "fixed-clock"; 52 #clock-cells = <0>; 53 clock-frequency = <0>; 54 }; 55 56 /* External CAN clock */ 57 can_clk: can { 58 compatible = "fixed-clock"; 59 #clock-cells = <0>; 60 /* This value must be overridden by the board. */ 61 clock-frequency = <0>; 62 }; 63 64 cpus { 65 #address-cells = <1>; 66 #size-cells = <0>; 67 68 cpu0: cpu@0 { 69 device_type = "cpu"; 70 compatible = "arm,cortex-a7"; 71 reg = <0>; 72 clock-frequency = <1000000000>; 73 clocks = <&cpg CPG_CORE R8A7745_CLK_Z2>; 74 power-domains = <&sysc R8A7745_PD_CA7_CPU0>; 75 enable-method = "renesas,apmu"; 76 next-level-cache = <&L2_CA7>; 77 }; 78 79 cpu1: cpu@1 { 80 device_type = "cpu"; 81 compatible = "arm,cortex-a7"; 82 reg = <1>; 83 clock-frequency = <1000000000>; 84 clocks = <&cpg CPG_CORE R8A7745_CLK_Z2>; 85 power-domains = <&sysc R8A7745_PD_CA7_CPU1>; 86 enable-method = "renesas,apmu"; 87 next-level-cache = <&L2_CA7>; 88 }; 89 90 L2_CA7: cache-controller-0 { 91 compatible = "cache"; 92 cache-unified; 93 cache-level = <2>; 94 power-domains = <&sysc R8A7745_PD_CA7_SCU>; 95 }; 96 }; 97 98 /* External root clock */ 99 extal_clk: extal { 100 compatible = "fixed-clock"; 101 #clock-cells = <0>; 102 /* This value must be overridden by the board. */ 103 clock-frequency = <0>; 104 }; 105 106 pmu { 107 compatible = "arm,cortex-a7-pmu"; 108 interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 109 <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 110 interrupt-affinity = <&cpu0>, <&cpu1>; 111 }; 112 113 /* External SCIF clock */ 114 scif_clk: scif { 115 compatible = "fixed-clock"; 116 #clock-cells = <0>; 117 /* This value must be overridden by the board. */ 118 clock-frequency = <0>; 119 }; 120 121 soc { 122 compatible = "simple-bus"; 123 interrupt-parent = <&gic>; 124 125 #address-cells = <2>; 126 #size-cells = <2>; 127 ranges; 128 129 gpio0: gpio@e6050000 { 130 compatible = "renesas,gpio-r8a7745", 131 "renesas,rcar-gen2-gpio"; 132 reg = <0 0xe6050000 0 0x50>; 133 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 134 #gpio-cells = <2>; 135 gpio-controller; 136 gpio-ranges = <&pfc 0 0 32>; 137 #interrupt-cells = <2>; 138 interrupt-controller; 139 clocks = <&cpg CPG_MOD 912>; 140 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 141 resets = <&cpg 912>; 142 }; 143 144 gpio1: gpio@e6051000 { 145 compatible = "renesas,gpio-r8a7745", 146 "renesas,rcar-gen2-gpio"; 147 reg = <0 0xe6051000 0 0x50>; 148 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 149 #gpio-cells = <2>; 150 gpio-controller; 151 gpio-ranges = <&pfc 0 32 26>; 152 #interrupt-cells = <2>; 153 interrupt-controller; 154 clocks = <&cpg CPG_MOD 911>; 155 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 156 resets = <&cpg 911>; 157 }; 158 159 gpio2: gpio@e6052000 { 160 compatible = "renesas,gpio-r8a7745", 161 "renesas,rcar-gen2-gpio"; 162 reg = <0 0xe6052000 0 0x50>; 163 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 164 #gpio-cells = <2>; 165 gpio-controller; 166 gpio-ranges = <&pfc 0 64 32>; 167 #interrupt-cells = <2>; 168 interrupt-controller; 169 clocks = <&cpg CPG_MOD 910>; 170 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 171 resets = <&cpg 910>; 172 }; 173 174 gpio3: gpio@e6053000 { 175 compatible = "renesas,gpio-r8a7745", 176 "renesas,rcar-gen2-gpio"; 177 reg = <0 0xe6053000 0 0x50>; 178 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 179 #gpio-cells = <2>; 180 gpio-controller; 181 gpio-ranges = <&pfc 0 96 32>; 182 #interrupt-cells = <2>; 183 interrupt-controller; 184 clocks = <&cpg CPG_MOD 909>; 185 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 186 resets = <&cpg 909>; 187 }; 188 189 gpio4: gpio@e6054000 { 190 compatible = "renesas,gpio-r8a7745", 191 "renesas,rcar-gen2-gpio"; 192 reg = <0 0xe6054000 0 0x50>; 193 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 194 #gpio-cells = <2>; 195 gpio-controller; 196 gpio-ranges = <&pfc 0 128 32>; 197 #interrupt-cells = <2>; 198 interrupt-controller; 199 clocks = <&cpg CPG_MOD 908>; 200 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 201 resets = <&cpg 908>; 202 }; 203 204 gpio5: gpio@e6055000 { 205 compatible = "renesas,gpio-r8a7745", 206 "renesas,rcar-gen2-gpio"; 207 reg = <0 0xe6055000 0 0x50>; 208 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 209 #gpio-cells = <2>; 210 gpio-controller; 211 gpio-ranges = <&pfc 0 160 28>; 212 #interrupt-cells = <2>; 213 interrupt-controller; 214 clocks = <&cpg CPG_MOD 907>; 215 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 216 resets = <&cpg 907>; 217 }; 218 219 gpio6: gpio@e6055400 { 220 compatible = "renesas,gpio-r8a7745", 221 "renesas,rcar-gen2-gpio"; 222 reg = <0 0xe6055400 0 0x50>; 223 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 224 #gpio-cells = <2>; 225 gpio-controller; 226 gpio-ranges = <&pfc 0 192 26>; 227 #interrupt-cells = <2>; 228 interrupt-controller; 229 clocks = <&cpg CPG_MOD 905>; 230 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 231 resets = <&cpg 905>; 232 }; 233 234 pfc: pinctrl@e6060000 { 235 compatible = "renesas,pfc-r8a7745"; 236 reg = <0 0xe6060000 0 0x11c>; 237 }; 238 239 tpu: pwm@e60f0000 { 240 compatible = "renesas,tpu-r8a7745", "renesas,tpu"; 241 reg = <0 0xe60f0000 0 0x148>; 242 clocks = <&cpg CPG_MOD 304>; 243 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 244 resets = <&cpg 304>; 245 #pwm-cells = <3>; 246 status = "disabled"; 247 }; 248 249 cpg: clock-controller@e6150000 { 250 compatible = "renesas,r8a7745-cpg-mssr"; 251 reg = <0 0xe6150000 0 0x1000>; 252 clocks = <&extal_clk>, <&usb_extal_clk>; 253 clock-names = "extal", "usb_extal"; 254 #clock-cells = <2>; 255 #power-domain-cells = <0>; 256 #reset-cells = <1>; 257 }; 258 259 apmu@e6151000 { 260 compatible = "renesas,r8a7745-apmu", "renesas,apmu"; 261 reg = <0 0xe6151000 0 0x188>; 262 cpus = <&cpu0>, <&cpu1>; 263 }; 264 265 rst: reset-controller@e6160000 { 266 compatible = "renesas,r8a7745-rst"; 267 reg = <0 0xe6160000 0 0x100>; 268 }; 269 270 rwdt: watchdog@e6020000 { 271 compatible = "renesas,r8a7745-wdt", 272 "renesas,rcar-gen2-wdt"; 273 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 274 reg = <0 0xe6020000 0 0x0c>; 275 clocks = <&cpg CPG_MOD 402>; 276 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 277 resets = <&cpg 402>; 278 status = "disabled"; 279 }; 280 281 sysc: system-controller@e6180000 { 282 compatible = "renesas,r8a7745-sysc"; 283 reg = <0 0xe6180000 0 0x200>; 284 #power-domain-cells = <1>; 285 }; 286 287 irqc: interrupt-controller@e61c0000 { 288 compatible = "renesas,irqc-r8a7745", "renesas,irqc"; 289 #interrupt-cells = <2>; 290 interrupt-controller; 291 reg = <0 0xe61c0000 0 0x200>; 292 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 293 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 294 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 295 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 296 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 297 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 298 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 299 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, 300 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 301 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 302 clocks = <&cpg CPG_MOD 407>; 303 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 304 resets = <&cpg 407>; 305 }; 306 307 tmu0: timer@e61e0000 { 308 compatible = "renesas,tmu-r8a7745", "renesas,tmu"; 309 reg = <0 0xe61e0000 0 0x30>; 310 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 311 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 312 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 313 interrupt-names = "tuni0", "tuni1", "tuni2"; 314 clocks = <&cpg CPG_MOD 125>; 315 clock-names = "fck"; 316 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 317 resets = <&cpg 125>; 318 status = "disabled"; 319 }; 320 321 tmu1: timer@fff60000 { 322 compatible = "renesas,tmu-r8a7745", "renesas,tmu"; 323 reg = <0 0xfff60000 0 0x30>; 324 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 325 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 326 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 327 <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 328 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 329 clocks = <&cpg CPG_MOD 111>; 330 clock-names = "fck"; 331 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 332 resets = <&cpg 111>; 333 status = "disabled"; 334 }; 335 336 tmu2: timer@fff70000 { 337 compatible = "renesas,tmu-r8a7745", "renesas,tmu"; 338 reg = <0 0xfff70000 0 0x30>; 339 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 340 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 341 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 342 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; 343 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 344 clocks = <&cpg CPG_MOD 122>; 345 clock-names = "fck"; 346 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 347 resets = <&cpg 122>; 348 status = "disabled"; 349 }; 350 351 tmu3: timer@fff80000 { 352 compatible = "renesas,tmu-r8a7745", "renesas,tmu"; 353 reg = <0 0xfff80000 0 0x30>; 354 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 355 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 356 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 357 interrupt-names = "tuni0", "tuni1", "tuni2"; 358 clocks = <&cpg CPG_MOD 121>; 359 clock-names = "fck"; 360 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 361 resets = <&cpg 121>; 362 status = "disabled"; 363 }; 364 365 ipmmu_sy0: iommu@e6280000 { 366 compatible = "renesas,ipmmu-r8a7745", 367 "renesas,ipmmu-vmsa"; 368 reg = <0 0xe6280000 0 0x1000>; 369 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, 370 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; 371 #iommu-cells = <1>; 372 status = "disabled"; 373 }; 374 375 ipmmu_sy1: iommu@e6290000 { 376 compatible = "renesas,ipmmu-r8a7745", 377 "renesas,ipmmu-vmsa"; 378 reg = <0 0xe6290000 0 0x1000>; 379 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 380 #iommu-cells = <1>; 381 status = "disabled"; 382 }; 383 384 ipmmu_ds: iommu@e6740000 { 385 compatible = "renesas,ipmmu-r8a7745", 386 "renesas,ipmmu-vmsa"; 387 reg = <0 0xe6740000 0 0x1000>; 388 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, 389 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; 390 #iommu-cells = <1>; 391 status = "disabled"; 392 }; 393 394 ipmmu_mp: iommu@ec680000 { 395 compatible = "renesas,ipmmu-r8a7745", 396 "renesas,ipmmu-vmsa"; 397 reg = <0 0xec680000 0 0x1000>; 398 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; 399 #iommu-cells = <1>; 400 status = "disabled"; 401 }; 402 403 ipmmu_mx: iommu@fe951000 { 404 compatible = "renesas,ipmmu-r8a7745", 405 "renesas,ipmmu-vmsa"; 406 reg = <0 0xfe951000 0 0x1000>; 407 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, 408 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; 409 #iommu-cells = <1>; 410 status = "disabled"; 411 }; 412 413 ipmmu_gp: iommu@e62a0000 { 414 compatible = "renesas,ipmmu-r8a7745", 415 "renesas,ipmmu-vmsa"; 416 reg = <0 0xe62a0000 0 0x1000>; 417 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 418 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; 419 #iommu-cells = <1>; 420 status = "disabled"; 421 }; 422 423 icram0: sram@e63a0000 { 424 compatible = "mmio-sram"; 425 reg = <0 0xe63a0000 0 0x12000>; 426 #address-cells = <1>; 427 #size-cells = <1>; 428 ranges = <0 0 0xe63a0000 0x12000>; 429 }; 430 431 icram1: sram@e63c0000 { 432 compatible = "mmio-sram"; 433 reg = <0 0xe63c0000 0 0x1000>; 434 #address-cells = <1>; 435 #size-cells = <1>; 436 ranges = <0 0 0xe63c0000 0x1000>; 437 438 smp-sram@0 { 439 compatible = "renesas,smp-sram"; 440 reg = <0 0x100>; 441 }; 442 }; 443 444 icram2: sram@e6300000 { 445 compatible = "mmio-sram"; 446 reg = <0 0xe6300000 0 0x40000>; 447 #address-cells = <1>; 448 #size-cells = <1>; 449 ranges = <0 0 0xe6300000 0x40000>; 450 }; 451 i2c0: i2c@e6508000 { 452 #address-cells = <1>; 453 #size-cells = <0>; 454 compatible = "renesas,i2c-r8a7745", 455 "renesas,rcar-gen2-i2c"; 456 reg = <0 0xe6508000 0 0x40>; 457 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 458 clocks = <&cpg CPG_MOD 931>; 459 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 460 resets = <&cpg 931>; 461 i2c-scl-internal-delay-ns = <6>; 462 status = "disabled"; 463 }; 464 465 i2c1: i2c@e6518000 { 466 #address-cells = <1>; 467 #size-cells = <0>; 468 compatible = "renesas,i2c-r8a7745", 469 "renesas,rcar-gen2-i2c"; 470 reg = <0 0xe6518000 0 0x40>; 471 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 472 clocks = <&cpg CPG_MOD 930>; 473 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 474 resets = <&cpg 930>; 475 i2c-scl-internal-delay-ns = <6>; 476 status = "disabled"; 477 }; 478 479 i2c2: i2c@e6530000 { 480 #address-cells = <1>; 481 #size-cells = <0>; 482 compatible = "renesas,i2c-r8a7745", 483 "renesas,rcar-gen2-i2c"; 484 reg = <0 0xe6530000 0 0x40>; 485 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 486 clocks = <&cpg CPG_MOD 929>; 487 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 488 resets = <&cpg 929>; 489 i2c-scl-internal-delay-ns = <6>; 490 status = "disabled"; 491 }; 492 493 i2c3: i2c@e6540000 { 494 #address-cells = <1>; 495 #size-cells = <0>; 496 compatible = "renesas,i2c-r8a7745", 497 "renesas,rcar-gen2-i2c"; 498 reg = <0 0xe6540000 0 0x40>; 499 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 500 clocks = <&cpg CPG_MOD 928>; 501 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 502 resets = <&cpg 928>; 503 i2c-scl-internal-delay-ns = <6>; 504 status = "disabled"; 505 }; 506 507 i2c4: i2c@e6520000 { 508 #address-cells = <1>; 509 #size-cells = <0>; 510 compatible = "renesas,i2c-r8a7745", 511 "renesas,rcar-gen2-i2c"; 512 reg = <0 0xe6520000 0 0x40>; 513 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 514 clocks = <&cpg CPG_MOD 927>; 515 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 516 resets = <&cpg 927>; 517 i2c-scl-internal-delay-ns = <6>; 518 status = "disabled"; 519 }; 520 521 i2c5: i2c@e6528000 { 522 #address-cells = <1>; 523 #size-cells = <0>; 524 compatible = "renesas,i2c-r8a7745", 525 "renesas,rcar-gen2-i2c"; 526 reg = <0 0xe6528000 0 0x40>; 527 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 528 clocks = <&cpg CPG_MOD 925>; 529 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 530 resets = <&cpg 925>; 531 i2c-scl-internal-delay-ns = <6>; 532 status = "disabled"; 533 }; 534 535 iic0: i2c@e6500000 { 536 #address-cells = <1>; 537 #size-cells = <0>; 538 compatible = "renesas,iic-r8a7745", 539 "renesas,rcar-gen2-iic", 540 "renesas,rmobile-iic"; 541 reg = <0 0xe6500000 0 0x425>; 542 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 543 clocks = <&cpg CPG_MOD 318>; 544 dmas = <&dmac0 0x61>, <&dmac0 0x62>, 545 <&dmac1 0x61>, <&dmac1 0x62>; 546 dma-names = "tx", "rx", "tx", "rx"; 547 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 548 resets = <&cpg 318>; 549 status = "disabled"; 550 }; 551 552 iic1: i2c@e6510000 { 553 #address-cells = <1>; 554 #size-cells = <0>; 555 compatible = "renesas,iic-r8a7745", 556 "renesas,rcar-gen2-iic", 557 "renesas,rmobile-iic"; 558 reg = <0 0xe6510000 0 0x425>; 559 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 560 clocks = <&cpg CPG_MOD 323>; 561 dmas = <&dmac0 0x65>, <&dmac0 0x66>, 562 <&dmac1 0x65>, <&dmac1 0x66>; 563 dma-names = "tx", "rx", "tx", "rx"; 564 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 565 resets = <&cpg 323>; 566 status = "disabled"; 567 }; 568 569 hsusb: usb@e6590000 { 570 compatible = "renesas,usbhs-r8a7745", 571 "renesas,rcar-gen2-usbhs"; 572 reg = <0 0xe6590000 0 0x100>; 573 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 574 clocks = <&cpg CPG_MOD 704>; 575 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 576 <&usb_dmac1 0>, <&usb_dmac1 1>; 577 dma-names = "ch0", "ch1", "ch2", "ch3"; 578 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 579 resets = <&cpg 704>; 580 renesas,buswait = <4>; 581 phys = <&usb0 1>; 582 phy-names = "usb"; 583 status = "disabled"; 584 }; 585 586 usbphy: usb-phy-controller@e6590100 { 587 compatible = "renesas,usb-phy-r8a7745", 588 "renesas,rcar-gen2-usb-phy"; 589 reg = <0 0xe6590100 0 0x100>; 590 #address-cells = <1>; 591 #size-cells = <0>; 592 clocks = <&cpg CPG_MOD 704>; 593 clock-names = "usbhs"; 594 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 595 resets = <&cpg 704>; 596 status = "disabled"; 597 598 usb0: usb-phy@0 { 599 reg = <0>; 600 #phy-cells = <1>; 601 }; 602 usb2: usb-phy@2 { 603 reg = <2>; 604 #phy-cells = <1>; 605 }; 606 }; 607 608 usb_dmac0: dma-controller@e65a0000 { 609 compatible = "renesas,r8a7745-usb-dmac", 610 "renesas,usb-dmac"; 611 reg = <0 0xe65a0000 0 0x100>; 612 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 613 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 614 interrupt-names = "ch0", "ch1"; 615 clocks = <&cpg CPG_MOD 330>; 616 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 617 resets = <&cpg 330>; 618 #dma-cells = <1>; 619 dma-channels = <2>; 620 }; 621 622 usb_dmac1: dma-controller@e65b0000 { 623 compatible = "renesas,r8a7745-usb-dmac", 624 "renesas,usb-dmac"; 625 reg = <0 0xe65b0000 0 0x100>; 626 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 627 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 628 interrupt-names = "ch0", "ch1"; 629 clocks = <&cpg CPG_MOD 331>; 630 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 631 resets = <&cpg 331>; 632 #dma-cells = <1>; 633 dma-channels = <2>; 634 }; 635 636 dmac0: dma-controller@e6700000 { 637 compatible = "renesas,dmac-r8a7745", 638 "renesas,rcar-dmac"; 639 reg = <0 0xe6700000 0 0x20000>; 640 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, 641 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 642 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 643 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 644 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 645 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 646 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 647 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 648 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 649 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 650 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 651 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 652 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 653 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 654 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 655 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; 656 interrupt-names = "error", 657 "ch0", "ch1", "ch2", "ch3", 658 "ch4", "ch5", "ch6", "ch7", 659 "ch8", "ch9", "ch10", "ch11", 660 "ch12", "ch13", "ch14"; 661 clocks = <&cpg CPG_MOD 219>; 662 clock-names = "fck"; 663 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 664 resets = <&cpg 219>; 665 #dma-cells = <1>; 666 dma-channels = <15>; 667 }; 668 669 dmac1: dma-controller@e6720000 { 670 compatible = "renesas,dmac-r8a7745", 671 "renesas,rcar-dmac"; 672 reg = <0 0xe6720000 0 0x20000>; 673 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 674 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 675 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 676 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 677 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 678 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 679 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 680 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 681 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 682 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 683 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 684 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 685 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 686 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 687 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 688 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; 689 interrupt-names = "error", 690 "ch0", "ch1", "ch2", "ch3", 691 "ch4", "ch5", "ch6", "ch7", 692 "ch8", "ch9", "ch10", "ch11", 693 "ch12", "ch13", "ch14"; 694 clocks = <&cpg CPG_MOD 218>; 695 clock-names = "fck"; 696 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 697 resets = <&cpg 218>; 698 #dma-cells = <1>; 699 dma-channels = <15>; 700 }; 701 702 avb: ethernet@e6800000 { 703 compatible = "renesas,etheravb-r8a7745", 704 "renesas,etheravb-rcar-gen2"; 705 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; 706 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 707 clocks = <&cpg CPG_MOD 812>; 708 clock-names = "fck"; 709 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 710 resets = <&cpg 812>; 711 #address-cells = <1>; 712 #size-cells = <0>; 713 status = "disabled"; 714 }; 715 716 qspi: spi@e6b10000 { 717 compatible = "renesas,qspi-r8a7745", "renesas,qspi"; 718 reg = <0 0xe6b10000 0 0x2c>; 719 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 720 clocks = <&cpg CPG_MOD 917>; 721 dmas = <&dmac0 0x17>, <&dmac0 0x18>, 722 <&dmac1 0x17>, <&dmac1 0x18>; 723 dma-names = "tx", "rx", "tx", "rx"; 724 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 725 num-cs = <1>; 726 #address-cells = <1>; 727 #size-cells = <0>; 728 resets = <&cpg 917>; 729 status = "disabled"; 730 }; 731 732 scifa0: serial@e6c40000 { 733 compatible = "renesas,scifa-r8a7745", 734 "renesas,rcar-gen2-scifa", "renesas,scifa"; 735 reg = <0 0xe6c40000 0 0x40>; 736 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 737 clocks = <&cpg CPG_MOD 204>; 738 clock-names = "fck"; 739 dmas = <&dmac0 0x21>, <&dmac0 0x22>, 740 <&dmac1 0x21>, <&dmac1 0x22>; 741 dma-names = "tx", "rx", "tx", "rx"; 742 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 743 resets = <&cpg 204>; 744 status = "disabled"; 745 }; 746 747 scifa1: serial@e6c50000 { 748 compatible = "renesas,scifa-r8a7745", 749 "renesas,rcar-gen2-scifa", "renesas,scifa"; 750 reg = <0 0xe6c50000 0 0x40>; 751 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 752 clocks = <&cpg CPG_MOD 203>; 753 clock-names = "fck"; 754 dmas = <&dmac0 0x25>, <&dmac0 0x26>, 755 <&dmac1 0x25>, <&dmac1 0x26>; 756 dma-names = "tx", "rx", "tx", "rx"; 757 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 758 resets = <&cpg 203>; 759 status = "disabled"; 760 }; 761 762 scifa2: serial@e6c60000 { 763 compatible = "renesas,scifa-r8a7745", 764 "renesas,rcar-gen2-scifa", "renesas,scifa"; 765 reg = <0 0xe6c60000 0 0x40>; 766 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; 767 clocks = <&cpg CPG_MOD 202>; 768 clock-names = "fck"; 769 dmas = <&dmac0 0x27>, <&dmac0 0x28>, 770 <&dmac1 0x27>, <&dmac1 0x28>; 771 dma-names = "tx", "rx", "tx", "rx"; 772 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 773 resets = <&cpg 202>; 774 status = "disabled"; 775 }; 776 777 scifa3: serial@e6c70000 { 778 compatible = "renesas,scifa-r8a7745", 779 "renesas,rcar-gen2-scifa", "renesas,scifa"; 780 reg = <0 0xe6c70000 0 0x40>; 781 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 782 clocks = <&cpg CPG_MOD 1106>; 783 clock-names = "fck"; 784 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>, 785 <&dmac1 0x1b>, <&dmac1 0x1c>; 786 dma-names = "tx", "rx", "tx", "rx"; 787 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 788 resets = <&cpg 1106>; 789 status = "disabled"; 790 }; 791 792 scifa4: serial@e6c78000 { 793 compatible = "renesas,scifa-r8a7745", 794 "renesas,rcar-gen2-scifa", "renesas,scifa"; 795 reg = <0 0xe6c78000 0 0x40>; 796 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 797 clocks = <&cpg CPG_MOD 1107>; 798 clock-names = "fck"; 799 dmas = <&dmac0 0x1f>, <&dmac0 0x20>, 800 <&dmac1 0x1f>, <&dmac1 0x20>; 801 dma-names = "tx", "rx", "tx", "rx"; 802 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 803 resets = <&cpg 1107>; 804 status = "disabled"; 805 }; 806 807 scifa5: serial@e6c80000 { 808 compatible = "renesas,scifa-r8a7745", 809 "renesas,rcar-gen2-scifa", "renesas,scifa"; 810 reg = <0 0xe6c80000 0 0x40>; 811 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 812 clocks = <&cpg CPG_MOD 1108>; 813 clock-names = "fck"; 814 dmas = <&dmac0 0x23>, <&dmac0 0x24>, 815 <&dmac1 0x23>, <&dmac1 0x24>; 816 dma-names = "tx", "rx", "tx", "rx"; 817 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 818 resets = <&cpg 1108>; 819 status = "disabled"; 820 }; 821 822 scifb0: serial@e6c20000 { 823 compatible = "renesas,scifb-r8a7745", 824 "renesas,rcar-gen2-scifb", "renesas,scifb"; 825 reg = <0 0xe6c20000 0 0x100>; 826 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 827 clocks = <&cpg CPG_MOD 206>; 828 clock-names = "fck"; 829 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, 830 <&dmac1 0x3d>, <&dmac1 0x3e>; 831 dma-names = "tx", "rx", "tx", "rx"; 832 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 833 resets = <&cpg 206>; 834 status = "disabled"; 835 }; 836 837 scifb1: serial@e6c30000 { 838 compatible = "renesas,scifb-r8a7745", 839 "renesas,rcar-gen2-scifb", "renesas,scifb"; 840 reg = <0 0xe6c30000 0 0x100>; 841 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; 842 clocks = <&cpg CPG_MOD 207>; 843 clock-names = "fck"; 844 dmas = <&dmac0 0x19>, <&dmac0 0x1a>, 845 <&dmac1 0x19>, <&dmac1 0x1a>; 846 dma-names = "tx", "rx", "tx", "rx"; 847 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 848 resets = <&cpg 207>; 849 status = "disabled"; 850 }; 851 852 scifb2: serial@e6ce0000 { 853 compatible = "renesas,scifb-r8a7745", 854 "renesas,rcar-gen2-scifb", "renesas,scifb"; 855 reg = <0 0xe6ce0000 0 0x100>; 856 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 857 clocks = <&cpg CPG_MOD 216>; 858 clock-names = "fck"; 859 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, 860 <&dmac1 0x1d>, <&dmac1 0x1e>; 861 dma-names = "tx", "rx", "tx", "rx"; 862 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 863 resets = <&cpg 216>; 864 status = "disabled"; 865 }; 866 867 scif0: serial@e6e60000 { 868 compatible = "renesas,scif-r8a7745", 869 "renesas,rcar-gen2-scif", "renesas,scif"; 870 reg = <0 0xe6e60000 0 0x40>; 871 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 872 clocks = <&cpg CPG_MOD 721>, 873 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 874 clock-names = "fck", "brg_int", "scif_clk"; 875 dmas = <&dmac0 0x29>, <&dmac0 0x2a>, 876 <&dmac1 0x29>, <&dmac1 0x2a>; 877 dma-names = "tx", "rx", "tx", "rx"; 878 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 879 resets = <&cpg 721>; 880 status = "disabled"; 881 }; 882 883 scif1: serial@e6e68000 { 884 compatible = "renesas,scif-r8a7745", 885 "renesas,rcar-gen2-scif", "renesas,scif"; 886 reg = <0 0xe6e68000 0 0x40>; 887 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 888 clocks = <&cpg CPG_MOD 720>, 889 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 890 clock-names = "fck", "brg_int", "scif_clk"; 891 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, 892 <&dmac1 0x2d>, <&dmac1 0x2e>; 893 dma-names = "tx", "rx", "tx", "rx"; 894 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 895 resets = <&cpg 720>; 896 status = "disabled"; 897 }; 898 899 scif2: serial@e6e58000 { 900 compatible = "renesas,scif-r8a7745", 901 "renesas,rcar-gen2-scif", "renesas,scif"; 902 reg = <0 0xe6e58000 0 0x40>; 903 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 904 clocks = <&cpg CPG_MOD 719>, 905 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 906 clock-names = "fck", "brg_int", "scif_clk"; 907 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, 908 <&dmac1 0x2b>, <&dmac1 0x2c>; 909 dma-names = "tx", "rx", "tx", "rx"; 910 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 911 resets = <&cpg 719>; 912 status = "disabled"; 913 }; 914 915 scif3: serial@e6ea8000 { 916 compatible = "renesas,scif-r8a7745", 917 "renesas,rcar-gen2-scif", "renesas,scif"; 918 reg = <0 0xe6ea8000 0 0x40>; 919 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 920 clocks = <&cpg CPG_MOD 718>, 921 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 922 clock-names = "fck", "brg_int", "scif_clk"; 923 dmas = <&dmac0 0x2f>, <&dmac0 0x30>, 924 <&dmac1 0x2f>, <&dmac1 0x30>; 925 dma-names = "tx", "rx", "tx", "rx"; 926 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 927 resets = <&cpg 718>; 928 status = "disabled"; 929 }; 930 931 scif4: serial@e6ee0000 { 932 compatible = "renesas,scif-r8a7745", 933 "renesas,rcar-gen2-scif", "renesas,scif"; 934 reg = <0 0xe6ee0000 0 0x40>; 935 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 936 clocks = <&cpg CPG_MOD 715>, 937 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 938 clock-names = "fck", "brg_int", "scif_clk"; 939 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>, 940 <&dmac1 0xfb>, <&dmac1 0xfc>; 941 dma-names = "tx", "rx", "tx", "rx"; 942 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 943 resets = <&cpg 715>; 944 status = "disabled"; 945 }; 946 947 scif5: serial@e6ee8000 { 948 compatible = "renesas,scif-r8a7745", 949 "renesas,rcar-gen2-scif", "renesas,scif"; 950 reg = <0 0xe6ee8000 0 0x40>; 951 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 952 clocks = <&cpg CPG_MOD 714>, 953 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 954 clock-names = "fck", "brg_int", "scif_clk"; 955 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>, 956 <&dmac1 0xfd>, <&dmac1 0xfe>; 957 dma-names = "tx", "rx", "tx", "rx"; 958 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 959 resets = <&cpg 714>; 960 status = "disabled"; 961 }; 962 963 hscif0: serial@e62c0000 { 964 compatible = "renesas,hscif-r8a7745", 965 "renesas,rcar-gen2-hscif", "renesas,hscif"; 966 reg = <0 0xe62c0000 0 0x60>; 967 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 968 clocks = <&cpg CPG_MOD 717>, 969 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 970 clock-names = "fck", "brg_int", "scif_clk"; 971 dmas = <&dmac0 0x39>, <&dmac0 0x3a>, 972 <&dmac1 0x39>, <&dmac1 0x3a>; 973 dma-names = "tx", "rx", "tx", "rx"; 974 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 975 resets = <&cpg 717>; 976 status = "disabled"; 977 }; 978 979 hscif1: serial@e62c8000 { 980 compatible = "renesas,hscif-r8a7745", 981 "renesas,rcar-gen2-hscif", "renesas,hscif"; 982 reg = <0 0xe62c8000 0 0x60>; 983 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 984 clocks = <&cpg CPG_MOD 716>, 985 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 986 clock-names = "fck", "brg_int", "scif_clk"; 987 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, 988 <&dmac1 0x4d>, <&dmac1 0x4e>; 989 dma-names = "tx", "rx", "tx", "rx"; 990 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 991 resets = <&cpg 716>; 992 status = "disabled"; 993 }; 994 995 hscif2: serial@e62d0000 { 996 compatible = "renesas,hscif-r8a7745", 997 "renesas,rcar-gen2-hscif", "renesas,hscif"; 998 reg = <0 0xe62d0000 0 0x60>; 999 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 1000 clocks = <&cpg CPG_MOD 713>, 1001 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 1002 clock-names = "fck", "brg_int", "scif_clk"; 1003 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, 1004 <&dmac1 0x3b>, <&dmac1 0x3c>; 1005 dma-names = "tx", "rx", "tx", "rx"; 1006 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1007 resets = <&cpg 713>; 1008 status = "disabled"; 1009 }; 1010 1011 msiof0: spi@e6e20000 { 1012 compatible = "renesas,msiof-r8a7745", 1013 "renesas,rcar-gen2-msiof"; 1014 reg = <0 0xe6e20000 0 0x0064>; 1015 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1016 clocks = <&cpg CPG_MOD 000>; 1017 dmas = <&dmac0 0x51>, <&dmac0 0x52>, 1018 <&dmac1 0x51>, <&dmac1 0x52>; 1019 dma-names = "tx", "rx", "tx", "rx"; 1020 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1021 #address-cells = <1>; 1022 #size-cells = <0>; 1023 resets = <&cpg 000>; 1024 status = "disabled"; 1025 }; 1026 1027 msiof1: spi@e6e10000 { 1028 compatible = "renesas,msiof-r8a7745", 1029 "renesas,rcar-gen2-msiof"; 1030 reg = <0 0xe6e10000 0 0x0064>; 1031 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1032 clocks = <&cpg CPG_MOD 208>; 1033 dmas = <&dmac0 0x55>, <&dmac0 0x56>, 1034 <&dmac1 0x55>, <&dmac1 0x56>; 1035 dma-names = "tx", "rx", "tx", "rx"; 1036 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1037 #address-cells = <1>; 1038 #size-cells = <0>; 1039 resets = <&cpg 208>; 1040 status = "disabled"; 1041 }; 1042 1043 msiof2: spi@e6e00000 { 1044 compatible = "renesas,msiof-r8a7745", 1045 "renesas,rcar-gen2-msiof"; 1046 reg = <0 0xe6e00000 0 0x0064>; 1047 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1048 clocks = <&cpg CPG_MOD 205>; 1049 dmas = <&dmac0 0x41>, <&dmac0 0x42>, 1050 <&dmac1 0x41>, <&dmac1 0x42>; 1051 dma-names = "tx", "rx", "tx", "rx"; 1052 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1053 #address-cells = <1>; 1054 #size-cells = <0>; 1055 resets = <&cpg 205>; 1056 status = "disabled"; 1057 }; 1058 1059 pwm0: pwm@e6e30000 { 1060 compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; 1061 reg = <0 0xe6e30000 0 0x8>; 1062 clocks = <&cpg CPG_MOD 523>; 1063 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1064 resets = <&cpg 523>; 1065 #pwm-cells = <2>; 1066 status = "disabled"; 1067 }; 1068 1069 pwm1: pwm@e6e31000 { 1070 compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; 1071 reg = <0 0xe6e31000 0 0x8>; 1072 clocks = <&cpg CPG_MOD 523>; 1073 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1074 resets = <&cpg 523>; 1075 #pwm-cells = <2>; 1076 status = "disabled"; 1077 }; 1078 1079 pwm2: pwm@e6e32000 { 1080 compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; 1081 reg = <0 0xe6e32000 0 0x8>; 1082 clocks = <&cpg CPG_MOD 523>; 1083 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1084 resets = <&cpg 523>; 1085 #pwm-cells = <2>; 1086 status = "disabled"; 1087 }; 1088 1089 pwm3: pwm@e6e33000 { 1090 compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; 1091 reg = <0 0xe6e33000 0 0x8>; 1092 clocks = <&cpg CPG_MOD 523>; 1093 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1094 resets = <&cpg 523>; 1095 #pwm-cells = <2>; 1096 status = "disabled"; 1097 }; 1098 1099 pwm4: pwm@e6e34000 { 1100 compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; 1101 reg = <0 0xe6e34000 0 0x8>; 1102 clocks = <&cpg CPG_MOD 523>; 1103 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1104 resets = <&cpg 523>; 1105 #pwm-cells = <2>; 1106 status = "disabled"; 1107 }; 1108 1109 pwm5: pwm@e6e35000 { 1110 compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; 1111 reg = <0 0xe6e35000 0 0x8>; 1112 clocks = <&cpg CPG_MOD 523>; 1113 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1114 resets = <&cpg 523>; 1115 #pwm-cells = <2>; 1116 status = "disabled"; 1117 }; 1118 1119 pwm6: pwm@e6e36000 { 1120 compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; 1121 reg = <0 0xe6e36000 0 0x8>; 1122 clocks = <&cpg CPG_MOD 523>; 1123 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1124 resets = <&cpg 523>; 1125 #pwm-cells = <2>; 1126 status = "disabled"; 1127 }; 1128 1129 can0: can@e6e80000 { 1130 compatible = "renesas,can-r8a7745", 1131 "renesas,rcar-gen2-can"; 1132 reg = <0 0xe6e80000 0 0x1000>; 1133 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1134 clocks = <&cpg CPG_MOD 916>, 1135 <&cpg CPG_CORE R8A7745_CLK_RCAN>, 1136 <&can_clk>; 1137 clock-names = "clkp1", "clkp2", "can_clk"; 1138 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1139 resets = <&cpg 916>; 1140 status = "disabled"; 1141 }; 1142 1143 can1: can@e6e88000 { 1144 compatible = "renesas,can-r8a7745", 1145 "renesas,rcar-gen2-can"; 1146 reg = <0 0xe6e88000 0 0x1000>; 1147 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1148 clocks = <&cpg CPG_MOD 915>, 1149 <&cpg CPG_CORE R8A7745_CLK_RCAN>, 1150 <&can_clk>; 1151 clock-names = "clkp1", "clkp2", "can_clk"; 1152 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1153 resets = <&cpg 915>; 1154 status = "disabled"; 1155 }; 1156 1157 vin0: video@e6ef0000 { 1158 compatible = "renesas,vin-r8a7745", 1159 "renesas,rcar-gen2-vin"; 1160 reg = <0 0xe6ef0000 0 0x1000>; 1161 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1162 clocks = <&cpg CPG_MOD 811>; 1163 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1164 resets = <&cpg 811>; 1165 status = "disabled"; 1166 }; 1167 1168 vin1: video@e6ef1000 { 1169 compatible = "renesas,vin-r8a7745", 1170 "renesas,rcar-gen2-vin"; 1171 reg = <0 0xe6ef1000 0 0x1000>; 1172 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1173 clocks = <&cpg CPG_MOD 810>; 1174 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1175 resets = <&cpg 810>; 1176 status = "disabled"; 1177 }; 1178 1179 rcar_sound: sound@ec500000 { 1180 /* 1181 * #sound-dai-cells is required if simple-card 1182 * 1183 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1184 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1185 */ 1186 compatible = "renesas,rcar_sound-r8a7745", 1187 "renesas,rcar_sound-gen2"; 1188 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1189 <0 0xec5a0000 0 0x100>, /* ADG */ 1190 <0 0xec540000 0 0x1000>, /* SSIU */ 1191 <0 0xec541000 0 0x280>, /* SSI */ 1192 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */ 1193 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1194 1195 clocks = <&cpg CPG_MOD 1005>, 1196 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1197 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1198 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1199 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1200 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1201 <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>, 1202 <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>, 1203 <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>, 1204 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1205 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1206 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1207 <&audio_clka>, <&audio_clkb>, <&audio_clkc>, 1208 <&cpg CPG_CORE R8A7745_CLK_M2>; 1209 clock-names = "ssi-all", 1210 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1211 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1212 "ssi.1", "ssi.0", 1213 "src.6", "src.5", "src.4", "src.3", 1214 "src.2", "src.1", 1215 "ctu.0", "ctu.1", 1216 "mix.0", "mix.1", 1217 "dvc.0", "dvc.1", 1218 "clk_a", "clk_b", "clk_c", "clk_i"; 1219 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1220 resets = <&cpg 1005>, 1221 <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, 1222 <&cpg 1009>, <&cpg 1010>, <&cpg 1011>, 1223 <&cpg 1012>, <&cpg 1013>, <&cpg 1014>, 1224 <&cpg 1015>; 1225 reset-names = "ssi-all", 1226 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1227 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1228 "ssi.1", "ssi.0"; 1229 1230 status = "disabled"; 1231 1232 rcar_sound,dvc { 1233 dvc0: dvc-0 { 1234 dmas = <&audma0 0xbc>; 1235 dma-names = "tx"; 1236 }; 1237 dvc1: dvc-1 { 1238 dmas = <&audma0 0xbe>; 1239 dma-names = "tx"; 1240 }; 1241 }; 1242 1243 rcar_sound,mix { 1244 mix0: mix-0 { }; 1245 mix1: mix-1 { }; 1246 }; 1247 1248 rcar_sound,ctu { 1249 ctu00: ctu-0 { }; 1250 ctu01: ctu-1 { }; 1251 ctu02: ctu-2 { }; 1252 ctu03: ctu-3 { }; 1253 ctu10: ctu-4 { }; 1254 ctu11: ctu-5 { }; 1255 ctu12: ctu-6 { }; 1256 ctu13: ctu-7 { }; 1257 }; 1258 1259 rcar_sound,src { 1260 src-0 { 1261 status = "disabled"; 1262 }; 1263 src1: src-1 { 1264 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1265 dmas = <&audma0 0x87>, <&audma0 0x9c>; 1266 dma-names = "rx", "tx"; 1267 }; 1268 src2: src-2 { 1269 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1270 dmas = <&audma0 0x89>, <&audma0 0x9e>; 1271 dma-names = "rx", "tx"; 1272 }; 1273 src3: src-3 { 1274 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1275 dmas = <&audma0 0x8b>, <&audma0 0xa0>; 1276 dma-names = "rx", "tx"; 1277 }; 1278 src4: src-4 { 1279 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1280 dmas = <&audma0 0x8d>, <&audma0 0xb0>; 1281 dma-names = "rx", "tx"; 1282 }; 1283 src5: src-5 { 1284 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1285 dmas = <&audma0 0x8f>, <&audma0 0xb2>; 1286 dma-names = "rx", "tx"; 1287 }; 1288 src6: src-6 { 1289 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1290 dmas = <&audma0 0x91>, <&audma0 0xb4>; 1291 dma-names = "rx", "tx"; 1292 }; 1293 }; 1294 1295 rcar_sound,ssi { 1296 ssi0: ssi-0 { 1297 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1298 dmas = <&audma0 0x01>, <&audma0 0x02>, 1299 <&audma0 0x15>, <&audma0 0x16>; 1300 dma-names = "rx", "tx", "rxu", "txu"; 1301 }; 1302 ssi1: ssi-1 { 1303 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1304 dmas = <&audma0 0x03>, <&audma0 0x04>, 1305 <&audma0 0x49>, <&audma0 0x4a>; 1306 dma-names = "rx", "tx", "rxu", "txu"; 1307 }; 1308 ssi2: ssi-2 { 1309 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1310 dmas = <&audma0 0x05>, <&audma0 0x06>, 1311 <&audma0 0x63>, <&audma0 0x64>; 1312 dma-names = "rx", "tx", "rxu", "txu"; 1313 }; 1314 ssi3: ssi-3 { 1315 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1316 dmas = <&audma0 0x07>, <&audma0 0x08>, 1317 <&audma0 0x6f>, <&audma0 0x70>; 1318 dma-names = "rx", "tx", "rxu", "txu"; 1319 }; 1320 ssi4: ssi-4 { 1321 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1322 dmas = <&audma0 0x09>, <&audma0 0x0a>, 1323 <&audma0 0x71>, <&audma0 0x72>; 1324 dma-names = "rx", "tx", "rxu", "txu"; 1325 }; 1326 ssi5: ssi-5 { 1327 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1328 dmas = <&audma0 0x0b>, <&audma0 0x0c>, 1329 <&audma0 0x73>, <&audma0 0x74>; 1330 dma-names = "rx", "tx", "rxu", "txu"; 1331 }; 1332 ssi6: ssi-6 { 1333 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1334 dmas = <&audma0 0x0d>, <&audma0 0x0e>, 1335 <&audma0 0x75>, <&audma0 0x76>; 1336 dma-names = "rx", "tx", "rxu", "txu"; 1337 }; 1338 ssi7: ssi-7 { 1339 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1340 dmas = <&audma0 0x0f>, <&audma0 0x10>, 1341 <&audma0 0x79>, <&audma0 0x7a>; 1342 dma-names = "rx", "tx", "rxu", "txu"; 1343 }; 1344 ssi8: ssi-8 { 1345 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1346 dmas = <&audma0 0x11>, <&audma0 0x12>, 1347 <&audma0 0x7b>, <&audma0 0x7c>; 1348 dma-names = "rx", "tx", "rxu", "txu"; 1349 }; 1350 ssi9: ssi-9 { 1351 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1352 dmas = <&audma0 0x13>, <&audma0 0x14>, 1353 <&audma0 0x7d>, <&audma0 0x7e>; 1354 dma-names = "rx", "tx", "rxu", "txu"; 1355 }; 1356 }; 1357 }; 1358 1359 audma0: dma-controller@ec700000 { 1360 compatible = "renesas,dmac-r8a7745", 1361 "renesas,rcar-dmac"; 1362 reg = <0 0xec700000 0 0x10000>; 1363 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 1364 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1365 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1366 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1367 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1368 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1369 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1370 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1371 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1372 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1373 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1374 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1375 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1376 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; 1377 interrupt-names = "error", 1378 "ch0", "ch1", "ch2", "ch3", 1379 "ch4", "ch5", "ch6", "ch7", 1380 "ch8", "ch9", "ch10", "ch11", 1381 "ch12"; 1382 clocks = <&cpg CPG_MOD 502>; 1383 clock-names = "fck"; 1384 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1385 resets = <&cpg 502>; 1386 #dma-cells = <1>; 1387 dma-channels = <13>; 1388 }; 1389 1390 pci0: pci@ee090000 { 1391 compatible = "renesas,pci-r8a7745", 1392 "renesas,pci-rcar-gen2"; 1393 device_type = "pci"; 1394 reg = <0 0xee090000 0 0xc00>, 1395 <0 0xee080000 0 0x1100>; 1396 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1397 clocks = <&cpg CPG_MOD 703>; 1398 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1399 resets = <&cpg 703>; 1400 status = "disabled"; 1401 1402 bus-range = <0 0>; 1403 #address-cells = <3>; 1404 #size-cells = <2>; 1405 #interrupt-cells = <1>; 1406 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; 1407 interrupt-map-mask = <0xf800 0 0 0x7>; 1408 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1409 <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1410 <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1411 1412 usb@1,0 { 1413 reg = <0x800 0 0 0 0>; 1414 phys = <&usb0 0>; 1415 phy-names = "usb"; 1416 }; 1417 1418 usb@2,0 { 1419 reg = <0x1000 0 0 0 0>; 1420 phys = <&usb0 0>; 1421 phy-names = "usb"; 1422 }; 1423 }; 1424 1425 pci1: pci@ee0d0000 { 1426 compatible = "renesas,pci-r8a7745", 1427 "renesas,pci-rcar-gen2"; 1428 device_type = "pci"; 1429 reg = <0 0xee0d0000 0 0xc00>, 1430 <0 0xee0c0000 0 0x1100>; 1431 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1432 clocks = <&cpg CPG_MOD 703>; 1433 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1434 resets = <&cpg 703>; 1435 status = "disabled"; 1436 1437 bus-range = <1 1>; 1438 #address-cells = <3>; 1439 #size-cells = <2>; 1440 #interrupt-cells = <1>; 1441 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; 1442 interrupt-map-mask = <0xf800 0 0 0x7>; 1443 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1444 <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1445 <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1446 1447 usb@1,0 { 1448 reg = <0x10800 0 0 0 0>; 1449 phys = <&usb2 0>; 1450 phy-names = "usb"; 1451 }; 1452 1453 usb@2,0 { 1454 reg = <0x11000 0 0 0 0>; 1455 phys = <&usb2 0>; 1456 phy-names = "usb"; 1457 }; 1458 }; 1459 1460 sdhi0: mmc@ee100000 { 1461 compatible = "renesas,sdhi-r8a7745", 1462 "renesas,rcar-gen2-sdhi"; 1463 reg = <0 0xee100000 0 0x328>; 1464 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1465 clocks = <&cpg CPG_MOD 314>; 1466 dmas = <&dmac0 0xcd>, <&dmac0 0xce>, 1467 <&dmac1 0xcd>, <&dmac1 0xce>; 1468 dma-names = "tx", "rx", "tx", "rx"; 1469 max-frequency = <195000000>; 1470 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1471 resets = <&cpg 314>; 1472 status = "disabled"; 1473 }; 1474 1475 sdhi1: mmc@ee140000 { 1476 compatible = "renesas,sdhi-r8a7745", 1477 "renesas,rcar-gen2-sdhi"; 1478 reg = <0 0xee140000 0 0x100>; 1479 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1480 clocks = <&cpg CPG_MOD 312>; 1481 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, 1482 <&dmac1 0xc1>, <&dmac1 0xc2>; 1483 dma-names = "tx", "rx", "tx", "rx"; 1484 max-frequency = <97500000>; 1485 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1486 resets = <&cpg 312>; 1487 status = "disabled"; 1488 }; 1489 1490 sdhi2: mmc@ee160000 { 1491 compatible = "renesas,sdhi-r8a7745", 1492 "renesas,rcar-gen2-sdhi"; 1493 reg = <0 0xee160000 0 0x100>; 1494 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1495 clocks = <&cpg CPG_MOD 311>; 1496 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, 1497 <&dmac1 0xd3>, <&dmac1 0xd4>; 1498 dma-names = "tx", "rx", "tx", "rx"; 1499 max-frequency = <97500000>; 1500 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1501 resets = <&cpg 311>; 1502 status = "disabled"; 1503 }; 1504 1505 mmcif0: mmc@ee200000 { 1506 compatible = "renesas,mmcif-r8a7745", 1507 "renesas,sh-mmcif"; 1508 reg = <0 0xee200000 0 0x80>; 1509 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 1510 clocks = <&cpg CPG_MOD 315>; 1511 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, 1512 <&dmac1 0xd1>, <&dmac1 0xd2>; 1513 dma-names = "tx", "rx", "tx", "rx"; 1514 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1515 resets = <&cpg 315>; 1516 reg-io-width = <4>; 1517 max-frequency = <97500000>; 1518 status = "disabled"; 1519 }; 1520 1521 ether: ethernet@ee700000 { 1522 compatible = "renesas,ether-r8a7745", 1523 "renesas,rcar-gen2-ether"; 1524 reg = <0 0xee700000 0 0x400>; 1525 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; 1526 clocks = <&cpg CPG_MOD 813>; 1527 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1528 resets = <&cpg 813>; 1529 phy-mode = "rmii"; 1530 #address-cells = <1>; 1531 #size-cells = <0>; 1532 status = "disabled"; 1533 }; 1534 1535 gic: interrupt-controller@f1001000 { 1536 compatible = "arm,gic-400"; 1537 #interrupt-cells = <3>; 1538 #address-cells = <0>; 1539 interrupt-controller; 1540 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>, 1541 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; 1542 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1543 clocks = <&cpg CPG_MOD 408>; 1544 clock-names = "clk"; 1545 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1546 resets = <&cpg 408>; 1547 }; 1548 1549 vsp@fe928000 { 1550 compatible = "renesas,vsp1"; 1551 reg = <0 0xfe928000 0 0x8000>; 1552 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; 1553 clocks = <&cpg CPG_MOD 131>; 1554 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1555 resets = <&cpg 131>; 1556 }; 1557 1558 vsp@fe930000 { 1559 compatible = "renesas,vsp1"; 1560 reg = <0 0xfe930000 0 0x8000>; 1561 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1562 clocks = <&cpg CPG_MOD 128>; 1563 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1564 resets = <&cpg 128>; 1565 }; 1566 1567 du: display@feb00000 { 1568 compatible = "renesas,du-r8a7745"; 1569 reg = <0 0xfeb00000 0 0x40000>; 1570 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1571 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1572 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; 1573 clock-names = "du.0", "du.1"; 1574 resets = <&cpg 724>; 1575 reset-names = "du.0"; 1576 status = "disabled"; 1577 1578 ports { 1579 #address-cells = <1>; 1580 #size-cells = <0>; 1581 1582 port@0 { 1583 reg = <0>; 1584 du_out_rgb0: endpoint { 1585 }; 1586 }; 1587 port@1 { 1588 reg = <1>; 1589 du_out_rgb1: endpoint { 1590 }; 1591 }; 1592 }; 1593 }; 1594 1595 prr: chipid@ff000044 { 1596 compatible = "renesas,prr"; 1597 reg = <0 0xff000044 0 4>; 1598 }; 1599 1600 cmt0: timer@ffca0000 { 1601 compatible = "renesas,r8a7745-cmt0", 1602 "renesas,rcar-gen2-cmt0"; 1603 reg = <0 0xffca0000 0 0x1004>; 1604 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 1605 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 1606 clocks = <&cpg CPG_MOD 124>; 1607 clock-names = "fck"; 1608 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1609 resets = <&cpg 124>; 1610 status = "disabled"; 1611 }; 1612 1613 cmt1: timer@e6130000 { 1614 compatible = "renesas,r8a7745-cmt1", 1615 "renesas,rcar-gen2-cmt1"; 1616 reg = <0 0xe6130000 0 0x1004>; 1617 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 1618 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 1619 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 1620 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 1621 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 1622 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 1623 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 1624 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 1625 clocks = <&cpg CPG_MOD 329>; 1626 clock-names = "fck"; 1627 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1628 resets = <&cpg 329>; 1629 status = "disabled"; 1630 }; 1631 }; 1632 1633 timer { 1634 compatible = "arm,armv7-timer"; 1635 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1636 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1637 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1638 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1639 }; 1640 1641 /* External USB clock - can be overridden by the board */ 1642 usb_extal_clk: usb_extal { 1643 compatible = "fixed-clock"; 1644 #clock-cells = <0>; 1645 clock-frequency = <48000000>; 1646 }; 1647}; 1648