1// SPDX-License-Identifier: GPL-2.0+ OR MIT
2/*
3 * Copyright 2014-2020 Toradex
4 *
5 */
6
7/ {
8	aliases {
9		ethernet0 = &fec1;
10		ethernet1 = &fec0;
11	};
12
13	bl: backlight {
14		compatible = "pwm-backlight";
15		pinctrl-names = "default";
16		pinctrl-0 = <&pinctrl_gpio_bl_on>;
17		pwms = <&pwm0 0 5000000 0>;
18		enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
19		status = "disabled";
20	};
21
22	reg_module_3v3: regulator-module-3v3 {
23		compatible = "regulator-fixed";
24		regulator-name = "+V3.3";
25		regulator-min-microvolt = <3300000>;
26		regulator-max-microvolt = <3300000>;
27	};
28
29	reg_module_3v3_avdd: regulator-module-3v3-avdd {
30		compatible = "regulator-fixed";
31		regulator-name = "+V3.3_AVDD_AUDIO";
32		regulator-min-microvolt = <3300000>;
33		regulator-max-microvolt = <3300000>;
34	};
35};
36
37&adc0 {
38	status = "okay";
39	vref-supply = <&reg_module_3v3_avdd>;
40};
41
42&adc1 {
43	status = "okay";
44	vref-supply = <&reg_module_3v3_avdd>;
45};
46
47&can0 {
48	pinctrl-names = "default";
49	pinctrl-0 = <&pinctrl_flexcan0>;
50	status = "disabled";
51};
52
53&can1 {
54	pinctrl-names = "default";
55	pinctrl-0 = <&pinctrl_flexcan1>;
56	status = "disabled";
57};
58
59&clks {
60	assigned-clocks = <&clks VF610_CLK_ENET_SEL>,
61			  <&clks VF610_CLK_ENET_TS_SEL>;
62	assigned-clock-parents = <&clks VF610_CLK_ENET_50M>,
63				 <&clks VF610_CLK_ENET_50M>;
64};
65
66&dspi1 {
67	bus-num = <1>;
68	pinctrl-names = "default";
69	pinctrl-0 = <&pinctrl_dspi1>;
70};
71
72&edma0 {
73	status = "okay";
74};
75
76&edma1 {
77	status = "okay";
78};
79
80&esdhc1 {
81	pinctrl-names = "default";
82	pinctrl-0 = <&pinctrl_esdhc1>;
83	bus-width = <4>;
84	cd-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
85	disable-wp;
86};
87
88&fec1 {
89	phy-mode = "rmii";
90	phy-supply = <&reg_module_3v3>;
91	pinctrl-names = "default";
92	pinctrl-0 = <&pinctrl_fec1>;
93};
94
95&i2c0 {
96	clock-frequency = <400000>;
97	pinctrl-names = "default", "gpio";
98	pinctrl-0 = <&pinctrl_i2c0>;
99	pinctrl-1 = <&pinctrl_i2c0_gpio>;
100	scl-gpios = <&gpio1 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
101	sda-gpios = <&gpio1 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
102};
103
104&nfc {
105	pinctrl-names = "default";
106	pinctrl-0 = <&pinctrl_nfc>;
107	status = "okay";
108
109	nand@0 {
110		compatible = "fsl,vf610-nfc-nandcs";
111		reg = <0>;
112		#address-cells = <1>;
113		#size-cells = <1>;
114		nand-bus-width = <8>;
115		nand-ecc-mode = "hw";
116		nand-ecc-strength = <32>;
117		nand-ecc-step-size = <2048>;
118		nand-on-flash-bbt;
119	};
120};
121
122&pwm0 {
123	pinctrl-names = "default";
124	pinctrl-0 = <&pinctrl_pwm0>;
125};
126
127&pwm1 {
128	pinctrl-names = "default";
129	pinctrl-0 = <&pinctrl_pwm1>;
130};
131
132&uart0 {
133	pinctrl-names = "default";
134	pinctrl-0 = <&pinctrl_uart0>;
135};
136
137&uart1 {
138	pinctrl-names = "default";
139	pinctrl-0 = <&pinctrl_uart1>;
140};
141
142&uart2 {
143	pinctrl-names = "default";
144	pinctrl-0 = <&pinctrl_uart2>;
145};
146
147&usbdev0 {
148	disable-over-current;
149	status = "okay";
150};
151
152&usbh1 {
153	disable-over-current;
154	status = "okay";
155};
156
157&usbmisc0 {
158	status = "okay";
159};
160
161&usbmisc1 {
162	status = "okay";
163};
164
165&usbphy0 {
166	status = "okay";
167};
168
169&usbphy1 {
170	status = "okay";
171};
172
173&iomuxc {
174	vf610-colibri {
175		pinctrl_flexcan0: can0grp {
176			fsl,pins = <
177				VF610_PAD_PTB14__CAN0_RX	0x31F1
178				VF610_PAD_PTB15__CAN0_TX	0x31F2
179			>;
180		};
181
182		pinctrl_flexcan1: can1grp {
183			fsl,pins = <
184				VF610_PAD_PTB16__CAN1_RX	0x31F1
185				VF610_PAD_PTB17__CAN1_TX	0x31F2
186			>;
187		};
188
189		pinctrl_gpio_ext: gpio_ext {
190			fsl,pins = <
191				VF610_PAD_PTD10__GPIO_89	0x22ed /* EXT_IO_0 */
192				VF610_PAD_PTD9__GPIO_88		0x22ed /* EXT_IO_1 */
193				VF610_PAD_PTD26__GPIO_68	0x22ed /* EXT_IO_2 */
194			>;
195		};
196
197		pinctrl_dcu0_1: dcu0grp_1 {
198			fsl,pins = <
199				VF610_PAD_PTE0__DCU0_HSYNC	0x1902
200				VF610_PAD_PTE1__DCU0_VSYNC	0x1902
201				VF610_PAD_PTE2__DCU0_PCLK	0x1902
202				VF610_PAD_PTE4__DCU0_DE		0x1902
203				VF610_PAD_PTE5__DCU0_R0		0x1902
204				VF610_PAD_PTE6__DCU0_R1		0x1902
205				VF610_PAD_PTE7__DCU0_R2		0x1902
206				VF610_PAD_PTE8__DCU0_R3		0x1902
207				VF610_PAD_PTE9__DCU0_R4		0x1902
208				VF610_PAD_PTE10__DCU0_R5	0x1902
209				VF610_PAD_PTE11__DCU0_R6	0x1902
210				VF610_PAD_PTE12__DCU0_R7	0x1902
211				VF610_PAD_PTE13__DCU0_G0	0x1902
212				VF610_PAD_PTE14__DCU0_G1	0x1902
213				VF610_PAD_PTE15__DCU0_G2	0x1902
214				VF610_PAD_PTE16__DCU0_G3	0x1902
215				VF610_PAD_PTE17__DCU0_G4	0x1902
216				VF610_PAD_PTE18__DCU0_G5	0x1902
217				VF610_PAD_PTE19__DCU0_G6	0x1902
218				VF610_PAD_PTE20__DCU0_G7	0x1902
219				VF610_PAD_PTE21__DCU0_B0	0x1902
220				VF610_PAD_PTE22__DCU0_B1	0x1902
221				VF610_PAD_PTE23__DCU0_B2	0x1902
222				VF610_PAD_PTE24__DCU0_B3	0x1902
223				VF610_PAD_PTE25__DCU0_B4	0x1902
224				VF610_PAD_PTE26__DCU0_B5	0x1902
225				VF610_PAD_PTE27__DCU0_B6	0x1902
226				VF610_PAD_PTE28__DCU0_B7	0x1902
227			>;
228		};
229
230		pinctrl_dspi1: dspi1grp {
231			fsl,pins = <
232				VF610_PAD_PTD5__DSPI1_CS0		0x33e2
233				VF610_PAD_PTD6__DSPI1_SIN		0x33e1
234				VF610_PAD_PTD7__DSPI1_SOUT		0x33e2
235				VF610_PAD_PTD8__DSPI1_SCK		0x33e2
236			>;
237		};
238
239		pinctrl_esdhc1: esdhc1grp {
240			fsl,pins = <
241				VF610_PAD_PTA24__ESDHC1_CLK	0x31ef
242				VF610_PAD_PTA25__ESDHC1_CMD	0x31ef
243				VF610_PAD_PTA26__ESDHC1_DAT0	0x31ef
244				VF610_PAD_PTA27__ESDHC1_DAT1	0x31ef
245				VF610_PAD_PTA28__ESDHC1_DATA2	0x31ef
246				VF610_PAD_PTA29__ESDHC1_DAT3	0x31ef
247				VF610_PAD_PTB20__GPIO_42	0x219d
248			>;
249		};
250
251		pinctrl_fec1: fec1grp {
252			fsl,pins = <
253				VF610_PAD_PTA6__RMII_CLKOUT		0x30d2
254				VF610_PAD_PTC9__ENET_RMII1_MDC		0x30d2
255				VF610_PAD_PTC10__ENET_RMII1_MDIO	0x30d3
256				VF610_PAD_PTC11__ENET_RMII1_CRS		0x30d1
257				VF610_PAD_PTC12__ENET_RMII1_RXD1	0x30d1
258				VF610_PAD_PTC13__ENET_RMII1_RXD0	0x30d1
259				VF610_PAD_PTC14__ENET_RMII1_RXER	0x30d1
260				VF610_PAD_PTC15__ENET_RMII1_TXD1	0x30d2
261				VF610_PAD_PTC16__ENET_RMII1_TXD0	0x30d2
262				VF610_PAD_PTC17__ENET_RMII1_TXEN	0x30d2
263			>;
264		};
265
266		pinctrl_gpio_bl_on: gpio_bl_on {
267			fsl,pins = <
268				VF610_PAD_PTC0__GPIO_45		0x22ef
269			>;
270		};
271
272		pinctrl_i2c0: i2c0grp {
273			fsl,pins = <
274				VF610_PAD_PTB14__I2C0_SCL		0x37ff
275				VF610_PAD_PTB15__I2C0_SDA		0x37ff
276			>;
277		};
278
279		pinctrl_i2c0_gpio: i2c0gpiogrp {
280			fsl,pins = <
281				VF610_PAD_PTB14__GPIO_36		0x37ff
282				VF610_PAD_PTB15__GPIO_37		0x37ff
283			>;
284		};
285
286		pinctrl_nfc: nfcgrp {
287			fsl,pins = <
288				VF610_PAD_PTD23__NF_IO7		0x28df
289				VF610_PAD_PTD22__NF_IO6		0x28df
290				VF610_PAD_PTD21__NF_IO5		0x28df
291				VF610_PAD_PTD20__NF_IO4		0x28df
292				VF610_PAD_PTD19__NF_IO3		0x28df
293				VF610_PAD_PTD18__NF_IO2		0x28df
294				VF610_PAD_PTD17__NF_IO1		0x28df
295				VF610_PAD_PTD16__NF_IO0		0x28df
296				VF610_PAD_PTB24__NF_WE_B	0x28c2
297				VF610_PAD_PTB25__NF_CE0_B	0x28c2
298				VF610_PAD_PTB27__NF_RE_B	0x28c2
299				VF610_PAD_PTC26__NF_RB_B	0x283d
300				VF610_PAD_PTC27__NF_ALE		0x28c2
301				VF610_PAD_PTC28__NF_CLE		0x28c2
302			>;
303		};
304
305		pinctrl_pwm0: pwm0grp {
306			fsl,pins = <
307				VF610_PAD_PTB0__FTM0_CH0		0x1182
308				VF610_PAD_PTB1__FTM0_CH1		0x1182
309			>;
310		};
311
312		pinctrl_pwm1: pwm1grp {
313			fsl,pins = <
314				VF610_PAD_PTB8__FTM1_CH0		0x1182
315				VF610_PAD_PTB9__FTM1_CH1		0x1182
316			>;
317		};
318
319		pinctrl_uart0: uart0grp {
320			fsl,pins = <
321				VF610_PAD_PTB10__UART0_TX		0x21a2
322				VF610_PAD_PTB11__UART0_RX		0x21a1
323				VF610_PAD_PTB12__UART0_RTS		0x21a2
324				VF610_PAD_PTB13__UART0_CTS		0x21a1
325			>;
326		};
327
328		pinctrl_uart1: uart1grp {
329			fsl,pins = <
330				VF610_PAD_PTB4__UART1_TX		0x21a2
331				VF610_PAD_PTB5__UART1_RX		0x21a1
332			>;
333		};
334
335		pinctrl_uart2: uart2grp {
336			fsl,pins = <
337				VF610_PAD_PTD0__UART2_TX		0x21a2
338				VF610_PAD_PTD1__UART2_RX		0x21a1
339				VF610_PAD_PTD2__UART2_RTS		0x21a2
340				VF610_PAD_PTD3__UART2_CTS		0x21a1
341			>;
342		};
343
344		pinctrl_usbh1_reg: gpio_usb_vbus {
345			fsl,pins = <
346				VF610_PAD_PTD4__GPIO_83			0x22ed
347			>;
348		};
349	};
350};
351