1=========================== 2 drm/i915 Intel GFX Driver 3=========================== 4 5The drm/i915 driver supports all (with the exception of some very early 6models) integrated GFX chipsets with both Intel display and rendering 7blocks. This excludes a set of SoC platforms with an SGX rendering unit, 8those have basic support through the gma500 drm driver. 9 10Core Driver Infrastructure 11========================== 12 13This section covers core driver infrastructure used by both the display 14and the GEM parts of the driver. 15 16Runtime Power Management 17------------------------ 18 19.. kernel-doc:: drivers/gpu/drm/i915/intel_runtime_pm.c 20 :doc: runtime pm 21 22.. kernel-doc:: drivers/gpu/drm/i915/intel_runtime_pm.c 23 :internal: 24 25.. kernel-doc:: drivers/gpu/drm/i915/intel_uncore.c 26 :internal: 27 28Interrupt Handling 29------------------ 30 31.. kernel-doc:: drivers/gpu/drm/i915/i915_irq.c 32 :doc: interrupt handling 33 34.. kernel-doc:: drivers/gpu/drm/i915/i915_irq.c 35 :functions: intel_irq_init intel_irq_init_hw intel_hpd_init 36 37.. kernel-doc:: drivers/gpu/drm/i915/i915_irq.c 38 :functions: intel_runtime_pm_disable_interrupts 39 40.. kernel-doc:: drivers/gpu/drm/i915/i915_irq.c 41 :functions: intel_runtime_pm_enable_interrupts 42 43Intel GVT-g Guest Support(vGPU) 44------------------------------- 45 46.. kernel-doc:: drivers/gpu/drm/i915/i915_vgpu.c 47 :doc: Intel GVT-g guest support 48 49.. kernel-doc:: drivers/gpu/drm/i915/i915_vgpu.c 50 :internal: 51 52Intel GVT-g Host Support(vGPU device model) 53------------------------------------------- 54 55.. kernel-doc:: drivers/gpu/drm/i915/intel_gvt.c 56 :doc: Intel GVT-g host support 57 58.. kernel-doc:: drivers/gpu/drm/i915/intel_gvt.c 59 :internal: 60 61Workarounds 62----------- 63 64.. kernel-doc:: drivers/gpu/drm/i915/gt/intel_workarounds.c 65 :doc: Hardware workarounds 66 67Display Hardware Handling 68========================= 69 70This section covers everything related to the display hardware including 71the mode setting infrastructure, plane, sprite and cursor handling and 72display, output probing and related topics. 73 74Mode Setting Infrastructure 75--------------------------- 76 77The i915 driver is thus far the only DRM driver which doesn't use the 78common DRM helper code to implement mode setting sequences. Thus it has 79its own tailor-made infrastructure for executing a display configuration 80change. 81 82Frontbuffer Tracking 83-------------------- 84 85.. kernel-doc:: drivers/gpu/drm/i915/display/intel_frontbuffer.c 86 :doc: frontbuffer tracking 87 88.. kernel-doc:: drivers/gpu/drm/i915/display/intel_frontbuffer.h 89 :internal: 90 91.. kernel-doc:: drivers/gpu/drm/i915/display/intel_frontbuffer.c 92 :internal: 93 94Display FIFO Underrun Reporting 95------------------------------- 96 97.. kernel-doc:: drivers/gpu/drm/i915/display/intel_fifo_underrun.c 98 :doc: fifo underrun handling 99 100.. kernel-doc:: drivers/gpu/drm/i915/display/intel_fifo_underrun.c 101 :internal: 102 103Plane Configuration 104------------------- 105 106This section covers plane configuration and composition with the primary 107plane, sprites, cursors and overlays. This includes the infrastructure 108to do atomic vsync'ed updates of all this state and also tightly coupled 109topics like watermark setup and computation, framebuffer compression and 110panel self refresh. 111 112Atomic Plane Helpers 113-------------------- 114 115.. kernel-doc:: drivers/gpu/drm/i915/display/intel_atomic_plane.c 116 :doc: atomic plane helpers 117 118.. kernel-doc:: drivers/gpu/drm/i915/display/intel_atomic_plane.c 119 :internal: 120 121Asynchronous Page Flip 122---------------------- 123 124.. kernel-doc:: drivers/gpu/drm/i915/display/intel_display.c 125 :doc: asynchronous flip implementation 126 127Output Probing 128-------------- 129 130This section covers output probing and related infrastructure like the 131hotplug interrupt storm detection and mitigation code. Note that the 132i915 driver still uses most of the common DRM helper code for output 133probing, so those sections fully apply. 134 135Hotplug 136------- 137 138.. kernel-doc:: drivers/gpu/drm/i915/display/intel_hotplug.c 139 :doc: Hotplug 140 141.. kernel-doc:: drivers/gpu/drm/i915/display/intel_hotplug.c 142 :internal: 143 144High Definition Audio 145--------------------- 146 147.. kernel-doc:: drivers/gpu/drm/i915/display/intel_audio.c 148 :doc: High Definition Audio over HDMI and Display Port 149 150.. kernel-doc:: drivers/gpu/drm/i915/display/intel_audio.c 151 :internal: 152 153.. kernel-doc:: include/drm/i915_component.h 154 :internal: 155 156Intel HDMI LPE Audio Support 157---------------------------- 158 159.. kernel-doc:: drivers/gpu/drm/i915/display/intel_lpe_audio.c 160 :doc: LPE Audio integration for HDMI or DP playback 161 162.. kernel-doc:: drivers/gpu/drm/i915/display/intel_lpe_audio.c 163 :internal: 164 165Panel Self Refresh PSR (PSR/SRD) 166-------------------------------- 167 168.. kernel-doc:: drivers/gpu/drm/i915/display/intel_psr.c 169 :doc: Panel Self Refresh (PSR/SRD) 170 171.. kernel-doc:: drivers/gpu/drm/i915/display/intel_psr.c 172 :internal: 173 174Frame Buffer Compression (FBC) 175------------------------------ 176 177.. kernel-doc:: drivers/gpu/drm/i915/display/intel_fbc.c 178 :doc: Frame Buffer Compression (FBC) 179 180.. kernel-doc:: drivers/gpu/drm/i915/display/intel_fbc.c 181 :internal: 182 183Display Refresh Rate Switching (DRRS) 184------------------------------------- 185 186.. kernel-doc:: drivers/gpu/drm/i915/display/intel_drrs.c 187 :doc: Display Refresh Rate Switching (DRRS) 188 189.. kernel-doc:: drivers/gpu/drm/i915/display/intel_drrs.c 190 :internal: 191 192DPIO 193---- 194 195.. kernel-doc:: drivers/gpu/drm/i915/display/intel_dpio_phy.c 196 :doc: DPIO 197 198DMC Firmware Support 199-------------------- 200 201.. kernel-doc:: drivers/gpu/drm/i915/display/intel_dmc.c 202 :doc: DMC Firmware Support 203 204.. kernel-doc:: drivers/gpu/drm/i915/display/intel_dmc.c 205 :internal: 206 207Video BIOS Table (VBT) 208---------------------- 209 210.. kernel-doc:: drivers/gpu/drm/i915/display/intel_bios.c 211 :doc: Video BIOS Table (VBT) 212 213.. kernel-doc:: drivers/gpu/drm/i915/display/intel_bios.c 214 :internal: 215 216.. kernel-doc:: drivers/gpu/drm/i915/display/intel_vbt_defs.h 217 :internal: 218 219Display clocks 220-------------- 221 222.. kernel-doc:: drivers/gpu/drm/i915/display/intel_cdclk.c 223 :doc: CDCLK / RAWCLK 224 225.. kernel-doc:: drivers/gpu/drm/i915/display/intel_cdclk.c 226 :internal: 227 228Display PLLs 229------------ 230 231.. kernel-doc:: drivers/gpu/drm/i915/display/intel_dpll_mgr.c 232 :doc: Display PLLs 233 234.. kernel-doc:: drivers/gpu/drm/i915/display/intel_dpll_mgr.c 235 :internal: 236 237.. kernel-doc:: drivers/gpu/drm/i915/display/intel_dpll_mgr.h 238 :internal: 239 240Display State Buffer 241-------------------- 242 243.. kernel-doc:: drivers/gpu/drm/i915/display/intel_dsb.c 244 :doc: DSB 245 246.. kernel-doc:: drivers/gpu/drm/i915/display/intel_dsb.c 247 :internal: 248 249GT Programming 250============== 251 252Multicast/Replicated (MCR) Registers 253------------------------------------ 254 255.. kernel-doc:: drivers/gpu/drm/i915/gt/intel_gt_mcr.c 256 :doc: GT Multicast/Replicated (MCR) Register Support 257 258.. kernel-doc:: drivers/gpu/drm/i915/gt/intel_gt_mcr.c 259 :internal: 260 261Memory Management and Command Submission 262======================================== 263 264This sections covers all things related to the GEM implementation in the 265i915 driver. 266 267Intel GPU Basics 268---------------- 269 270An Intel GPU has multiple engines. There are several engine types: 271 272- Render Command Streamer (RCS). An engine for rendering 3D and 273 performing compute. 274- Blitting Command Streamer (BCS). An engine for performing blitting and/or 275 copying operations. 276- Video Command Streamer. An engine used for video encoding and decoding. Also 277 sometimes called 'BSD' in hardware documentation. 278- Video Enhancement Command Streamer (VECS). An engine for video enhancement. 279 Also sometimes called 'VEBOX' in hardware documentation. 280- Compute Command Streamer (CCS). An engine that has access to the media and 281 GPGPU pipelines, but not the 3D pipeline. 282- Graphics Security Controller (GSCCS). A dedicated engine for internal 283 communication with GSC controller on security related tasks like 284 High-bandwidth Digital Content Protection (HDCP), Protected Xe Path (PXP), 285 and HuC firmware authentication. 286 287The Intel GPU family is a family of integrated GPU's using Unified 288Memory Access. For having the GPU "do work", user space will feed the 289GPU batch buffers via one of the ioctls `DRM_IOCTL_I915_GEM_EXECBUFFER2` 290or `DRM_IOCTL_I915_GEM_EXECBUFFER2_WR`. Most such batchbuffers will 291instruct the GPU to perform work (for example rendering) and that work 292needs memory from which to read and memory to which to write. All memory 293is encapsulated within GEM buffer objects (usually created with the ioctl 294`DRM_IOCTL_I915_GEM_CREATE`). An ioctl providing a batchbuffer for the GPU 295to create will also list all GEM buffer objects that the batchbuffer reads 296and/or writes. For implementation details of memory management see 297`GEM BO Management Implementation Details`_. 298 299The i915 driver allows user space to create a context via the ioctl 300`DRM_IOCTL_I915_GEM_CONTEXT_CREATE` which is identified by a 32-bit 301integer. Such a context should be viewed by user-space as -loosely- 302analogous to the idea of a CPU process of an operating system. The i915 303driver guarantees that commands issued to a fixed context are to be 304executed so that writes of a previously issued command are seen by 305reads of following commands. Actions issued between different contexts 306(even if from the same file descriptor) are NOT given that guarantee 307and the only way to synchronize across contexts (even from the same 308file descriptor) is through the use of fences. At least as far back as 309Gen4, also have that a context carries with it a GPU HW context; 310the HW context is essentially (most of at least) the state of a GPU. 311In addition to the ordering guarantees, the kernel will restore GPU 312state via HW context when commands are issued to a context, this saves 313user space the need to restore (most of at least) the GPU state at the 314start of each batchbuffer. The non-deprecated ioctls to submit batchbuffer 315work can pass that ID (in the lower bits of drm_i915_gem_execbuffer2::rsvd1) 316to identify what context to use with the command. 317 318The GPU has its own memory management and address space. The kernel 319driver maintains the memory translation table for the GPU. For older 320GPUs (i.e. those before Gen8), there is a single global such translation 321table, a global Graphics Translation Table (GTT). For newer generation 322GPUs each context has its own translation table, called Per-Process 323Graphics Translation Table (PPGTT). Of important note, is that although 324PPGTT is named per-process it is actually per context. When user space 325submits a batchbuffer, the kernel walks the list of GEM buffer objects 326used by the batchbuffer and guarantees that not only is the memory of 327each such GEM buffer object resident but it is also present in the 328(PP)GTT. If the GEM buffer object is not yet placed in the (PP)GTT, 329then it is given an address. Two consequences of this are: the kernel 330needs to edit the batchbuffer submitted to write the correct value of 331the GPU address when a GEM BO is assigned a GPU address and the kernel 332might evict a different GEM BO from the (PP)GTT to make address room 333for another GEM BO. Consequently, the ioctls submitting a batchbuffer 334for execution also include a list of all locations within buffers that 335refer to GPU-addresses so that the kernel can edit the buffer correctly. 336This process is dubbed relocation. 337 338Locking Guidelines 339------------------ 340 341.. note:: 342 This is a description of how the locking should be after 343 refactoring is done. Does not necessarily reflect what the locking 344 looks like while WIP. 345 346#. All locking rules and interface contracts with cross-driver interfaces 347 (dma-buf, dma_fence) need to be followed. 348 349#. No struct_mutex anywhere in the code 350 351#. dma_resv will be the outermost lock (when needed) and ww_acquire_ctx 352 is to be hoisted at highest level and passed down within i915_gem_ctx 353 in the call chain 354 355#. While holding lru/memory manager (buddy, drm_mm, whatever) locks 356 system memory allocations are not allowed 357 358 * Enforce this by priming lockdep (with fs_reclaim). If we 359 allocate memory while holding these looks we get a rehash 360 of the shrinker vs. struct_mutex saga, and that would be 361 real bad. 362 363#. Do not nest different lru/memory manager locks within each other. 364 Take them in turn to update memory allocations, relying on the object���s 365 dma_resv ww_mutex to serialize against other operations. 366 367#. The suggestion for lru/memory managers locks is that they are small 368 enough to be spinlocks. 369 370#. All features need to come with exhaustive kernel selftests and/or 371 IGT tests when appropriate 372 373#. All LMEM uAPI paths need to be fully restartable (_interruptible() 374 for all locks/waits/sleeps) 375 376 * Error handling validation through signal injection. 377 Still the best strategy we have for validating GEM uAPI 378 corner cases. 379 Must be excessively used in the IGT, and we need to check 380 that we really have full path coverage of all error cases. 381 382 * -EDEADLK handling with ww_mutex 383 384GEM BO Management Implementation Details 385---------------------------------------- 386 387.. kernel-doc:: drivers/gpu/drm/i915/i915_vma_types.h 388 :doc: Virtual Memory Address 389 390Buffer Object Eviction 391---------------------- 392 393This section documents the interface functions for evicting buffer 394objects to make space available in the virtual gpu address spaces. Note 395that this is mostly orthogonal to shrinking buffer objects caches, which 396has the goal to make main memory (shared with the gpu through the 397unified memory architecture) available. 398 399.. kernel-doc:: drivers/gpu/drm/i915/i915_gem_evict.c 400 :internal: 401 402Buffer Object Memory Shrinking 403------------------------------ 404 405This section documents the interface function for shrinking memory usage 406of buffer object caches. Shrinking is used to make main memory 407available. Note that this is mostly orthogonal to evicting buffer 408objects, which has the goal to make space in gpu virtual address spaces. 409 410.. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_shrinker.c 411 :internal: 412 413Batchbuffer Parsing 414------------------- 415 416.. kernel-doc:: drivers/gpu/drm/i915/i915_cmd_parser.c 417 :doc: batch buffer command parser 418 419.. kernel-doc:: drivers/gpu/drm/i915/i915_cmd_parser.c 420 :internal: 421 422User Batchbuffer Execution 423-------------------------- 424 425.. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_context_types.h 426 427.. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 428 :doc: User command execution 429 430Scheduling 431---------- 432.. kernel-doc:: drivers/gpu/drm/i915/i915_scheduler_types.h 433 :functions: i915_sched_engine 434 435Logical Rings, Logical Ring Contexts and Execlists 436-------------------------------------------------- 437 438.. kernel-doc:: drivers/gpu/drm/i915/gt/intel_execlists_submission.c 439 :doc: Logical Rings, Logical Ring Contexts and Execlists 440 441Global GTT views 442---------------- 443 444.. kernel-doc:: drivers/gpu/drm/i915/i915_vma_types.h 445 :doc: Global GTT views 446 447.. kernel-doc:: drivers/gpu/drm/i915/i915_gem_gtt.c 448 :internal: 449 450GTT Fences and Swizzling 451------------------------ 452 453.. kernel-doc:: drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c 454 :internal: 455 456Global GTT Fence Handling 457~~~~~~~~~~~~~~~~~~~~~~~~~ 458 459.. kernel-doc:: drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c 460 :doc: fence register handling 461 462Hardware Tiling and Swizzling Details 463~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 464 465.. kernel-doc:: drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c 466 :doc: tiling swizzling details 467 468Object Tiling IOCTLs 469-------------------- 470 471.. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_tiling.c 472 :internal: 473 474.. kernel-doc:: drivers/gpu/drm/i915/gem/i915_gem_tiling.c 475 :doc: buffer object tiling 476 477Protected Objects 478----------------- 479 480.. kernel-doc:: drivers/gpu/drm/i915/pxp/intel_pxp.c 481 :doc: PXP 482 483.. kernel-doc:: drivers/gpu/drm/i915/pxp/intel_pxp_types.h 484 485Microcontrollers 486================ 487 488Starting from gen9, three microcontrollers are available on the HW: the 489graphics microcontroller (GuC), the HEVC/H.265 microcontroller (HuC) and the 490display microcontroller (DMC). The driver is responsible for loading the 491firmwares on the microcontrollers; the GuC and HuC firmwares are transferred 492to WOPCM using the DMA engine, while the DMC firmware is written through MMIO. 493 494WOPCM 495----- 496 497WOPCM Layout 498~~~~~~~~~~~~ 499 500.. kernel-doc:: drivers/gpu/drm/i915/gt/intel_wopcm.c 501 :doc: WOPCM Layout 502 503GuC 504--- 505 506.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_guc.c 507 :doc: GuC 508 509.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_guc.h 510 511GuC Firmware Layout 512~~~~~~~~~~~~~~~~~~~ 513 514.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h 515 :doc: Firmware Layout 516 517GuC Memory Management 518~~~~~~~~~~~~~~~~~~~~~ 519 520.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_guc.c 521 :doc: GuC Memory Management 522.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_guc.c 523 :functions: intel_guc_allocate_vma 524 525 526GuC-specific firmware loader 527~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 528 529.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c 530 :internal: 531 532GuC-based command submission 533~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 534 535.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 536 :doc: GuC-based command submission 537 538GuC ABI 539~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 540 541.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/abi/guc_messages_abi.h 542.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/abi/guc_communication_mmio_abi.h 543.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/abi/guc_communication_ctb_abi.h 544.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h 545.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h 546 547HuC 548--- 549.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_huc.c 550 :doc: HuC 551.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_huc.c 552 :functions: intel_huc_auth 553 554HuC Memory Management 555~~~~~~~~~~~~~~~~~~~~~ 556 557.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_huc.c 558 :doc: HuC Memory Management 559 560HuC Firmware Layout 561~~~~~~~~~~~~~~~~~~~ 562The HuC FW layout is the same as the GuC one, see `GuC Firmware Layout`_ 563 564DMC 565--- 566See `DMC Firmware Support`_ 567 568Tracing 569======= 570 571This sections covers all things related to the tracepoints implemented 572in the i915 driver. 573 574i915_ppgtt_create and i915_ppgtt_release 575---------------------------------------- 576 577.. kernel-doc:: drivers/gpu/drm/i915/i915_trace.h 578 :doc: i915_ppgtt_create and i915_ppgtt_release tracepoints 579 580i915_context_create and i915_context_free 581----------------------------------------- 582 583.. kernel-doc:: drivers/gpu/drm/i915/i915_trace.h 584 :doc: i915_context_create and i915_context_free tracepoints 585 586Perf 587==== 588 589Overview 590-------- 591.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c 592 :doc: i915 Perf Overview 593 594Comparison with Core Perf 595------------------------- 596.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c 597 :doc: i915 Perf History and Comparison with Core Perf 598 599i915 Driver Entry Points 600------------------------ 601 602This section covers the entrypoints exported outside of i915_perf.c to 603integrate with drm/i915 and to handle the `DRM_I915_PERF_OPEN` ioctl. 604 605.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c 606 :functions: i915_perf_init 607.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c 608 :functions: i915_perf_fini 609.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c 610 :functions: i915_perf_register 611.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c 612 :functions: i915_perf_unregister 613.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c 614 :functions: i915_perf_open_ioctl 615.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c 616 :functions: i915_perf_release 617.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c 618 :functions: i915_perf_add_config_ioctl 619.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c 620 :functions: i915_perf_remove_config_ioctl 621 622i915 Perf Stream 623---------------- 624 625This section covers the stream-semantics-agnostic structures and functions 626for representing an i915 perf stream FD and associated file operations. 627 628.. kernel-doc:: drivers/gpu/drm/i915/i915_perf_types.h 629 :functions: i915_perf_stream 630.. kernel-doc:: drivers/gpu/drm/i915/i915_perf_types.h 631 :functions: i915_perf_stream_ops 632 633.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c 634 :functions: read_properties_unlocked 635.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c 636 :functions: i915_perf_open_ioctl_locked 637.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c 638 :functions: i915_perf_destroy_locked 639.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c 640 :functions: i915_perf_read 641.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c 642 :functions: i915_perf_ioctl 643.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c 644 :functions: i915_perf_enable_locked 645.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c 646 :functions: i915_perf_disable_locked 647.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c 648 :functions: i915_perf_poll 649.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c 650 :functions: i915_perf_poll_locked 651 652i915 Perf Observation Architecture Stream 653----------------------------------------- 654 655.. kernel-doc:: drivers/gpu/drm/i915/i915_perf_types.h 656 :functions: i915_oa_ops 657 658.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c 659 :functions: i915_oa_stream_init 660.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c 661 :functions: i915_oa_read 662.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c 663 :functions: i915_oa_stream_enable 664.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c 665 :functions: i915_oa_stream_disable 666.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c 667 :functions: i915_oa_wait_unlocked 668.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c 669 :functions: i915_oa_poll_wait 670 671Other i915 Perf Internals 672------------------------- 673 674This section simply includes all other currently documented i915 perf internals, 675in no particular order, but may include some more minor utilities or platform 676specific details than found in the more high-level sections. 677 678.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c 679 :internal: 680 :no-identifiers: 681 i915_perf_init 682 i915_perf_fini 683 i915_perf_register 684 i915_perf_unregister 685 i915_perf_open_ioctl 686 i915_perf_release 687 i915_perf_add_config_ioctl 688 i915_perf_remove_config_ioctl 689 read_properties_unlocked 690 i915_perf_open_ioctl_locked 691 i915_perf_destroy_locked 692 i915_perf_read i915_perf_ioctl 693 i915_perf_enable_locked 694 i915_perf_disable_locked 695 i915_perf_poll i915_perf_poll_locked 696 i915_oa_stream_init i915_oa_read 697 i915_oa_stream_enable 698 i915_oa_stream_disable 699 i915_oa_wait_unlocked 700 i915_oa_poll_wait 701 702Style 703===== 704 705The drm/i915 driver codebase has some style rules in addition to (and, in some 706cases, deviating from) the kernel coding style. 707 708Register macro definition style 709------------------------------- 710 711The style guide for ``i915_reg.h``. 712 713.. kernel-doc:: drivers/gpu/drm/i915/i915_reg.h 714 :doc: The i915 register macro definition style guide 715 716.. _i915-usage-stats: 717 718i915 DRM client usage stats implementation 719========================================== 720 721The drm/i915 driver implements the DRM client usage stats specification as 722documented in :ref:`drm-client-usage-stats`. 723 724Example of the output showing the implemented key value pairs and entirety of 725the currently possible format options: 726 727:: 728 729 pos: 0 730 flags: 0100002 731 mnt_id: 21 732 drm-driver: i915 733 drm-pdev: 0000:00:02.0 734 drm-client-id: 7 735 drm-engine-render: 9288864723 ns 736 drm-engine-copy: 2035071108 ns 737 drm-engine-video: 0 ns 738 drm-engine-capacity-video: 2 739 drm-engine-video-enhance: 0 ns 740 741Possible `drm-engine-` key names are: `render`, `copy`, `video` and 742`video-enhance`. 743