1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/qcom,msm8998-qmp-usb3-phy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm QMP PHY controller (USB, MSM8998)
8
9maintainers:
10  - Vinod Koul <vkoul@kernel.org>
11
12description:
13  The QMP PHY controller supports physical layer functionality for USB-C on
14  several Qualcomm chipsets.
15
16properties:
17  compatible:
18    enum:
19      - qcom,msm8998-qmp-usb3-phy
20      - qcom,qcm2290-qmp-usb3-phy
21      - qcom,sdm660-qmp-usb3-phy
22      - qcom,sm6115-qmp-usb3-phy
23
24  reg:
25    maxItems: 1
26
27  clocks:
28    maxItems: 4
29
30  clock-names:
31    maxItems: 4
32
33  resets:
34    maxItems: 2
35
36  reset-names:
37    items:
38      - const: phy
39      - const: phy_phy
40
41  vdda-phy-supply: true
42
43  vdda-pll-supply: true
44
45  "#clock-cells":
46    const: 0
47
48  clock-output-names:
49    maxItems: 1
50
51  "#phy-cells":
52    const: 0
53
54  orientation-switch:
55    description:
56      Flag the PHY as possible handler of USB Type-C orientation switching
57    type: boolean
58
59  qcom,tcsr-reg:
60    $ref: /schemas/types.yaml#/definitions/phandle-array
61    items:
62      - items:
63          - description: phandle to TCSR hardware block
64          - description: offset of the VLS CLAMP register
65    description: Clamp register present in the TCSR
66
67  ports:
68    $ref: /schemas/graph.yaml#/properties/ports
69    properties:
70      port@0:
71        $ref: /schemas/graph.yaml#/properties/port
72        description: Output endpoint of the PHY
73
74      port@1:
75        $ref: /schemas/graph.yaml#/properties/port
76        description: Incoming endpoint from the USB controller
77
78required:
79  - compatible
80  - reg
81  - clocks
82  - clock-names
83  - resets
84  - reset-names
85  - vdda-phy-supply
86  - vdda-pll-supply
87  - "#clock-cells"
88  - clock-output-names
89  - "#phy-cells"
90  - qcom,tcsr-reg
91
92allOf:
93  - if:
94      properties:
95        compatible:
96          contains:
97            enum:
98              - qcom,msm8998-qmp-usb3-phy
99              - qcom,sdm660-qmp-usb3-phy
100    then:
101      properties:
102        clocks:
103          maxItems: 4
104        clock-names:
105          items:
106            - const: aux
107            - const: ref
108            - const: cfg_ahb
109            - const: pipe
110
111  - if:
112      properties:
113        compatible:
114          contains:
115            enum:
116              - qcom,qcm2290-qmp-usb3-phy
117              - qcom,sm6115-qmp-usb3-phy
118    then:
119      properties:
120        clocks:
121          maxItems: 4
122        clock-names:
123          items:
124            - const: cfg_ahb
125            - const: ref
126            - const: com_aux
127            - const: pipe
128
129additionalProperties: false
130
131examples:
132  - |
133    #include <dt-bindings/clock/qcom,gcc-msm8998.h>
134    #include <dt-bindings/clock/qcom,rpmh.h>
135
136    phy@c010000 {
137      compatible = "qcom,msm8998-qmp-usb3-phy";
138      reg = <0x0c010000 0x1000>;
139
140      clocks = <&gcc GCC_USB3_PHY_AUX_CLK>,
141               <&gcc GCC_USB3_CLKREF_CLK>,
142               <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
143               <&gcc GCC_USB3_PHY_PIPE_CLK>;
144      clock-names = "aux",
145                    "ref",
146                    "cfg_ahb",
147                    "pipe";
148      clock-output-names = "usb3_phy_pipe_clk_src";
149      #clock-cells = <0>;
150      #phy-cells = <0>;
151
152      resets = <&gcc GCC_USB3_PHY_BCR>,
153               <&gcc GCC_USB3PHY_PHY_BCR>;
154      reset-names = "phy",
155                    "phy_phy";
156
157      vdda-phy-supply = <&vreg_l1a_0p875>;
158      vdda-pll-supply = <&vreg_l2a_1p2>;
159
160      orientation-switch;
161
162      qcom,tcsr-reg = <&tcsr_regs_1 0x6b244>;
163
164      ports {
165        #address-cells = <1>;
166        #size-cells = <0>;
167
168        port@0 {
169          reg = <0>;
170
171          endpoint {
172            remote-endpoint = <&pmic_typec_mux_in>;
173          };
174        };
175
176        port@1 {
177          reg = <1>;
178
179          endpoint {
180            remote-endpoint = <&usb_dwc3_ss>;
181          };
182        };
183      };
184    };
185