1/*
2 * Copyright (c) 2013 Qualcomm Atheros, Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
9 * REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
10 * AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
11 * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
12 * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
13 * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
14 * PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#include "opt_ah.h"
18
19#include "ah.h"
20#include "ah_desc.h"
21#include "ah_internal.h"
22
23#include "ar9300/ar9300.h"
24#include "ar9300/ar9300reg.h"
25#include "ar9300/ar9300desc.h"
26
27
28/*
29 * Process an RX descriptor, and return the status to the caller.
30 * Copy some hardware specific items into the software portion
31 * of the descriptor.
32 *
33 * NB: the caller is responsible for validating the memory contents
34 *     of the descriptor (e.g. flushing any cached copy).
35 */
36HAL_STATUS
37ar9300_proc_rx_desc_fast(struct ath_hal *ah, struct ath_desc *ds,
38    u_int32_t pa, struct ath_desc *nds, struct ath_rx_status *rxs,
39    void *buf_addr)
40{
41    struct ar9300_rxs *rxsp = AR9300RXS(buf_addr);
42
43    /*
44    ath_hal_printf(ah,"CHH=RX: ds_info 0x%x  status1: 0x%x  status11: 0x%x\n",
45                        rxsp->ds_info,rxsp->status1,rxsp->status11);
46     */
47
48    if ((rxsp->status11 & AR_rx_done) == 0) {
49        return HAL_EINPROGRESS;
50    }
51
52    if (MS(rxsp->ds_info, AR_desc_id) != 0x168c) {
53#if __PKT_SERIOUS_ERRORS__
54       /*BUG: 63564-HT */
55        HALDEBUG(AH_NULL, HAL_DEBUG_UNMASKABLE, "%s: Rx Descriptor error 0x%x\n",
56                 __func__, rxsp->ds_info);
57#endif
58        return HAL_EINVAL;
59    }
60
61    if ((rxsp->ds_info & (AR_tx_rx_desc | AR_ctrl_stat)) != 0) {
62#if __PKT_SERIOUS_ERRORS__
63        HALDEBUG(AH_NULL, HAL_DEBUG_UNMASKABLE,
64            "%s: Rx Descriptor wrong info 0x%x\n", __func__, rxsp->ds_info);
65#endif
66        return HAL_EINPROGRESS;
67    }
68
69    rxs->rs_status = 0;
70    rxs->rs_flags =  0;
71    rxs->rs_phyerr = 0;
72
73    rxs->rs_datalen = rxsp->status2 & AR_data_len;
74    rxs->rs_tstamp =  rxsp->status3;
75
76    /* XXX what about key_cache_miss? */
77    rxs->rs_rssi = MS(rxsp->status5, AR_rx_rssi_combined);
78    rxs->rs_rssi_ctl[0] = MS(rxsp->status1, AR_rx_rssi_ant00);
79    rxs->rs_rssi_ctl[1] = MS(rxsp->status1, AR_rx_rssi_ant01);
80    rxs->rs_rssi_ctl[2] = MS(rxsp->status1, AR_rx_rssi_ant02);
81    rxs->rs_rssi_ext[0] = MS(rxsp->status5, AR_rx_rssi_ant10);
82    rxs->rs_rssi_ext[1] = MS(rxsp->status5, AR_rx_rssi_ant11);
83    rxs->rs_rssi_ext[2] = MS(rxsp->status5, AR_rx_rssi_ant12);
84    if (rxsp->status11 & AR_rx_key_idx_valid) {
85        rxs->rs_keyix = MS(rxsp->status11, AR_key_idx);
86    } else {
87        rxs->rs_keyix = HAL_RXKEYIX_INVALID;
88    }
89    /* NB: caller expected to do rate table mapping */
90    rxs->rs_rate = MS(rxsp->status1, AR_rx_rate);
91    rxs->rs_more = (rxsp->status2 & AR_rx_more) ? 1 : 0;
92
93    rxs->rs_isaggr = (rxsp->status11 & AR_rx_aggr) ? 1 : 0;
94    rxs->rs_moreaggr = (rxsp->status11 & AR_rx_more_aggr) ? 1 : 0;
95    rxs->rs_antenna = (MS(rxsp->status4, AR_rx_antenna) & 0x7);
96    rxs->rs_flags = (rxsp->status11 & AR_apsd_trig) ? HAL_RX_IS_APSD : 0;
97    rxs->rs_flags |= (rxsp->status4 & AR_gi) ? HAL_RX_GI : 0;
98    rxs->rs_flags |= (rxsp->status4 & AR_2040) ? HAL_RX_2040 : 0;
99
100    /* TX beamforming; CSI for locationing */
101    rxs->rs_flags |= (rxsp->status2 & AR_hw_upload_data) ? HAL_RX_HW_UPLOAD_DATA : 0;
102    rxs->rs_flags |= (rxsp->status4 & AR_rx_not_sounding) ? 0 : HAL_RX_HW_SOUNDING;
103    rxs->rs_ness = MS(rxsp->status4, AR_rx_ness);
104    rxs->rs_flags |= (rxsp->status4 & AR_hw_upload_data_valid) ? HAL_RX_UPLOAD_VALID : 0;
105    rxs->rs_hw_upload_data_type = MS(rxsp->status11, AR_hw_upload_data_type);
106
107    /* Copy EVM information */
108    rxs->rs_evm0 = rxsp->status6;
109    rxs->rs_evm1 = rxsp->status7;
110    rxs->rs_evm2 = rxsp->status8;
111    rxs->rs_evm3 = rxsp->status9;
112    rxs->rs_evm4 = (rxsp->status10 & 0xffff);
113
114    if (rxsp->status11 & AR_pre_delim_crc_err) {
115        rxs->rs_flags |= HAL_RX_DELIM_CRC_PRE;
116    }
117    if (rxsp->status11 & AR_post_delim_crc_err) {
118        rxs->rs_flags |= HAL_RX_DELIM_CRC_POST;
119    }
120    if (rxsp->status11 & AR_decrypt_busy_err) {
121        rxs->rs_flags |= HAL_RX_DECRYPT_BUSY;
122    }
123    if (rxsp->status11 & AR_hi_rx_chain) {
124        rxs->rs_flags |= HAL_RX_HI_RX_CHAIN;
125    }
126    if (rxsp->status11 & AR_key_miss) {
127        rxs->rs_status |= HAL_RXERR_KEYMISS;
128    }
129
130    if ((rxsp->status11 & AR_rx_frame_ok) == 0) {
131        /*
132         * These four bits should not be set together.  The
133         * 9300 spec states a Michael error can only occur if
134         * decrypt_crc_err not set (and TKIP is used).  Experience
135         * indicates however that you can also get Michael errors
136         * when a CRC error is detected, but these are specious.
137         * Consequently we filter them out here so we don't
138         * confuse and/or complicate drivers.
139         */
140
141        if (rxsp->status11 & AR_crc_err) {
142            rxs->rs_status |= HAL_RXERR_CRC;
143            /*
144             * ignore CRC flag for phy reports
145             */
146            if (rxsp->status11 & AR_phyerr) {
147                u_int phyerr = MS(rxsp->status11, AR_phy_err_code);
148                rxs->rs_status |= HAL_RXERR_PHY;
149                rxs->rs_phyerr = phyerr;
150            }
151        } else if (rxsp->status11 & AR_phyerr) {
152            u_int phyerr;
153
154            /*
155             * Packets with OFDM_RESTART on post delimiter are CRC OK and
156             * usable and MAC ACKs them.
157             * To avoid packet from being lost, we remove the PHY Err flag
158             * so that lmac layer does not drop them.
159             * (EV 70071)
160             */
161            phyerr = MS(rxsp->status11, AR_phy_err_code);
162            if ((phyerr == HAL_PHYERR_OFDM_RESTART) &&
163                    (rxsp->status11 & AR_post_delim_crc_err)) {
164                rxs->rs_phyerr = 0;
165            } else {
166                rxs->rs_status |= HAL_RXERR_PHY;
167                rxs->rs_phyerr = phyerr;
168            }
169        } else if (rxsp->status11 & AR_decrypt_crc_err) {
170            rxs->rs_status |= HAL_RXERR_DECRYPT;
171        } else if (rxsp->status11 & AR_michael_err) {
172            rxs->rs_status |= HAL_RXERR_MIC;
173        }
174    } else {
175        if (rxsp->status11 & AR_position_bit) {
176#if 1
177            rxs->rs_flags |= HAL_RX_LOC_INFO;
178#else
179            /*
180             * If the locationing counter is enabled, Osprey always
181             * seems to put AR_position_bit in each frame.
182             * So, only do this if we also have a valid upload
183             * and it's type "1" (which I'm guessing is CSI.)
184             */
185            if ((rxs->rs_flags & HAL_RX_UPLOAD_VALID) &&
186                (rxs->rs_hw_upload_data_type == 1)) {
187                    rxs->rs_flags |= HAL_RX_LOC_INFO;
188            }
189#endif
190        }
191    }
192#if 0
193    rxs->rs_channel = AH_PRIVATE(ah)->ah_curchan->channel;
194#endif
195    return HAL_OK;
196}
197
198HAL_STATUS
199ar9300_proc_rx_desc(struct ath_hal *ah, struct ath_desc *ds,
200    u_int32_t pa, struct ath_desc *nds, u_int64_t tsf,
201    struct ath_rx_status *rxs)
202{
203    return HAL_ENOTSUPP;
204}
205
206/*
207 * rx path in ISR is different for ar9300 from ar5416, and
208 * ath_rx_proc_descfast will not be called if edmasupport is true.
209 * So this function ath_hal_get_rxkeyidx will not be
210 * called for ar9300.
211 * This function in ar9300's HAL is just a stub one because we need
212 * to link something to the callback interface of the HAL module.
213 */
214HAL_STATUS
215ar9300_get_rx_key_idx(struct ath_hal *ah, struct ath_desc *ds, u_int8_t *keyix,
216    u_int8_t *status)
217{
218    *status = 0;
219    *keyix = HAL_RXKEYIX_INVALID;
220    return HAL_ENOTSUPP;
221}
222