1/*- 2 * SPDX-License-Identifier: BSD-4-Clause 3 * 4 * Copyright (c) 2000 5 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Bill Paul. 18 * 4. Neither the name of the author nor the names of any co-contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGE. 33 * 34 * $FreeBSD: releng/12.0/sys/dev/mii/xmphyreg.h 325966 2017-11-18 14:26:50Z pfg $ 35 */ 36 37#ifndef _DEV_MII_XMPHYREG_H_ 38#define _DEV_MII_XMPHYREG_H_ 39 40/* 41 * XaQti XMAC II PHY registers 42 */ 43 44#define XMPHY_MII_BMCR 0x00 45#define XMPHY_BMCR_RESET 0x8000 46#define XMPHY_BMCR_LOOP 0x4000 47#define XMPHY_BMCR_AUTOEN 0x1000 /* Autoneg enabled */ 48#define XMPHY_BMCR_PDOWN 0x0800 /* Power down */ 49#define XMPHY_BMCR_ISO 0x0400 /* Isolate */ 50#define XMPHY_BMCR_STARTNEG 0x0200 /* Restart autoneg */ 51#define XMPHY_BMCR_FDX 0x0100 /* Duplex mode */ 52 53#define XMPHY_MII_BMSR 0x01 54#define XMPHY_BMSR_EXTSTS 0x0100 /* Extended status present */ 55#define XMPHY_BMSR_ACOMP 0x0020 /* Autoneg complete */ 56#define XMPHY_BMSR_RFAULT 0x0010 /* Remote fault condition occurred */ 57#define XMPHY_BMSR_ANEG 0x0008 /* Autoneg capable */ 58#define XMPHY_BMSR_LINK 0x0004 /* Link status */ 59#define XMPHY_BMSR_EXT 0x0001 /* Extended capability */ 60 61#define XMPHY_MII_ANAR 0x04 62#define XMPHY_ANAR_NP 0x8000 /* Next page */ 63#define XMPHY_ANAR_ACK 0x4000 /* Next page or base received */ 64#define XMPHY_ANAR_RFBITS 0x3000 /* Remote fault bits */ 65#define XMPHY_ANAR_PAUSEBITS 0x0180 /* Pause bits */ 66#define XMPHY_ANAR_HDX 0x0040 /* Select half duplex */ 67#define XMPHY_ANAR_FDX 0x0020 /* Select full duplex */ 68 69#define XMPHY_MII_ANLPAR 0x05 70#define XMPHY_ANLPAR_NP 0x8000 /* Next page */ 71#define XMPHY_ANLPAR_ACK 0x4000 /* Next page or base received */ 72#define XMPHY_ANLPAR_RFBITS 0x3000 /* Remote fault bits */ 73#define XMPHY_ANLPAR_PAUSEBITS 0x0180 /* Pause bits */ 74#define XMPHY_ANLPAR_HDX 0x0040 /* Select half duplex */ 75#define XMPHY_ANLPAR_FDX 0x0020 /* Select full duplex */ 76 77#define XMPHY_RF_OK 0x0000 /* No error -- link is good */ 78#define XMPHY_RF_LINKFAIL 0x1000 /* Link failure */ 79#define XMPHY_RF_OFFLINE 0x2000 /* Offline */ 80#define XMPHY_RF_ANEGFAIL 0x3000 /* Autonegotiation error */ 81 82#define XMPHY_PAUSE_NOPAUSE 0x0000 /* No pause possible */ 83#define XMPHY_PAUSE_ASYMETRIC 0x0080 /* Asymetric pause toward LP */ 84#define XMPHY_PAUSE_SYMETRIC 0x0100 /* Symetric pause */ 85#define XMPHY_PAUSE_BOTH 0x0180 /* Both sym and asym pause */ 86 87#define XMPHY_MII_ANER 0x06 88#define XMPHY_ANER_LPNP 0x0008 /* Link partner can next page */ 89#define XMPHY_ANER_NP 0x0004 /* Local PHY can next page */ 90#define XMPHY_ANER_RX 0x0002 /* Next page received */ 91 92#define XMPHY_MII_NEXTP 0x07 /* Next page */ 93#define XMPHY_NEXTP_MORE 0x8000 /* More next pages to follow */ 94#define XMPHY_NEXTP_ACK1 0x4000 /* Ack bit received OK */ 95#define XMPHY_NEXTP_MP 0x2000 /* Page is message page */ 96#define XMPHY_NEXTP_ACK2 0x1000 /* can comply with message (r/o) */ 97#define XMPHY_NEXTP_TOGGLE 0x0800 /* sync with LP */ 98#define XMPHY_NEXTP_MESSAGE 0x07FF /* message */ 99 100#define XMPHY_MII_NEXTPLP 0x08 /* Next page of link partner */ 101#define XMPHY_NEXTPLP_MORE 0x8000 /* More next pages to follow */ 102#define XMPHY_NEXTPLP_ACK1 0x4000 /* Ack bit received OK */ 103#define XMPHY_NEXTPLP_MP 0x2000 /* Page is message page */ 104#define XMPHY_NEXTPLP_ACK2 0x1000 /* can comply with message (r/o) */ 105#define XMPHY_NEXTPLP_TOGGLE 0x0800 /* sync with LP */ 106#define XMPHY_NEXTPLP_MESSAGE 0x07FF /* message */ 107 108#define XMPHY_MII_EXTSTS 0x0F /* Extended status */ 109#define XMPHY_EXTSTS_FDX 0x8000 /* 1000base-X FD capable */ 110#define XMPHY_EXTSTS_HDX 0x4000 /* 1000base-X HD capable */ 111 112#define XMPHY_MII_RESAB 0x10 /* Resolved ability */ 113#define XMPHY_RESAB_PAUSEBITS 0x0180 /* Pause bits */ 114#define XMPHY_RESAB_HDX 0x0040 /* Half duplex selected */ 115#define XMPHY_RESAB_FDX 0x0020 /* Full duplex selected */ 116#define XMPHY_RESAB_ABLMIS 0x0010 /* Ability mismatch */ 117#define XMPHY_RESAB_PAUSEMIS 0x0008 /* Pause mismatch */ 118 119#endif /* _DEV_MII_XMPHYREG_H_ */ 120