1/*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2010, Pyun YongHyeon <yongari@FreeBSD.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice unmodified, this list of conditions, and the following 12 * disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD: releng/12.0/sys/dev/mii/rdcphyreg.h 326255 2017-11-27 14:52:40Z pfg $ 30 */ 31 32#ifndef _DEV_MII_RDCPHYREG_H_ 33#define _DEV_MII_RDCPHYREG_H_ 34 35#define MII_RDCPHY_DEBUG 0x11 36#define DEBUG_JABBER_DIS 0x0040 37#define DEBUG_LOOP_BACK_10MBPS 0x0400 38 39#define MII_RDCPHY_CTRL 0x14 40#define CTRL_SQE_ENB 0x0100 41#define CTRL_NEG_POLARITY 0x0400 42#define CTRL_AUTO_POLARITY 0x0800 43#define CTRL_MDIXSEL_RX 0x2000 44#define CTRL_MDIXSEL_TX 0x4000 45#define CTRL_AUTO_MDIX_DIS 0x8000 46 47#define MII_RDCPHY_CTRL2 0x15 48#define CTRL2_LED_DUPLEX 0x0000 49#define CTRL2_LED_DUPLEX_COL 0x0008 50#define CTRL2_LED_ACT 0x0010 51#define CTRL2_LED_SPEED_ACT 0x0018 52#define CTRL2_LED_BLK_100MBPS_DIS 0x0020 53#define CTRL2_LED_BLK_10MBPS_DIS 0x0040 54#define CTRL2_LED_BLK_LINK_ACT_DIS 0x0080 55#define CTRL2_SDT_THRESH_MASK 0x3E00 56#define CTRL2_TIMING_ERR_SEL 0x4000 57#define CTRL2_LED_BLK_80MS 0x8000 58#define CTRL2_LED_BLK_160MS 0x0000 59#define CTRL2_LED_MASK 0x0018 60 61#define MII_RDCPHY_STATUS 0x16 62#define STATUS_AUTO_MDIX_RX 0x0200 63#define STATUS_AUTO_MDIX_TX 0x0400 64#define STATUS_NEG_POLARITY 0x0800 65#define STATUS_FULL_DUPLEX 0x1000 66#define STATUS_SPEED_10 0x0000 67#define STATUS_SPEED_100 0x2000 68#define STATUS_SPEED_MASK 0x6000 69#define STATUS_LINK_UP 0x8000 70 71/* Analog test register 2 */ 72#define MII_RDCPHY_TEST2 0x1A 73#define TEST2_PWR_DOWN 0x0200 74 75#endif /* _DEV_MII_RDCPHYREG_H_ */ 76