1/****************************************************************************** 2 SPDX-License-Identifier: BSD-3-Clause 3 4 Copyright (c) 2001-2020, Intel Corporation 5 All rights reserved. 6 7 Redistribution and use in source and binary forms, with or without 8 modification, are permitted provided that the following conditions are met: 9 10 1. Redistributions of source code must retain the above copyright notice, 11 this list of conditions and the following disclaimer. 12 13 2. Redistributions in binary form must reproduce the above copyright 14 notice, this list of conditions and the following disclaimer in the 15 documentation and/or other materials provided with the distribution. 16 17 3. Neither the name of the Intel Corporation nor the names of its 18 contributors may be used to endorse or promote products derived from 19 this software without specific prior written permission. 20 21 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 25 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 POSSIBILITY OF SUCH DAMAGE. 32 33******************************************************************************/ 34/*$FreeBSD$*/ 35 36 37#ifndef _FREEBSD_OS_H_ 38#define _FREEBSD_OS_H_ 39 40#include <sys/types.h> 41#include <sys/param.h> 42#include <sys/systm.h> 43#include <sys/proc.h> 44#include <sys/lock.h> 45#include <sys/mutex.h> 46#include <sys/mbuf.h> 47#include <sys/protosw.h> 48#include <sys/socket.h> 49#include <sys/malloc.h> 50#include <sys/kernel.h> 51#include <sys/bus.h> 52#include <sys/sx.h> 53 54#include <net/ethernet.h> 55#include <net/if.h> 56#include <net/if_var.h> 57#include <net/iflib.h> 58 59 60 61#include <machine/bus.h> 62#include <sys/rman.h> 63#include <machine/resource.h> 64#include <vm/vm.h> 65#include <vm/pmap.h> 66#include <machine/clock.h> 67#include <dev/pci/pcivar.h> 68#include <dev/pci/pcireg.h> 69 70 71#define ASSERT(x) if(!(x)) panic("EM: x") 72#define us_scale(x) max(1, (x/(1000000/hz))) 73static inline int 74ms_scale(int x) { 75 if (hz == 1000) { 76 return (x); 77 } else if (hz > 1000) { 78 return (x*(hz/1000)); 79 } else { 80 return (max(1, x/(1000/hz))); 81 } 82} 83 84static inline void 85safe_pause_us(int x) { 86#ifndef __HAIKU__ 87 if (cold) { 88 DELAY(x); 89 } else { 90 pause("e1000_delay", max(1, x/(1000000/hz))); 91 } 92#else 93 DELAY(x); 94#endif 95} 96 97static inline void 98safe_pause_ms(int x) { 99 if (cold) { 100 DELAY(x*1000); 101 } else { 102 pause("e1000_delay", ms_scale(x)); 103 } 104} 105 106#define usec_delay(x) safe_pause_us(x) 107#define usec_delay_irq(x) usec_delay(x) 108#define msec_delay(x) safe_pause_ms(x) 109#define msec_delay_irq(x) msec_delay(x) 110 111/* Enable/disable debugging statements in shared code */ 112#define DBG 0 113 114#define DEBUGOUT(...) \ 115 do { if (DBG) printf(__VA_ARGS__); } while (0) 116#define DEBUGOUT1(...) DEBUGOUT(__VA_ARGS__) 117#define DEBUGOUT2(...) DEBUGOUT(__VA_ARGS__) 118#define DEBUGOUT3(...) DEBUGOUT(__VA_ARGS__) 119#define DEBUGOUT7(...) DEBUGOUT(__VA_ARGS__) 120#define DEBUGFUNC(F) DEBUGOUT(F "\n") 121 122#define STATIC static 123#define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */ 124#define PCI_COMMAND_REGISTER PCIR_COMMAND 125 126typedef uint64_t u64; 127typedef uint32_t u32; 128typedef uint16_t u16; 129typedef uint8_t u8; 130typedef int64_t s64; 131typedef int32_t s32; 132typedef int16_t s16; 133typedef int8_t s8; 134 135#define __le16 u16 136#define __le32 u32 137#define __le64 u64 138 139#if __FreeBSD_version < 800000 140#if defined(__i386__) || defined(__amd64__) 141#define mb() __asm volatile("mfence" ::: "memory") 142#define wmb() __asm volatile("sfence" ::: "memory") 143#define rmb() __asm volatile("lfence" ::: "memory") 144#else 145#define mb() 146#define rmb() 147#define wmb() 148#endif 149#endif /*__FreeBSD_version < 800000 */ 150 151#if defined(INVARIANTS) && !defined(__HAIKU__) 152#define ASSERT_CTX_LOCK_HELD(hw) (sx_assert(iflib_ctx_lock_get(((struct e1000_osdep *)hw->back)->ctx), SX_XLOCKED)) 153#else 154#define ASSERT_CTX_LOCK_HELD(hw) 155#endif 156 157#if defined(__i386__) || defined(__amd64__) 158static __inline 159void prefetch(void *x) 160{ 161 __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x)); 162} 163#else 164#define prefetch(x) 165#endif 166 167struct e1000_osdep 168{ 169 bus_space_tag_t mem_bus_space_tag; 170 bus_space_handle_t mem_bus_space_handle; 171 bus_space_tag_t io_bus_space_tag; 172 bus_space_handle_t io_bus_space_handle; 173 bus_space_tag_t flash_bus_space_tag; 174 bus_space_handle_t flash_bus_space_handle; 175 device_t dev; 176 if_ctx_t ctx; 177}; 178 179#define E1000_REGISTER(hw, reg) (((hw)->mac.type >= e1000_82543) \ 180 ? reg : e1000_translate_register_82542(reg)) 181 182#define E1000_WRITE_FLUSH(a) E1000_READ_REG(a, E1000_STATUS) 183 184/* Read from an absolute offset in the adapter's memory space */ 185#define E1000_READ_OFFSET(hw, offset) \ 186 bus_space_read_4(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \ 187 ((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, offset) 188 189/* Write to an absolute offset in the adapter's memory space */ 190#define E1000_WRITE_OFFSET(hw, offset, value) \ 191 bus_space_write_4(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \ 192 ((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, offset, value) 193 194/* Register READ/WRITE macros */ 195 196#define E1000_READ_REG(hw, reg) \ 197 bus_space_read_4(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \ 198 ((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, \ 199 E1000_REGISTER(hw, reg)) 200 201#define E1000_WRITE_REG(hw, reg, value) \ 202 bus_space_write_4(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \ 203 ((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, \ 204 E1000_REGISTER(hw, reg), value) 205 206#define E1000_READ_REG_ARRAY(hw, reg, index) \ 207 bus_space_read_4(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \ 208 ((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, \ 209 E1000_REGISTER(hw, reg) + ((index)<< 2)) 210 211#define E1000_WRITE_REG_ARRAY(hw, reg, index, value) \ 212 bus_space_write_4(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \ 213 ((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, \ 214 E1000_REGISTER(hw, reg) + ((index)<< 2), value) 215 216#define E1000_READ_REG_ARRAY_DWORD E1000_READ_REG_ARRAY 217#define E1000_WRITE_REG_ARRAY_DWORD E1000_WRITE_REG_ARRAY 218 219#define E1000_READ_REG_ARRAY_BYTE(hw, reg, index) \ 220 bus_space_read_1(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \ 221 ((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, \ 222 E1000_REGISTER(hw, reg) + index) 223 224#define E1000_WRITE_REG_ARRAY_BYTE(hw, reg, index, value) \ 225 bus_space_write_1(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \ 226 ((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, \ 227 E1000_REGISTER(hw, reg) + index, value) 228 229#define E1000_WRITE_REG_ARRAY_WORD(hw, reg, index, value) \ 230 bus_space_write_2(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \ 231 ((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, \ 232 E1000_REGISTER(hw, reg) + (index << 1), value) 233 234#define E1000_WRITE_REG_IO(hw, reg, value) do {\ 235 bus_space_write_4(((struct e1000_osdep *)(hw)->back)->io_bus_space_tag, \ 236 ((struct e1000_osdep *)(hw)->back)->io_bus_space_handle, \ 237 (hw)->io_base, reg); \ 238 bus_space_write_4(((struct e1000_osdep *)(hw)->back)->io_bus_space_tag, \ 239 ((struct e1000_osdep *)(hw)->back)->io_bus_space_handle, \ 240 (hw)->io_base + 4, value); } while (0) 241 242#define E1000_READ_FLASH_REG(hw, reg) \ 243 bus_space_read_4(((struct e1000_osdep *)(hw)->back)->flash_bus_space_tag, \ 244 ((struct e1000_osdep *)(hw)->back)->flash_bus_space_handle, reg) 245 246#define E1000_READ_FLASH_REG16(hw, reg) \ 247 bus_space_read_2(((struct e1000_osdep *)(hw)->back)->flash_bus_space_tag, \ 248 ((struct e1000_osdep *)(hw)->back)->flash_bus_space_handle, reg) 249 250#define E1000_WRITE_FLASH_REG(hw, reg, value) \ 251 bus_space_write_4(((struct e1000_osdep *)(hw)->back)->flash_bus_space_tag, \ 252 ((struct e1000_osdep *)(hw)->back)->flash_bus_space_handle, reg, value) 253 254#define E1000_WRITE_FLASH_REG16(hw, reg, value) \ 255 bus_space_write_2(((struct e1000_osdep *)(hw)->back)->flash_bus_space_tag, \ 256 ((struct e1000_osdep *)(hw)->back)->flash_bus_space_handle, reg, value) 257 258 259#if defined(INVARIANTS) && !defined(__HAIKU__) 260#include <sys/proc.h> 261 262#define ASSERT_NO_LOCKS() \ 263 do { \ 264 int unknown_locks = curthread->td_locks - mtx_owned(&Giant); \ 265 if (unknown_locks > 0) { \ 266 WITNESS_WARN(WARN_GIANTOK|WARN_SLEEPOK|WARN_PANIC, NULL, "unexpected non-sleepable lock"); \ 267 } \ 268 MPASS(curthread->td_rw_rlocks == 0); \ 269 MPASS(curthread->td_lk_slocks == 0); \ 270 } while (0) 271#else 272#define ASSERT_NO_LOCKS() 273#endif 274 275#endif /* _FREEBSD_OS_H_ */ 276 277