1/*
2 * Copyright 2014, Paweł Dziepak, pdziepak@quarnos.org.
3 * Distributed under the terms of the MIT License.
4 */
5#ifndef _KERNEL_ARCH_X86_64_ATOMIC_H
6#define _KERNEL_ARCH_X86_64_ATOMIC_H
7
8
9static inline void
10memory_read_barrier_inline(void)
11{
12	asm volatile("lfence" : : : "memory");
13}
14
15
16static inline void
17memory_write_barrier_inline(void)
18{
19	asm volatile("sfence" : : : "memory");
20}
21
22
23static inline void
24memory_full_barrier_inline(void)
25{
26	asm volatile("mfence" : : : "memory");
27}
28
29
30#define memory_read_barrier		memory_read_barrier_inline
31#define memory_write_barrier	memory_write_barrier_inline
32#define memory_full_barrier		memory_full_barrier_inline
33
34#endif	// _KERNEL_ARCH_X86_64_ATOMIC_H
35
36