1/*
2 * Copyright (c) 2008 Travis Geiselbrecht
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining
5 * a copy of this software and associated documentation files
6 * (the "Software"), to deal in the Software without restriction,
7 * including without limitation the rights to use, copy, modify, merge,
8 * publish, distribute, sublicense, and/or sell copies of the Software,
9 * and to permit persons to whom the Software is furnished to do so,
10 * subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
18 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
19 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
20 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
21 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23#ifndef __PLATFORM_PXA270_H
24#define __PLATFORM_PXA270_H
25
26#define SDRAM_BASE 0xa2000000
27
28#define VECT_BASE 0x00000000
29#define VECT_SIZE 0x1000
30
31#define DEVICE_BASE 0x40000000
32#define DEVICE_SIZE 0x5000000
33
34/* UART */
35#define FFUART_BASE    0x40100000
36#define BTUART_BASE    0x40200000
37#define STUART_BASE    0x40700000
38#define CKEN           0x41300004
39#define UART_RHR    0
40#define UART_THR    0
41#define UART_DLL    0
42#define UART_IER    1
43#define UART_DLH    1
44#define UART_IIR    2
45#define UART_FCR    2
46#define UART_EFR    2
47#define UART_LCR    3
48#define UART_MCR    4
49#define UART_LSR    5
50#define UART_MSR    6
51#define UART_TCR    6
52#define UART_SPR    7
53#define UART_TLR    7
54#define UART_MDR1   8
55#define UART_MDR2   9
56#define UART_SFLSR  10
57#define UART_RESUME 11
58#define UART_TXFLL  10
59#define UART_TXFLH  11
60#define UART_SFREGL 12
61#define UART_SFREGH 13
62#define UART_RXFLL  12
63#define UART_RXFLH  13
64#define UART_BLR    14
65#define UART_UASR   14
66#define UART_ACREG  15
67#define UART_SCR    16
68#define UART_SSR    17
69#define UART_EBLR   18
70#define UART_MVR    19
71#define UART_SYSC   20
72
73/* DMA controller */
74
75#ifndef _ASSEMBLER
76
77typedef struct pxa27x_dma_descriptor {
78	uint32 ddadr;
79	uint32 dsadr;
80	uint32 dtadr;
81	uint32 dcmd;
82} pxa27x_dma_descriptor __attribute__ ((aligned(16)));
83
84#endif	// !_ASSEMBLER
85
86/* LCD controller */
87
88#define LCC_BASE	0x44000000
89
90#define LCCR0		(LCC_BASE+0x00)
91#define LCCR1		(LCC_BASE+0x04)
92#define LCCR2		(LCC_BASE+0x08)
93#define LCCR3		(LCC_BASE+0x0C)
94#define LCCR4		(LCC_BASE+0x10)
95#define LCCR5		(LCC_BASE+0x14)
96
97#define LCSR1		(LCC_BASE+0x34)
98#define LCSR0		(LCC_BASE+0x38)
99#define LIIDR		(LCC_BASE+0x3C)
100
101#define OVL1C1		(LCC_BASE+0x50)
102#define OVL1C2		(LCC_BASE+0x60)
103#define OVL2C1		(LCC_BASE+0x70)
104#define OVL2C2		(LCC_BASE+0x80)
105
106#define LCC_CCR		(LCC_BASE+0x90)
107#define LCC_CMDCR	(LCC_BASE+0x100)
108
109#define FDADR0		(LCC_BASE+0x200)
110#define FBR0		(LCC_BASE+0x020)
111#define FSADR0		(LCC_BASE+0x204)
112
113#ifndef _ASSEMBLER
114
115typedef struct pxa27x_lcd_dma_descriptor {
116	uint32 fdadr;
117	uint32 fsadr;
118	uint32 fidr;
119	uint32 ldcmd;
120} pxa27x_lcd_dma_descriptor __attribute__ ((aligned(16)));
121
122#endif	// !_ASSEMBLER
123
124#endif /* __PLATFORM_PXA270_H */
125