1/*-
2 * Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD$
27 */
28
29#ifndef	_FENV_H_
30#define	_FENV_H_
31
32#include <stdint.h>
33#include <sys/cdefs.h>
34#include <sys/types.h>
35
36/*
37 * To preserve binary compatibility with FreeBSD 5.3, we pack the
38 * mxcsr into some reserved fields, rather than changing sizeof(fenv_t).
39 */
40typedef struct {
41	uint16_t	__control;
42	uint16_t  __mxcsr_hi;
43	uint16_t	__status;
44	uint16_t  __mxcsr_lo;
45	uint32_t	__tag;
46	char	__other[16];
47} fenv_t;
48
49#define	__get_mxcsr(env)	(((env).__mxcsr_hi << 16) |	\
50				 ((env).__mxcsr_lo))
51#define	__set_mxcsr(env, x)	do {				\
52	(env).__mxcsr_hi = (uint32_t)(x) >> 16;		\
53	(env).__mxcsr_lo = (uint16_t)(x);			\
54} while (0)
55
56typedef	uint16_t	fexcept_t;
57
58/* Exception flags */
59#define	FE_INVALID	0x01
60#define	FE_DENORMAL	0x02
61#define	FE_DIVBYZERO	0x04
62#define	FE_OVERFLOW	0x08
63#define	FE_UNDERFLOW	0x10
64#define	FE_INEXACT	0x20
65#define	FE_ALL_EXCEPT	(FE_DIVBYZERO | FE_DENORMAL | FE_INEXACT | \
66			 FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW)
67
68/* Rounding modes */
69#define	FE_TONEAREST	0x0000
70#define	FE_DOWNWARD	0x0400
71#define	FE_UPWARD	0x0800
72#define	FE_TOWARDZERO	0x0c00
73#define	_ROUND_MASK	(FE_TONEAREST | FE_DOWNWARD | \
74			 FE_UPWARD | FE_TOWARDZERO)
75
76/*
77 * As compared to the x87 control word, the SSE unit's control word
78 * has the rounding control bits offset by 3 and the exception mask
79 * bits offset by 7.
80 */
81#define	_SSE_ROUND_SHIFT	3
82#define	_SSE_EMASK_SHIFT	7
83
84__BEGIN_DECLS
85
86/* After testing for SSE support once, we cache the result in __has_sse. */
87enum __sse_support { __SSE_YES, __SSE_NO, __SSE_UNK };
88extern enum __sse_support __has_sse;
89int __test_sse(void);
90#ifdef __SSE__
91#define	__HAS_SSE()	1
92#else
93#define	__HAS_SSE()	(__has_sse == __SSE_YES ||			\
94			 (__has_sse == __SSE_UNK && __test_sse()))
95#endif
96
97/* Default floating-point environment */
98extern const fenv_t	__fe_dfl_env;
99#define	FE_DFL_ENV	(&__fe_dfl_env)
100
101#define	__fldcw(__cw)		__asm __volatile("fldcw %0" : : "m" (__cw))
102#define	__fldenv(__env)		__asm __volatile("fldenv %0" : : "m" (__env))
103#define	__fldenvx(__env)	__asm __volatile("fldenv %0" : : "m" (__env)  \
104				: "st", "st(1)", "st(2)", "st(3)", "st(4)",   \
105				"st(5)", "st(6)", "st(7)")
106#define	__fnclex()		__asm __volatile("fnclex")
107#define	__fnstenv(__env)	__asm __volatile("fnstenv %0" : "=m" (*(__env)))
108#define	__fnstcw(__cw)		__asm __volatile("fnstcw %0" : "=m" (*(__cw)))
109#define	__fnstsw(__sw)		__asm __volatile("fnstsw %0" : "=m" (*(__sw)))
110#define	__fwait()		__asm __volatile("fwait")
111#define	__ldmxcsr(__csr)	__asm __volatile("ldmxcsr %0" : : "m" (__csr))
112#define	__stmxcsr(__csr)	__asm __volatile("stmxcsr %0" : "=m" (*(__csr)))
113
114static __inline int
115feclearexcept(int __excepts)
116{
117	fenv_t __env;
118	short __mxcsr;
119
120	if (__excepts == FE_ALL_EXCEPT) {
121		__fnclex();
122	} else {
123		__fnstenv(&__env);
124		__env.__status &= ~__excepts;
125		__fldenv(__env);
126	}
127	if (__HAS_SSE()) {
128		__stmxcsr(&__mxcsr);
129		__mxcsr &= ~__excepts;
130		__ldmxcsr(__mxcsr);
131	}
132	return (0);
133}
134
135static __inline int
136fegetexceptflag(fexcept_t *__flagp, int __excepts)
137{
138	int __mxcsr, __status;
139
140	__fnstsw(&__status);
141	if (__HAS_SSE())
142		__stmxcsr(&__mxcsr);
143	else
144		__mxcsr = 0;
145	*__flagp = (__mxcsr | __status) & __excepts;
146	return (0);
147}
148
149int fesetexceptflag(const fexcept_t *__flagp, int __excepts);
150int feraiseexcept(int __excepts);
151
152static __inline int
153fetestexcept(int __excepts)
154{
155	int __mxcsr, __status;
156
157	__fnstsw(&__status);
158	if (__HAS_SSE())
159		__stmxcsr(&__mxcsr);
160	else
161		__mxcsr = 0;
162	return ((__status | __mxcsr) & __excepts);
163}
164
165static __inline int
166fegetround(void)
167{
168	int __control;
169
170	/*
171	 * We assume that the x87 and the SSE unit agree on the
172	 * rounding mode.  Reading the control word on the x87 turns
173	 * out to be about 5 times faster than reading it on the SSE
174	 * unit on an Opteron 244.
175	 */
176	__fnstcw(&__control);
177	return (__control & _ROUND_MASK);
178}
179
180static __inline int
181fesetround(int __round)
182{
183	int __mxcsr, __control;
184
185	if (__round & ~_ROUND_MASK)
186		return (-1);
187
188	__fnstcw(&__control);
189	__control &= ~_ROUND_MASK;
190	__control |= __round;
191	__fldcw(__control);
192
193	if (__HAS_SSE()) {
194		__stmxcsr(&__mxcsr);
195		__mxcsr &= ~(_ROUND_MASK << _SSE_ROUND_SHIFT);
196		__mxcsr |= __round << _SSE_ROUND_SHIFT;
197		__ldmxcsr(__mxcsr);
198	}
199
200	return (0);
201}
202
203int fegetenv(fenv_t *__envp);
204int feholdexcept(fenv_t *__envp);
205
206static __inline int
207fesetenv(const fenv_t *__envp)
208{
209	fenv_t __env = *__envp;
210	int __mxcsr;
211
212	__mxcsr = __get_mxcsr(__env);
213	__set_mxcsr(__env, 0xffffffff);
214	/*
215	 * XXX Using fldenvx() instead of fldenv() tells the compiler that this
216	 * instruction clobbers the i387 register stack.  This happens because
217	 * we restore the tag word from the saved environment.  Normally, this
218	 * would happen anyway and we wouldn't care, because the ABI allows
219	 * function calls to clobber the i387 regs.  However, fesetenv() is
220	 * inlined, so we need to be more careful.
221	 */
222	__fldenvx(__env);
223	if (__HAS_SSE())
224		__ldmxcsr(__mxcsr);
225	return (0);
226}
227
228int feupdateenv(const fenv_t *__envp);
229
230#if __BSD_VISIBLE
231
232int feenableexcept(int __mask);
233int fedisableexcept(int __mask);
234
235static __inline int
236fegetexcept(void)
237{
238	int __control;
239
240	/*
241	 * We assume that the masks for the x87 and the SSE unit are
242	 * the same.
243	 */
244	__fnstcw(&__control);
245	return (~__control & FE_ALL_EXCEPT);
246}
247
248#endif /* __BSD_VISIBLE */
249
250__END_DECLS
251
252#endif	/* !_FENV_H_ */
253