1/* Instruction opcode table for ip2k. 2 3THIS FILE IS MACHINE GENERATED WITH CGEN. 4 5Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. 6 7This file is part of the GNU Binutils and/or GDB, the GNU debugger. 8 9This program is free software; you can redistribute it and/or modify 10it under the terms of the GNU General Public License as published by 11the Free Software Foundation; either version 2, or (at your option) 12any later version. 13 14This program is distributed in the hope that it will be useful, 15but WITHOUT ANY WARRANTY; without even the implied warranty of 16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17GNU General Public License for more details. 18 19You should have received a copy of the GNU General Public License along 20with this program; if not, write to the Free Software Foundation, Inc., 2159 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 22 23*/ 24 25#include "sysdep.h" 26#include "ansidecl.h" 27#include "bfd.h" 28#include "symcat.h" 29#include "ip2k-desc.h" 30#include "ip2k-opc.h" 31#include "libiberty.h" 32 33/* -- opc.c */ 34 35#include "safe-ctype.h" 36 37/* A better hash function for instruction mnemonics. */ 38unsigned int 39ip2k_asm_hash (insn) 40 const char* insn; 41{ 42 unsigned int hash; 43 const char* m = insn; 44 45 for (hash = 0; *m && !ISSPACE(*m); m++) 46 hash = (hash * 23) ^ (0x1F & TOLOWER(*m)); 47 48 /* printf ("%s %d\n", insn, (hash % CGEN_ASM_HASH_SIZE)); */ 49 50 return hash % CGEN_ASM_HASH_SIZE; 51} 52 53 54/* Special check to ensure that instruction exists for given machine. */ 55int 56ip2k_cgen_insn_supported (cd, insn) 57 CGEN_CPU_DESC cd; 58 const CGEN_INSN *insn; 59{ 60 int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH); 61 62 /* No mach attribute? Assume it's supported for all machs. */ 63 if (machs == 0) 64 return 1; 65 66 return ((machs & cd->machs) != 0); 67} 68 69 70/* -- asm.c */ 71/* The hash functions are recorded here to help keep assembler code out of 72 the disassembler and vice versa. */ 73 74static int asm_hash_insn_p PARAMS ((const CGEN_INSN *)); 75static unsigned int asm_hash_insn PARAMS ((const char *)); 76static int dis_hash_insn_p PARAMS ((const CGEN_INSN *)); 77static unsigned int dis_hash_insn PARAMS ((const char *, CGEN_INSN_INT)); 78 79/* Instruction formats. */ 80 81#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) 82#define F(f) & ip2k_cgen_ifld_table[IP2K_##f] 83#else 84#define F(f) & ip2k_cgen_ifld_table[IP2K_/**/f] 85#endif 86static const CGEN_IFMT ifmt_empty = { 87 0, 0, 0x0, { { 0 } } 88}; 89 90static const CGEN_IFMT ifmt_jmp = { 91 16, 16, 0xe000, { { F (F_OP3) }, { F (F_ADDR16CJP) }, { 0 } } 92}; 93 94static const CGEN_IFMT ifmt_sb = { 95 16, 16, 0xf000, { { F (F_OP4) }, { F (F_BITNO) }, { F (F_REG) }, { 0 } } 96}; 97 98static const CGEN_IFMT ifmt_xorw_l = { 99 16, 16, 0xff00, { { F (F_OP4) }, { F (F_OP4MID) }, { F (F_IMM8) }, { 0 } } 100}; 101 102static const CGEN_IFMT ifmt_loadl_a = { 103 16, 16, 0xff00, { { F (F_OP4) }, { F (F_OP4MID) }, { F (F_IMM8) }, { 0 } } 104}; 105 106static const CGEN_IFMT ifmt_loadh_a = { 107 16, 16, 0xff00, { { F (F_OP4) }, { F (F_OP4MID) }, { F (F_IMM8) }, { 0 } } 108}; 109 110static const CGEN_IFMT ifmt_addcfr_w = { 111 16, 16, 0xfe00, { { F (F_OP6) }, { F (F_DIR) }, { F (F_REG) }, { 0 } } 112}; 113 114static const CGEN_IFMT ifmt_speed = { 115 16, 16, 0xff00, { { F (F_OP8) }, { F (F_IMM8) }, { 0 } } 116}; 117 118static const CGEN_IFMT ifmt_ireadi = { 119 16, 16, 0xffff, { { F (F_OP6) }, { F (F_OP6_10LOW) }, { 0 } } 120}; 121 122static const CGEN_IFMT ifmt_page = { 123 16, 16, 0xfff8, { { F (F_OP6) }, { F (F_OP6_7LOW) }, { F (F_PAGE3) }, { 0 } } 124}; 125 126static const CGEN_IFMT ifmt_reti = { 127 16, 16, 0xfff8, { { F (F_OP6) }, { F (F_OP6_7LOW) }, { F (F_RETI3) }, { 0 } } 128}; 129 130#undef F 131 132#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) 133#define A(a) (1 << CGEN_INSN_##a) 134#else 135#define A(a) (1 << CGEN_INSN_/**/a) 136#endif 137#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) 138#define OPERAND(op) IP2K_OPERAND_##op 139#else 140#define OPERAND(op) IP2K_OPERAND_/**/op 141#endif 142#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */ 143#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field)) 144 145/* The instruction table. */ 146 147static const CGEN_OPCODE ip2k_cgen_insn_opcode_table[MAX_INSNS] = 148{ 149 /* Special null first entry. 150 A `num' value of zero is thus invalid. 151 Also, the special `invalid' insn resides here. */ 152 { { 0, 0, 0, 0 }, {{0}}, 0, {0}}, 153/* jmp $addr16cjp */ 154 { 155 { 0, 0, 0, 0 }, 156 { { MNEM, ' ', OP (ADDR16CJP), 0 } }, 157 & ifmt_jmp, { 0xe000 } 158 }, 159/* call $addr16cjp */ 160 { 161 { 0, 0, 0, 0 }, 162 { { MNEM, ' ', OP (ADDR16CJP), 0 } }, 163 & ifmt_jmp, { 0xc000 } 164 }, 165/* sb $fr,$bitno */ 166 { 167 { 0, 0, 0, 0 }, 168 { { MNEM, ' ', OP (FR), ',', OP (BITNO), 0 } }, 169 & ifmt_sb, { 0xb000 } 170 }, 171/* snb $fr,$bitno */ 172 { 173 { 0, 0, 0, 0 }, 174 { { MNEM, ' ', OP (FR), ',', OP (BITNO), 0 } }, 175 & ifmt_sb, { 0xa000 } 176 }, 177/* setb $fr,$bitno */ 178 { 179 { 0, 0, 0, 0 }, 180 { { MNEM, ' ', OP (FR), ',', OP (BITNO), 0 } }, 181 & ifmt_sb, { 0x9000 } 182 }, 183/* clrb $fr,$bitno */ 184 { 185 { 0, 0, 0, 0 }, 186 { { MNEM, ' ', OP (FR), ',', OP (BITNO), 0 } }, 187 & ifmt_sb, { 0x8000 } 188 }, 189/* xor W,#$lit8 */ 190 { 191 { 0, 0, 0, 0 }, 192 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } }, 193 & ifmt_xorw_l, { 0x7f00 } 194 }, 195/* and W,#$lit8 */ 196 { 197 { 0, 0, 0, 0 }, 198 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } }, 199 & ifmt_xorw_l, { 0x7e00 } 200 }, 201/* or W,#$lit8 */ 202 { 203 { 0, 0, 0, 0 }, 204 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } }, 205 & ifmt_xorw_l, { 0x7d00 } 206 }, 207/* add W,#$lit8 */ 208 { 209 { 0, 0, 0, 0 }, 210 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } }, 211 & ifmt_xorw_l, { 0x7b00 } 212 }, 213/* sub W,#$lit8 */ 214 { 215 { 0, 0, 0, 0 }, 216 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } }, 217 & ifmt_xorw_l, { 0x7a00 } 218 }, 219/* cmp W,#$lit8 */ 220 { 221 { 0, 0, 0, 0 }, 222 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } }, 223 & ifmt_xorw_l, { 0x7900 } 224 }, 225/* retw #$lit8 */ 226 { 227 { 0, 0, 0, 0 }, 228 { { MNEM, ' ', '#', OP (LIT8), 0 } }, 229 & ifmt_xorw_l, { 0x7800 } 230 }, 231/* cse W,#$lit8 */ 232 { 233 { 0, 0, 0, 0 }, 234 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } }, 235 & ifmt_xorw_l, { 0x7700 } 236 }, 237/* csne W,#$lit8 */ 238 { 239 { 0, 0, 0, 0 }, 240 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } }, 241 & ifmt_xorw_l, { 0x7600 } 242 }, 243/* push #$lit8 */ 244 { 245 { 0, 0, 0, 0 }, 246 { { MNEM, ' ', '#', OP (LIT8), 0 } }, 247 & ifmt_xorw_l, { 0x7400 } 248 }, 249/* muls W,#$lit8 */ 250 { 251 { 0, 0, 0, 0 }, 252 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } }, 253 & ifmt_xorw_l, { 0x7300 } 254 }, 255/* mulu W,#$lit8 */ 256 { 257 { 0, 0, 0, 0 }, 258 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } }, 259 & ifmt_xorw_l, { 0x7200 } 260 }, 261/* loadl #$lit8 */ 262 { 263 { 0, 0, 0, 0 }, 264 { { MNEM, ' ', '#', OP (LIT8), 0 } }, 265 & ifmt_xorw_l, { 0x7100 } 266 }, 267/* loadh #$lit8 */ 268 { 269 { 0, 0, 0, 0 }, 270 { { MNEM, ' ', '#', OP (LIT8), 0 } }, 271 & ifmt_xorw_l, { 0x7000 } 272 }, 273/* loadl $addr16l */ 274 { 275 { 0, 0, 0, 0 }, 276 { { MNEM, ' ', OP (ADDR16L), 0 } }, 277 & ifmt_loadl_a, { 0x7100 } 278 }, 279/* loadh $addr16h */ 280 { 281 { 0, 0, 0, 0 }, 282 { { MNEM, ' ', OP (ADDR16H), 0 } }, 283 & ifmt_loadh_a, { 0x7000 } 284 }, 285/* addc $fr,W */ 286 { 287 { 0, 0, 0, 0 }, 288 { { MNEM, ' ', OP (FR), ',', 'W', 0 } }, 289 & ifmt_addcfr_w, { 0x5e00 } 290 }, 291/* addc W,$fr */ 292 { 293 { 0, 0, 0, 0 }, 294 { { MNEM, ' ', 'W', ',', OP (FR), 0 } }, 295 & ifmt_addcfr_w, { 0x5c00 } 296 }, 297/* incsnz $fr */ 298 { 299 { 0, 0, 0, 0 }, 300 { { MNEM, ' ', OP (FR), 0 } }, 301 & ifmt_addcfr_w, { 0x5a00 } 302 }, 303/* incsnz W,$fr */ 304 { 305 { 0, 0, 0, 0 }, 306 { { MNEM, ' ', 'W', ',', OP (FR), 0 } }, 307 & ifmt_addcfr_w, { 0x5800 } 308 }, 309/* muls W,$fr */ 310 { 311 { 0, 0, 0, 0 }, 312 { { MNEM, ' ', 'W', ',', OP (FR), 0 } }, 313 & ifmt_addcfr_w, { 0x5400 } 314 }, 315/* mulu W,$fr */ 316 { 317 { 0, 0, 0, 0 }, 318 { { MNEM, ' ', 'W', ',', OP (FR), 0 } }, 319 & ifmt_addcfr_w, { 0x5000 } 320 }, 321/* decsnz $fr */ 322 { 323 { 0, 0, 0, 0 }, 324 { { MNEM, ' ', OP (FR), 0 } }, 325 & ifmt_addcfr_w, { 0x4e00 } 326 }, 327/* decsnz W,$fr */ 328 { 329 { 0, 0, 0, 0 }, 330 { { MNEM, ' ', 'W', ',', OP (FR), 0 } }, 331 & ifmt_addcfr_w, { 0x4c00 } 332 }, 333/* subc W,$fr */ 334 { 335 { 0, 0, 0, 0 }, 336 { { MNEM, ' ', 'W', ',', OP (FR), 0 } }, 337 & ifmt_addcfr_w, { 0x4800 } 338 }, 339/* subc $fr,W */ 340 { 341 { 0, 0, 0, 0 }, 342 { { MNEM, ' ', OP (FR), ',', 'W', 0 } }, 343 & ifmt_addcfr_w, { 0x4a00 } 344 }, 345/* pop $fr */ 346 { 347 { 0, 0, 0, 0 }, 348 { { MNEM, ' ', OP (FR), 0 } }, 349 & ifmt_addcfr_w, { 0x4600 } 350 }, 351/* push $fr */ 352 { 353 { 0, 0, 0, 0 }, 354 { { MNEM, ' ', OP (FR), 0 } }, 355 & ifmt_addcfr_w, { 0x4400 } 356 }, 357/* cse W,$fr */ 358 { 359 { 0, 0, 0, 0 }, 360 { { MNEM, ' ', 'W', ',', OP (FR), 0 } }, 361 & ifmt_addcfr_w, { 0x4200 } 362 }, 363/* csne W,$fr */ 364 { 365 { 0, 0, 0, 0 }, 366 { { MNEM, ' ', 'W', ',', OP (FR), 0 } }, 367 & ifmt_addcfr_w, { 0x4000 } 368 }, 369/* incsz $fr */ 370 { 371 { 0, 0, 0, 0 }, 372 { { MNEM, ' ', OP (FR), 0 } }, 373 & ifmt_addcfr_w, { 0x3e00 } 374 }, 375/* incsz W,$fr */ 376 { 377 { 0, 0, 0, 0 }, 378 { { MNEM, ' ', 'W', ',', OP (FR), 0 } }, 379 & ifmt_addcfr_w, { 0x3c00 } 380 }, 381/* swap $fr */ 382 { 383 { 0, 0, 0, 0 }, 384 { { MNEM, ' ', OP (FR), 0 } }, 385 & ifmt_addcfr_w, { 0x3a00 } 386 }, 387/* swap W,$fr */ 388 { 389 { 0, 0, 0, 0 }, 390 { { MNEM, ' ', 'W', ',', OP (FR), 0 } }, 391 & ifmt_addcfr_w, { 0x3800 } 392 }, 393/* rl $fr */ 394 { 395 { 0, 0, 0, 0 }, 396 { { MNEM, ' ', OP (FR), 0 } }, 397 & ifmt_addcfr_w, { 0x3600 } 398 }, 399/* rl W,$fr */ 400 { 401 { 0, 0, 0, 0 }, 402 { { MNEM, ' ', 'W', ',', OP (FR), 0 } }, 403 & ifmt_addcfr_w, { 0x3400 } 404 }, 405/* rr $fr */ 406 { 407 { 0, 0, 0, 0 }, 408 { { MNEM, ' ', OP (FR), 0 } }, 409 & ifmt_addcfr_w, { 0x3200 } 410 }, 411/* rr W,$fr */ 412 { 413 { 0, 0, 0, 0 }, 414 { { MNEM, ' ', 'W', ',', OP (FR), 0 } }, 415 & ifmt_addcfr_w, { 0x3000 } 416 }, 417/* decsz $fr */ 418 { 419 { 0, 0, 0, 0 }, 420 { { MNEM, ' ', OP (FR), 0 } }, 421 & ifmt_addcfr_w, { 0x2e00 } 422 }, 423/* decsz W,$fr */ 424 { 425 { 0, 0, 0, 0 }, 426 { { MNEM, ' ', 'W', ',', OP (FR), 0 } }, 427 & ifmt_addcfr_w, { 0x2c00 } 428 }, 429/* inc $fr */ 430 { 431 { 0, 0, 0, 0 }, 432 { { MNEM, ' ', OP (FR), 0 } }, 433 & ifmt_addcfr_w, { 0x2a00 } 434 }, 435/* inc W,$fr */ 436 { 437 { 0, 0, 0, 0 }, 438 { { MNEM, ' ', 'W', ',', OP (FR), 0 } }, 439 & ifmt_addcfr_w, { 0x2800 } 440 }, 441/* not $fr */ 442 { 443 { 0, 0, 0, 0 }, 444 { { MNEM, ' ', OP (FR), 0 } }, 445 & ifmt_addcfr_w, { 0x2600 } 446 }, 447/* not W,$fr */ 448 { 449 { 0, 0, 0, 0 }, 450 { { MNEM, ' ', 'W', ',', OP (FR), 0 } }, 451 & ifmt_addcfr_w, { 0x2400 } 452 }, 453/* test $fr */ 454 { 455 { 0, 0, 0, 0 }, 456 { { MNEM, ' ', OP (FR), 0 } }, 457 & ifmt_addcfr_w, { 0x2200 } 458 }, 459/* mov W,#$lit8 */ 460 { 461 { 0, 0, 0, 0 }, 462 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } }, 463 & ifmt_xorw_l, { 0x7c00 } 464 }, 465/* mov $fr,W */ 466 { 467 { 0, 0, 0, 0 }, 468 { { MNEM, ' ', OP (FR), ',', 'W', 0 } }, 469 & ifmt_addcfr_w, { 0x200 } 470 }, 471/* mov W,$fr */ 472 { 473 { 0, 0, 0, 0 }, 474 { { MNEM, ' ', 'W', ',', OP (FR), 0 } }, 475 & ifmt_addcfr_w, { 0x2000 } 476 }, 477/* add $fr,W */ 478 { 479 { 0, 0, 0, 0 }, 480 { { MNEM, ' ', OP (FR), ',', 'W', 0 } }, 481 & ifmt_addcfr_w, { 0x1e00 } 482 }, 483/* add W,$fr */ 484 { 485 { 0, 0, 0, 0 }, 486 { { MNEM, ' ', 'W', ',', OP (FR), 0 } }, 487 & ifmt_addcfr_w, { 0x1c00 } 488 }, 489/* xor $fr,W */ 490 { 491 { 0, 0, 0, 0 }, 492 { { MNEM, ' ', OP (FR), ',', 'W', 0 } }, 493 & ifmt_addcfr_w, { 0x1a00 } 494 }, 495/* xor W,$fr */ 496 { 497 { 0, 0, 0, 0 }, 498 { { MNEM, ' ', 'W', ',', OP (FR), 0 } }, 499 & ifmt_addcfr_w, { 0x1800 } 500 }, 501/* and $fr,W */ 502 { 503 { 0, 0, 0, 0 }, 504 { { MNEM, ' ', OP (FR), ',', 'W', 0 } }, 505 & ifmt_addcfr_w, { 0x1600 } 506 }, 507/* and W,$fr */ 508 { 509 { 0, 0, 0, 0 }, 510 { { MNEM, ' ', 'W', ',', OP (FR), 0 } }, 511 & ifmt_addcfr_w, { 0x1400 } 512 }, 513/* or $fr,W */ 514 { 515 { 0, 0, 0, 0 }, 516 { { MNEM, ' ', OP (FR), ',', 'W', 0 } }, 517 & ifmt_addcfr_w, { 0x1200 } 518 }, 519/* or W,$fr */ 520 { 521 { 0, 0, 0, 0 }, 522 { { MNEM, ' ', 'W', ',', OP (FR), 0 } }, 523 & ifmt_addcfr_w, { 0x1000 } 524 }, 525/* dec $fr */ 526 { 527 { 0, 0, 0, 0 }, 528 { { MNEM, ' ', OP (FR), 0 } }, 529 & ifmt_addcfr_w, { 0xe00 } 530 }, 531/* dec W,$fr */ 532 { 533 { 0, 0, 0, 0 }, 534 { { MNEM, ' ', 'W', ',', OP (FR), 0 } }, 535 & ifmt_addcfr_w, { 0xc00 } 536 }, 537/* sub $fr,W */ 538 { 539 { 0, 0, 0, 0 }, 540 { { MNEM, ' ', OP (FR), ',', 'W', 0 } }, 541 & ifmt_addcfr_w, { 0xa00 } 542 }, 543/* sub W,$fr */ 544 { 545 { 0, 0, 0, 0 }, 546 { { MNEM, ' ', 'W', ',', OP (FR), 0 } }, 547 & ifmt_addcfr_w, { 0x800 } 548 }, 549/* clr $fr */ 550 { 551 { 0, 0, 0, 0 }, 552 { { MNEM, ' ', OP (FR), 0 } }, 553 & ifmt_addcfr_w, { 0x600 } 554 }, 555/* cmp W,$fr */ 556 { 557 { 0, 0, 0, 0 }, 558 { { MNEM, ' ', 'W', ',', OP (FR), 0 } }, 559 & ifmt_addcfr_w, { 0x400 } 560 }, 561/* speed #$lit8 */ 562 { 563 { 0, 0, 0, 0 }, 564 { { MNEM, ' ', '#', OP (LIT8), 0 } }, 565 & ifmt_speed, { 0x100 } 566 }, 567/* ireadi */ 568 { 569 { 0, 0, 0, 0 }, 570 { { MNEM, 0 } }, 571 & ifmt_ireadi, { 0x1d } 572 }, 573/* iwritei */ 574 { 575 { 0, 0, 0, 0 }, 576 { { MNEM, 0 } }, 577 & ifmt_ireadi, { 0x1c } 578 }, 579/* fread */ 580 { 581 { 0, 0, 0, 0 }, 582 { { MNEM, 0 } }, 583 & ifmt_ireadi, { 0x1b } 584 }, 585/* fwrite */ 586 { 587 { 0, 0, 0, 0 }, 588 { { MNEM, 0 } }, 589 & ifmt_ireadi, { 0x1a } 590 }, 591/* iread */ 592 { 593 { 0, 0, 0, 0 }, 594 { { MNEM, 0 } }, 595 & ifmt_ireadi, { 0x19 } 596 }, 597/* iwrite */ 598 { 599 { 0, 0, 0, 0 }, 600 { { MNEM, 0 } }, 601 & ifmt_ireadi, { 0x18 } 602 }, 603/* page $addr16p */ 604 { 605 { 0, 0, 0, 0 }, 606 { { MNEM, ' ', OP (ADDR16P), 0 } }, 607 & ifmt_page, { 0x10 } 608 }, 609/* system */ 610 { 611 { 0, 0, 0, 0 }, 612 { { MNEM, 0 } }, 613 & ifmt_ireadi, { 0xff } 614 }, 615/* reti #$reti3 */ 616 { 617 { 0, 0, 0, 0 }, 618 { { MNEM, ' ', '#', OP (RETI3), 0 } }, 619 & ifmt_reti, { 0x8 } 620 }, 621/* ret */ 622 { 623 { 0, 0, 0, 0 }, 624 { { MNEM, 0 } }, 625 & ifmt_ireadi, { 0x7 } 626 }, 627/* int */ 628 { 629 { 0, 0, 0, 0 }, 630 { { MNEM, 0 } }, 631 & ifmt_ireadi, { 0x6 } 632 }, 633/* breakx */ 634 { 635 { 0, 0, 0, 0 }, 636 { { MNEM, 0 } }, 637 & ifmt_ireadi, { 0x5 } 638 }, 639/* cwdt */ 640 { 641 { 0, 0, 0, 0 }, 642 { { MNEM, 0 } }, 643 & ifmt_ireadi, { 0x4 } 644 }, 645/* ferase */ 646 { 647 { 0, 0, 0, 0 }, 648 { { MNEM, 0 } }, 649 & ifmt_ireadi, { 0x3 } 650 }, 651/* retnp */ 652 { 653 { 0, 0, 0, 0 }, 654 { { MNEM, 0 } }, 655 & ifmt_ireadi, { 0x2 } 656 }, 657/* break */ 658 { 659 { 0, 0, 0, 0 }, 660 { { MNEM, 0 } }, 661 & ifmt_ireadi, { 0x1 } 662 }, 663/* nop */ 664 { 665 { 0, 0, 0, 0 }, 666 { { MNEM, 0 } }, 667 & ifmt_ireadi, { 0x0 } 668 }, 669}; 670 671#undef A 672#undef OPERAND 673#undef MNEM 674#undef OP 675 676/* Formats for ALIAS macro-insns. */ 677 678#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) 679#define F(f) & ip2k_cgen_ifld_table[IP2K_##f] 680#else 681#define F(f) & ip2k_cgen_ifld_table[IP2K_/**/f] 682#endif 683static const CGEN_IFMT ifmt_sc = { 684 16, 16, 0xffff, { { F (F_OP4) }, { F (F_BITNO) }, { F (F_REG) }, { 0 } } 685}; 686 687static const CGEN_IFMT ifmt_snc = { 688 16, 16, 0xffff, { { F (F_OP4) }, { F (F_BITNO) }, { F (F_REG) }, { 0 } } 689}; 690 691static const CGEN_IFMT ifmt_sz = { 692 16, 16, 0xffff, { { F (F_OP4) }, { F (F_BITNO) }, { F (F_REG) }, { 0 } } 693}; 694 695static const CGEN_IFMT ifmt_snz = { 696 16, 16, 0xffff, { { F (F_OP4) }, { F (F_BITNO) }, { F (F_REG) }, { 0 } } 697}; 698 699static const CGEN_IFMT ifmt_skip = { 700 16, 16, 0xffff, { { F (F_OP4) }, { F (F_BITNO) }, { F (F_REG) }, { 0 } } 701}; 702 703static const CGEN_IFMT ifmt_skipb = { 704 16, 16, 0xffff, { { F (F_OP4) }, { F (F_BITNO) }, { F (F_REG) }, { 0 } } 705}; 706 707#undef F 708 709/* Each non-simple macro entry points to an array of expansion possibilities. */ 710 711#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) 712#define A(a) (1 << CGEN_INSN_##a) 713#else 714#define A(a) (1 << CGEN_INSN_/**/a) 715#endif 716#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) 717#define OPERAND(op) IP2K_OPERAND_##op 718#else 719#define OPERAND(op) IP2K_OPERAND_/**/op 720#endif 721#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */ 722#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field)) 723 724/* The macro instruction table. */ 725 726static const CGEN_IBASE ip2k_cgen_macro_insn_table[] = 727{ 728/* sc */ 729 { 730 -1, "sc", "sc", 16, 731 { 0|A(ALIAS), { (1<<MACH_BASE) } } 732 }, 733/* snc */ 734 { 735 -1, "snc", "snc", 16, 736 { 0|A(ALIAS), { (1<<MACH_BASE) } } 737 }, 738/* sz */ 739 { 740 -1, "sz", "sz", 16, 741 { 0|A(ALIAS), { (1<<MACH_BASE) } } 742 }, 743/* snz */ 744 { 745 -1, "snz", "snz", 16, 746 { 0|A(ALIAS), { (1<<MACH_BASE) } } 747 }, 748/* skip */ 749 { 750 -1, "skip", "skip", 16, 751 { 0|A(SKIPA)|A(ALIAS), { (1<<MACH_BASE) } } 752 }, 753/* skip */ 754 { 755 -1, "skipb", "skip", 16, 756 { 0|A(SKIPA)|A(ALIAS), { (1<<MACH_BASE) } } 757 }, 758}; 759 760/* The macro instruction opcode table. */ 761 762static const CGEN_OPCODE ip2k_cgen_macro_insn_opcode_table[] = 763{ 764/* sc */ 765 { 766 { 0, 0, 0, 0 }, 767 { { MNEM, 0 } }, 768 & ifmt_sc, { 0xb00b } 769 }, 770/* snc */ 771 { 772 { 0, 0, 0, 0 }, 773 { { MNEM, 0 } }, 774 & ifmt_snc, { 0xa00b } 775 }, 776/* sz */ 777 { 778 { 0, 0, 0, 0 }, 779 { { MNEM, 0 } }, 780 & ifmt_sz, { 0xb40b } 781 }, 782/* snz */ 783 { 784 { 0, 0, 0, 0 }, 785 { { MNEM, 0 } }, 786 & ifmt_snz, { 0xa40b } 787 }, 788/* skip */ 789 { 790 { 0, 0, 0, 0 }, 791 { { MNEM, 0 } }, 792 & ifmt_skip, { 0xa009 } 793 }, 794/* skip */ 795 { 796 { 0, 0, 0, 0 }, 797 { { MNEM, 0 } }, 798 & ifmt_skipb, { 0xb009 } 799 }, 800}; 801 802#undef A 803#undef OPERAND 804#undef MNEM 805#undef OP 806 807#ifndef CGEN_ASM_HASH_P 808#define CGEN_ASM_HASH_P(insn) 1 809#endif 810 811#ifndef CGEN_DIS_HASH_P 812#define CGEN_DIS_HASH_P(insn) 1 813#endif 814 815/* Return non-zero if INSN is to be added to the hash table. 816 Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */ 817 818static int 819asm_hash_insn_p (insn) 820 const CGEN_INSN *insn ATTRIBUTE_UNUSED; 821{ 822 return CGEN_ASM_HASH_P (insn); 823} 824 825static int 826dis_hash_insn_p (insn) 827 const CGEN_INSN *insn; 828{ 829 /* If building the hash table and the NO-DIS attribute is present, 830 ignore. */ 831 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS)) 832 return 0; 833 return CGEN_DIS_HASH_P (insn); 834} 835 836#ifndef CGEN_ASM_HASH 837#define CGEN_ASM_HASH_SIZE 127 838#ifdef CGEN_MNEMONIC_OPERANDS 839#define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) 840#else 841#define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/ 842#endif 843#endif 844 845/* It doesn't make much sense to provide a default here, 846 but while this is under development we do. 847 BUFFER is a pointer to the bytes of the insn, target order. 848 VALUE is the first base_insn_bitsize bits as an int in host order. */ 849 850#ifndef CGEN_DIS_HASH 851#define CGEN_DIS_HASH_SIZE 256 852#define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf)) 853#endif 854 855/* The result is the hash value of the insn. 856 Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */ 857 858static unsigned int 859asm_hash_insn (mnem) 860 const char * mnem; 861{ 862 return CGEN_ASM_HASH (mnem); 863} 864 865/* BUF is a pointer to the bytes of the insn, target order. 866 VALUE is the first base_insn_bitsize bits as an int in host order. */ 867 868static unsigned int 869dis_hash_insn (buf, value) 870 const char * buf ATTRIBUTE_UNUSED; 871 CGEN_INSN_INT value ATTRIBUTE_UNUSED; 872{ 873 return CGEN_DIS_HASH (buf, value); 874} 875 876static void set_fields_bitsize PARAMS ((CGEN_FIELDS *, int)); 877 878/* Set the recorded length of the insn in the CGEN_FIELDS struct. */ 879 880static void 881set_fields_bitsize (fields, size) 882 CGEN_FIELDS *fields; 883 int size; 884{ 885 CGEN_FIELDS_BITSIZE (fields) = size; 886} 887 888/* Function to call before using the operand instance table. 889 This plugs the opcode entries and macro instructions into the cpu table. */ 890 891void 892ip2k_cgen_init_opcode_table (cd) 893 CGEN_CPU_DESC cd; 894{ 895 int i; 896 int num_macros = (sizeof (ip2k_cgen_macro_insn_table) / 897 sizeof (ip2k_cgen_macro_insn_table[0])); 898 const CGEN_IBASE *ib = & ip2k_cgen_macro_insn_table[0]; 899 const CGEN_OPCODE *oc = & ip2k_cgen_macro_insn_opcode_table[0]; 900 CGEN_INSN *insns = (CGEN_INSN *) xmalloc (num_macros * sizeof (CGEN_INSN)); 901 memset (insns, 0, num_macros * sizeof (CGEN_INSN)); 902 for (i = 0; i < num_macros; ++i) 903 { 904 insns[i].base = &ib[i]; 905 insns[i].opcode = &oc[i]; 906 ip2k_cgen_build_insn_regex (& insns[i]); 907 } 908 cd->macro_insn_table.init_entries = insns; 909 cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE); 910 cd->macro_insn_table.num_init_entries = num_macros; 911 912 oc = & ip2k_cgen_insn_opcode_table[0]; 913 insns = (CGEN_INSN *) cd->insn_table.init_entries; 914 for (i = 0; i < MAX_INSNS; ++i) 915 { 916 insns[i].opcode = &oc[i]; 917 ip2k_cgen_build_insn_regex (& insns[i]); 918 } 919 920 cd->sizeof_fields = sizeof (CGEN_FIELDS); 921 cd->set_fields_bitsize = set_fields_bitsize; 922 923 cd->asm_hash_p = asm_hash_insn_p; 924 cd->asm_hash = asm_hash_insn; 925 cd->asm_hash_size = CGEN_ASM_HASH_SIZE; 926 927 cd->dis_hash_p = dis_hash_insn_p; 928 cd->dis_hash = dis_hash_insn; 929 cd->dis_hash_size = CGEN_DIS_HASH_SIZE; 930} 931