1/*
2 * Copyright 2007-2012, Haiku, Inc. All Rights Reserved.
3 * Distributed under the terms of the MIT License.
4 *
5 * Authors:
6 *		Ithamar Adema, ithamar AT unet DOT nl
7 *		Axel Dörfler, axeld@pinc-software.de
8 */
9#ifndef _HDA_H_
10#define _HDA_H_
11
12#include <KernelExport.h>
13#include <Drivers.h>
14#include <PCI.h>
15
16#include <string.h>
17#include <stdlib.h>
18
19#ifndef HAIKU_TARGET_PLATFORM_HAIKU
20#	define DEVFS_PATH_FORMAT	"audio/multi/hda/%lu"
21#	include <multi_audio.h>
22#else
23#	define DEVFS_PATH_FORMAT	"audio/hmulti/hda/%lu"
24#	include <hmulti_audio.h>
25#endif
26
27#include "hda_controller_defs.h"
28#include "hda_codec_defs.h"
29
30#define MAX_CARDS				4
31
32/* values for the class_sub field for class_base = 0x04 (multimedia device) */
33#ifndef __HAIKU__
34#	define PCI_hd_audio			3
35#endif
36
37#define HDA_MAX_AUDIO_GROUPS	15
38#define HDA_MAX_CODECS			15
39#define HDA_MAX_STREAMS			16
40#define MAX_CODEC_RESPONSES		16
41#define MAX_CODEC_UNSOL_RESPONSES 16
42#define MAX_INPUTS				32
43#define MAX_IO_WIDGETS			8
44#define MAX_ASSOCIATIONS		16
45#define MAX_ASSOCIATION_PINS	16
46
47#define STREAM_MAX_BUFFERS	10
48#define STREAM_MIN_BUFFERS	2
49
50
51enum {
52	STREAM_PLAYBACK,
53	STREAM_RECORD
54};
55
56struct hda_codec;
57struct hda_stream;
58struct hda_multi;
59
60/*!	This structure describes a single HDA compliant
61	controller. It contains a list of available streams
62	for use by the codecs contained, and the messaging queue
63	(verb/response) buffers for communication.
64*/
65struct hda_controller {
66	struct pci_info	pci_info;
67	vint32			opened;
68	const char*		devfs_path;
69
70	area_id			regs_area;
71	vuint8*			regs;
72	uint32			irq;
73	bool			msi;
74
75	uint16			codec_status;
76	uint32			num_input_streams;
77	uint32			num_output_streams;
78	uint32			num_bidir_streams;
79
80	uint32			corb_length;
81	uint32			rirb_length;
82	uint32			rirb_read_pos;
83	uint32			corb_write_pos;
84	area_id			corb_rirb_pos_area;
85	corb_t*			corb;
86	rirb_t*			rirb;
87	uint32*			stream_positions;
88
89	hda_codec*		codecs[HDA_MAX_CODECS + 1];
90	hda_codec*		active_codec;
91	uint32			num_codecs;
92
93	hda_stream*		streams[HDA_MAX_STREAMS];
94	sem_id			buffer_ready_sem;
95
96	uint8 Read8(uint32 reg)
97	{
98		return *(regs + reg);
99	}
100
101	uint16 Read16(uint32 reg)
102	{
103		return *(vuint16*)(regs + reg);
104	}
105
106	uint32 Read32(uint32 reg)
107	{
108		return *(vuint32*)(regs + reg);
109	}
110
111	void Write8(uint32 reg, uint8 value)
112	{
113		*(regs + reg) = value;
114	}
115
116	void Write16(uint32 reg, uint16 value)
117	{
118		*(vuint16*)(regs + reg) = value;
119	}
120
121	void Write32(uint32 reg, uint32 value)
122	{
123		*(vuint32*)(regs + reg) = value;
124	}
125};
126
127/*!	This structure describes a single stream of audio data,
128	which is can have multiple channels (for stereo or better).
129*/
130struct hda_stream {
131	uint32		id;					/* HDA controller stream # */
132	uint32		offset;				/* HDA I/O/B descriptor offset */
133	bool		running;
134	spinlock	lock;				/* Write lock */
135	uint32		type;
136
137	hda_controller* controller;
138
139	uint32		pin_widget;			/* PIN Widget ID */
140	uint32		io_widgets[MAX_IO_WIDGETS];	/* Input/Output Converter Widget ID */
141	uint32		num_io_widgets;
142
143	uint32		sample_rate;
144	uint32		sample_format;
145
146	uint32		num_buffers;
147	uint32		num_channels;
148	uint32		buffer_length;	/* size of buffer in samples */
149	uint32		buffer_size;	/* actual (aligned) size of buffer in bytes */
150	uint32		sample_size;
151	uint8*		buffers[STREAM_MAX_BUFFERS];
152					/* Virtual addresses for buffer */
153	phys_addr_t	physical_buffers[STREAM_MAX_BUFFERS];
154					/* Physical addresses for buffer */
155
156	volatile bigtime_t	real_time;
157	volatile uint64		frames_count;
158	uint32				last_link_frame_position;
159	volatile int32		buffer_cycle;
160
161	uint32		rate, bps;			/* Samplerate & bits per sample */
162
163	area_id		buffer_area;
164	area_id		buffer_descriptors_area;
165	phys_addr_t	physical_buffer_descriptors;	/* BDL physical address */
166
167	int32		incorrect_position_count;
168	bool		use_dma_position;
169
170	uint8 Read8(uint32 reg)
171	{
172		return controller->Read8(HDAC_STREAM_BASE + offset + reg);
173	}
174
175	uint16 Read16(uint32 reg)
176	{
177		return controller->Read16(HDAC_STREAM_BASE + offset + reg);
178	}
179
180	uint32 Read32(uint32 reg)
181	{
182		return controller->Read32(HDAC_STREAM_BASE + offset + reg);
183	}
184
185	void Write8(uint32 reg, uint8 value)
186	{
187		*(controller->regs + HDAC_STREAM_BASE + offset + reg) = value;
188	}
189
190	void Write16(uint32 reg, uint16 value)
191	{
192		*(vuint16*)(controller->regs + HDAC_STREAM_BASE + offset + reg) = value;
193	}
194
195	void Write32(uint32 reg, uint32 value)
196	{
197		*(vuint32*)(controller->regs + HDAC_STREAM_BASE + offset + reg) = value;
198	}
199};
200
201struct hda_widget {
202	uint32			node_id;
203
204	uint32			num_inputs;
205	int32			active_input;
206	uint32			inputs[MAX_INPUTS];
207	uint32			flags;
208
209	hda_widget_type	type;
210	uint32			pm;
211
212	struct {
213		uint32		audio;
214		uint32		output_amplifier;
215		uint32		input_amplifier;
216	} capabilities;
217
218	union {
219		struct {
220			uint32	formats;
221			uint32	rates;
222		} io;
223		struct {
224		} mixer;
225		struct {
226			uint32	capabilities;
227			uint32	config;
228		} pin;
229	} d;
230};
231
232struct hda_association {
233	uint32	index;
234	bool	enabled;
235	uint32 	pin_count;
236	uint32 	pins[MAX_ASSOCIATION_PINS];
237};
238
239#define WIDGET_FLAG_OUTPUT_PATH	0x01
240#define WIDGET_FLAG_INPUT_PATH	0x02
241#define WIDGET_FLAG_WIDGET_PATH	0x04
242
243/*!	This structure describes a single Audio Function Group. An AFG
244	is a group of audio widgets which can be used to configure multiple
245	streams of audio either from the HDA Link to an output device (= playback)
246	or from an input device to the HDA link (= recording).
247*/
248struct hda_audio_group {
249	hda_codec*		codec;
250	hda_widget		widget;
251
252	/* Multi Audio API data */
253	hda_stream*		playback_stream;
254	hda_stream*		record_stream;
255
256	uint32			widget_start;
257	uint32			widget_count;
258
259	uint32			association_count;
260	uint32			gpio;
261
262	hda_widget*		widgets;
263	hda_association		associations[MAX_ASSOCIATIONS];
264
265	hda_multi*		multi;
266};
267
268/*!	This structure describes a single codec module in the
269	HDA compliant device. This is a discrete component, which
270	can contain both Audio Function Groups, Modem Function Groups,
271	and other customized (vendor specific) Function Groups.
272
273	NOTE: ATM, only Audio Function Groups are supported.
274*/
275struct hda_codec {
276	uint16		vendor_id;
277	uint16		product_id;
278	uint8		major;
279	uint8		minor;
280	uint8		revision;
281	uint8		stepping;
282	uint8		addr;
283
284	uint32		quirks;
285
286	sem_id		response_sem;
287	uint32		responses[MAX_CODEC_RESPONSES];
288	uint32		response_count;
289
290	sem_id		unsol_response_sem;
291	thread_id	unsol_response_thread;
292	uint32		unsol_responses[MAX_CODEC_UNSOL_RESPONSES];
293	uint32		unsol_response_read, unsol_response_write;
294
295	hda_audio_group* audio_groups[HDA_MAX_AUDIO_GROUPS];
296	uint32		num_audio_groups;
297
298	struct hda_controller* controller;
299};
300
301
302#define MULTI_CONTROL_FIRSTID	1024
303#define MULTI_CONTROL_MASTERID	0
304#define MULTI_MAX_CONTROLS 128
305#define MULTI_MAX_CHANNELS 128
306
307struct hda_multi_mixer_control {
308	hda_multi	*multi;
309	int32 	nid;
310	int32 type;
311	bool input;
312	uint32 mute;
313	uint32 gain;
314	uint32 capabilities;
315	int32 index;
316	multi_mix_control	mix_control;
317};
318
319
320struct hda_multi {
321	hda_audio_group *group;
322	hda_multi_mixer_control controls[MULTI_MAX_CONTROLS];
323	uint32 control_count;
324
325	multi_channel_info chans[MULTI_MAX_CHANNELS];
326	uint32 output_channel_count;
327	uint32 input_channel_count;
328	uint32 output_bus_channel_count;
329	uint32 input_bus_channel_count;
330	uint32 aux_bus_channel_count;
331};
332
333
334/* driver.c */
335extern device_hooks gDriverHooks;
336extern pci_module_info* gPci;
337extern hda_controller gCards[MAX_CARDS];
338extern uint32 gNumCards;
339
340/* hda_codec.c */
341const char* get_widget_location(uint32 location);
342hda_widget* hda_audio_group_get_widget(hda_audio_group* audioGroup, uint32 nodeID);
343
344status_t hda_audio_group_get_widgets(hda_audio_group* audioGroup,
345	hda_stream* stream);
346hda_codec* hda_codec_new(hda_controller* controller, uint32 cad);
347void hda_codec_delete(hda_codec* codec);
348
349/* hda_multi_audio.c */
350status_t multi_audio_control(void* cookie, uint32 op, void* arg, size_t length);
351
352/* hda_controller.c: Basic controller support */
353status_t hda_hw_init(hda_controller* controller);
354void hda_hw_stop(hda_controller* controller);
355void hda_hw_uninit(hda_controller* controller);
356status_t hda_send_verbs(hda_codec* codec, corb_t* verbs, uint32* responses,
357	uint32 count);
358status_t hda_verb_write(hda_codec* codec, uint32 nid, uint32 vid, uint16 payload);
359status_t hda_verb_read(hda_codec* codec, uint32 nid, uint32 vid, uint32 *response);
360
361/* hda_controller.c: Stream support */
362hda_stream* hda_stream_new(hda_audio_group* audioGroup, int type);
363void hda_stream_delete(hda_stream* stream);
364status_t hda_stream_setup_buffers(hda_audio_group* audioGroup,
365	hda_stream* stream, const char* desc);
366status_t hda_stream_start(hda_controller* controller, hda_stream* stream);
367status_t hda_stream_stop(hda_controller* controller, hda_stream* stream);
368
369#endif	/* _HDA_H_ */
370