1#include <SupportDefs.h>
2#include "hardware.h"
3#include "lala/lala.h"
4
5typedef struct
6{
7	uint32				regbase;
8	ich_bd *			bd[ICH_BD_COUNT];
9	void *				buffer[ICH_BD_COUNT];
10
11	area_id				bd_area;
12	area_id				buffer_area;
13
14	volatile int		lastindex;
15	volatile int64		processed_samples;
16
17} ichaudio_stream;
18
19
20typedef struct
21{
22	uint32	irq;
23	uint32	nambar;
24	uint32	nabmbar;
25	area_id area_mmbar; // ich4
26	area_id area_mbbar; // ich4
27	void *	mmbar; // ich4
28	void *	mbbar; // ich4
29
30	uint32 codecoffset;
31	uint32 input_rate;
32	uint32 output_rate;
33
34	ichaudio_stream stream[2];
35
36	pci_module_info *	pci;
37	uint32				flags;
38
39} ichaudio_cookie;
40
41
42
43#define TYPE_ICH4			0x01
44#define TYPE_SIS7012		0x02
45
46/* The SIS7012 chipset has SR and PICB registers swapped when compared to Intel */
47#define	GET_REG_X_PICB(cookie)		(((cookie)->flags & TYPE_SIS7012) ? _ICH_REG_X_SR : _ICH_REG_X_PICB)
48#define	GET_REG_X_SR(cookie)		(((cookie)->flags & TYPE_SIS7012) ? _ICH_REG_X_PICB : _ICH_REG_X_SR)
49/* Each 16 bit sample is counted as 1 in SIS7012 chipsets, 2 in all others */
50#define GET_HW_SAMPLE_SIZE(cookie)	(((cookie)->flags & TYPE_SIS7012) ? 1 : 2)
51
52