1/* 2 * Copyright 2004-2006, Haiku, Inc. All RightsReserved. 3 * Copyright 2002/03, Thomas Kurschel. All rights reserved. 4 * 5 * Distributed under the terms of the MIT License. 6 */ 7#ifndef _IDE_DEVICE_INFOBLOCK_H_ 8#define _IDE_DEVICE_INFOBLOCK_H_ 9 10/* 11 Definition of response to IDE_CMD_IDENTIFY_DEVICE or 12 IDE_CMD_IDENTIFY_PACKET_DEVICE 13 14 When a new entry is inserted, add its offset in hex 15 and its index in decimal as a remark. Without that, you 16 have a rough time when you messed up the offsets. 17*/ 18 19 20#include <lendian_bitfield.h> 21 22 23#define IDE_GET_INFO_BLOCK 0x2710 24#define IDE_GET_STATUS 0x2711 25 26 27// must be 512 bytes!!! 28typedef struct tagdevice_infoblock { 29 union { // 0 general configuration 30 struct { 31 LBITFIELD8 ( 32 _0_res1 : 1, 33 _0_ret1 : 1, 34 response_incomplete : 1, 35 _0_ret2 : 3, 36 removable_controller_or_media : 1, 37 removable_media : 1, 38 _0_ret3 : 7, 39 ATA : 1 // 0 - is ATA! 40 ); 41 } ata; 42 struct { 43 LBITFIELD8 ( 44 packet_size : 2, // 0 - 12 bytes, 1 - 16 bytes 45 response_incomplete : 1, 46 _0_res2 : 2, 47 drq_speed : 2, // 0 - 3ms, 1 - IRQ, 2 - 50µs 48 removable_media : 1, 49 type : 5, 50 _0_res13 : 1, 51 ATAPI : 2 // 2 - is ATAPI 52 ); 53 } atapi; 54 } _0; 55 uint16 cylinders; // 2 56 uint16 dummy1; // 4 57 uint16 heads; // 6 58 uint16 dummy2[2]; // 8 59 uint16 sectors; // 0c 60 uint16 dummy3[3]; // 0e 61 char serial_number[20]; // 14 62 uint16 dummy4[3]; // 28 63 char firmware_version[8]; // 2e 64 char model_number[40]; // 36 65 uint16 dummy5[2]; // 5e 66 LBITFIELD5 ( // 62 (49) capabilities 67 _49_ret1 : 8, 68 DMA_supported : 1, 69 LBA_supported : 1, 70 IORDY_can_disable : 1, 71 IORDY_supported : 1 72 ); 73 74 uint16 dummy6[1]; // 64 75 LBITFIELD2 ( // 66 (51) obsolete: PIO modes? 76 _51_obs1 : 8, 77 PIO_mode : 8 78 ); 79 uint16 dummy7[1]; // 68 80 81 LBITFIELD3 ( // 6a (53) validity 82 _54_58_valid : 1, 83 _64_70_valid : 1, 84 _88_valid : 1 85 ); 86 uint16 current_cylinders; // 6c (54) 87 uint16 current_heads; // 6e 88 uint16 current_sectors; // 70 89 90 uint16 capacity_low; // 72 (57) ALIGNMENT SPLIT - don't merge 91 uint16 capacity_high; 92 93 uint16 dummy8[1]; 94 95 uint32 LBA_total_sectors; // 78 (60) 96 uint16 dummy9[1]; // 7c 97 98 LBITFIELD7 ( // 7e (63) MDMA modes 99 MDMA0_supported : 1, 100 MDMA1_supported : 1, 101 MDMA2_supported : 1, 102 _63_res1 : 5, 103 MDMA0_selected : 1, 104 MDMA1_selected : 1, 105 MDMA2_selected : 1 106 ); 107 uint16 dummy10[11]; // 80 108 109 LBITFIELD2 ( // 96 (75) 110 queue_depth : 5, 111 _75_res1 : 9 112 ); 113 uint16 dummy11[6]; // 98 114 115 LBITFIELD16 ( // a4 (82) supported_command_set 116 SMART_supported : 1, 117 security_mode_supported : 1, 118 removable_media_supported : 1, 119 PM_supported : 1, 120 _81_fixed : 1, // must be 0 121 write_cache_supported : 1, 122 look_ahead_supported : 1, 123 RELEASE_irq_supported : 1, 124 125 SERVICE_irq_supported : 1, 126 DEVICE_RESET_supported : 1, 127 HPA_supported : 1, 128 _81_obs1 : 1, 129 WRITE_BUFFER_supported : 1, 130 READ_BUFFER_supported : 1, 131 NOP_supported : 1, 132 _81_obs2 : 1 133 ); 134 LBITFIELD15 ( // a6 (83) supported_command_sets 135 DOWNLOAD_MICROCODE_supported : 1, 136 DMA_QUEUED_supported : 1, 137 CFA_supported : 1, 138 APM_supported : 1, 139 RMSN_supported : 1, 140 power_up_in_stand_by_supported : 1, 141 SET_FEATURES_on_power_up_required : 1, 142 reserved_boot_area_supported : 1, 143 SET_MAX_security_supported : 1, 144 auto_acustic_managemene_supported : 1, 145 _48_bit_addresses_supported : 1, 146 device_conf_overlay_supported : 1, 147 FLUSH_CACHE_supported : 1, 148 FLUSH_CACHE_EXT_supported : 1, 149 _83_fixed : 2 // must be 1 150 ); 151 152 uint16 dummy12[4]; // a8 (84) 153 LBITFIELD15 ( // b0 (88) UDMA modes 154 UDMA0_supported : 1, 155 UDMA1_supported : 1, 156 UDMA2_supported : 1, 157 UDMA3_supported : 1, 158 UDMA4_supported : 1, 159 UDMA5_supported : 1, 160 UDMA6_supported : 1, // !guessed 161 _88_res1 : 1, 162 UDMA0_selected : 1, 163 UDMA1_selected : 1, 164 UDMA2_selected : 1, 165 UDMA3_selected : 1, 166 UDMA4_selected : 1, 167 UDMA5_selected : 1, 168 UDMA6_selected : 1 169 ); 170 171 uint16 dummy89[11]; // b2 (89) 172 uint64 LBA48_total_sectors; // c8 (100) 173 uint16 dummy102[22]; // cc (104) 174 175 LBITFIELD2 ( // fc (126) 176 last_lun : 2, 177 _126_res2 : 14 178 ); 179 LBITFIELD4 ( // fe (127) RMSN support 180 _127_RMSN_support : 2,// 0 = not supported, 1 = supported, 3, 4 = reserved 181 _127_res2 : 6, 182 device_write_protect: 2, 183 _127_res9 : 6 184 ); 185 uint16 dummy14[128]; // 100 (128) 186} ide_device_infoblock; 187 188typedef struct ide_status { 189 uint8 _reserved; 190 uint8 dma_status; 191 uint8 pio_mode; 192 uint8 dma_mode; 193} ide_status; 194 195#endif /* _IDE_DEVICE_INFOBLOCK_H_ */ 196