1/* general card functions */ 2status_t nv_general_powerup(void); 3status_t nv_set_cas_latency(void); 4void setup_virtualized_heads(bool); 5void set_crtc_owner(bool); 6status_t nv_general_output_select(bool); 7status_t nv_general_head_select(bool); 8status_t nv_general_validate_pic_size (display_mode *target, uint32 *bytes_per_row, bool *acc_mode); 9 10/* apsed: logging macros */ 11#define MSG(args) do { /* if needed or si->settings with si NULL */ \ 12 nv_log args; \ 13} while (0) 14#define LOG(level_bit, args) do { \ 15 uint32 mod = (si->settings.logmask & 0xfffffff0) & MODULE_BIT; \ 16 uint32 lev = (si->settings.logmask & ~0xfffffff0) & level_bit; \ 17 if (mod && lev) nv_log args; \ 18} while (0) 19 20/* support functions */ 21void delay(bigtime_t i); 22void nv_log(char *format, ...); 23 24/* i2c functions */ 25char i2c_flag_error (char ErrNo); 26void i2c_bstart (uint8 BusNR); 27void i2c_bstop (uint8 BusNR); 28uint8 i2c_readbyte(uint8 BusNR, bool Ack); 29bool i2c_writebyte (uint8 BusNR, uint8 byte); 30void i2c_readbuffer (uint8 BusNR, uint8* buf, uint8 size); 31void i2c_writebuffer (uint8 BusNR, uint8* buf, uint8 size); 32status_t i2c_init(void); 33 34/* card info functions */ 35status_t parse_pins(void); 36void set_pll(uint32 reg, uint32 clk); 37void get_panel_modes(display_mode *p1, display_mode *p2, bool *pan1, bool *pan2); 38void fake_panel_start(void); 39void set_specs(void); 40void dump_pins(void); 41 42/* DAC functions */ 43bool nv_dac_crt_connected(void); 44status_t nv_dac_mode(int,float); 45status_t nv_dac_palette(uint8*,uint8*,uint8*); 46status_t nv_dac_pix_pll_find(display_mode target,float * result,uint8 *,uint8 *,uint8 *, uint8); 47status_t nv_dac_set_pix_pll(display_mode target); 48status_t nv_dac_sys_pll_find(float, float*, uint8*, uint8*, uint8*, uint8); 49 50/* DAC2 functions */ 51bool nv_dac2_crt_connected(void); 52status_t nv_dac2_mode(int,float); 53status_t nv_dac2_palette(uint8*,uint8*,uint8*); 54status_t nv_dac2_pix_pll_find(display_mode target,float * result,uint8 *,uint8 *,uint8 *, uint8); 55status_t nv_dac2_set_pix_pll(display_mode target); 56 57/* CRTC1 functions */ 58status_t nv_crtc_interrupt_enable(bool); 59status_t nv_crtc_update_fifo(void); 60status_t nv_crtc_validate_timing( 61 uint16 *hd_e,uint16 *hs_s,uint16 *hs_e,uint16 *ht, 62 uint16 *vd_e,uint16 *vs_s,uint16 *vs_e,uint16 *vt); 63status_t nv_crtc_set_timing(display_mode target); 64status_t nv_crtc_depth(int mode); 65status_t nv_crtc_set_display_start(uint32 startadd,uint8 bpp); 66status_t nv_crtc_set_display_pitch(void); 67status_t nv_crtc_dpms(bool, bool, bool, bool); 68status_t nv_crtc_mem_priority(uint8); 69status_t nv_crtc_cursor_init(void); 70status_t nv_crtc_cursor_define(uint8*,uint8*); 71status_t nv_crtc_cursor_position(uint16 x ,uint16 y); 72status_t nv_crtc_cursor_show(void); 73status_t nv_crtc_cursor_hide(void); 74 75/* CRTC2 functions */ 76status_t nv_crtc2_interrupt_enable(bool); 77status_t nv_crtc2_update_fifo(void); 78status_t nv_crtc2_validate_timing( 79 uint16 *hd_e,uint16 *hs_s,uint16 *hs_e,uint16 *ht, 80 uint16 *vd_e,uint16 *vs_s,uint16 *vs_e,uint16 *vt); 81status_t nv_crtc2_set_timing(display_mode target); 82status_t nv_crtc2_depth(int mode); 83status_t nv_crtc2_set_display_start(uint32 startadd,uint8 bpp); 84status_t nv_crtc2_set_display_pitch(void); 85status_t nv_crtc2_dpms(bool, bool, bool, bool); 86status_t nv_crtc2_mem_priority(uint8); 87status_t nv_crtc2_cursor_init(void); 88status_t nv_crtc2_cursor_define(uint8*,uint8*); 89status_t nv_crtc2_cursor_position(uint16 x ,uint16 y); 90status_t nv_crtc2_cursor_show(void); 91status_t nv_crtc2_cursor_hide(void); 92 93/* acceleration functions */ 94status_t check_acc_capability(uint32 feature); 95/* DMA versions */ 96status_t nv_acc_wait_idle_dma(void); 97status_t nv_acc_init_dma(void); 98void nv_acc_assert_fifo_dma(void); 99void SCREEN_TO_SCREEN_BLIT_DMA(engine_token *et, blit_params *list, uint32 count); 100void SCREEN_TO_SCREEN_TRANSPARENT_BLIT_DMA(engine_token *et, uint32 transparent_colour, blit_params *list, uint32 count); 101void SCREEN_TO_SCREEN_SCALED_FILTERED_BLIT_DMA(engine_token *et, scaled_blit_params *list, uint32 count); 102void FILL_RECTANGLE_DMA(engine_token *et, uint32 color, fill_rect_params *list, uint32 count); 103void INVERT_RECTANGLE_DMA(engine_token *et, fill_rect_params *list, uint32 count); 104void FILL_SPAN_DMA(engine_token *et, uint32 color, uint16 *list, uint32 count); 105 106/* backend scaler functions */ 107status_t check_overlay_capability(uint32 feature); 108void nv_bes_move_overlay(void); 109status_t nv_bes_to_crtc(bool crtc); 110status_t nv_bes_init(void); 111status_t nv_configure_bes 112 (const overlay_buffer *ob, const overlay_window *ow,const overlay_view *ov, int offset); 113status_t nv_release_bes(void); 114 115/* driver structures and enums */ 116enum{BPP8 = 0, BPP15 = 1, BPP16 = 2, BPP24 = 3, BPP32 = 4}; 117