1/* 2 * Copyright 2005-2007, Axel Dörfler, axeld@pinc-software.de. All rights reserved. 3 * Copyright 2002-04, Thomas Kurschel. All rights reserved. 4 * 5 * Distributed under the terms of the MIT License. 6 */ 7#ifndef _ATA_PCI_H 8#define _ATA_PCI_H 9 10/* 11 ATA adapter library 12 13 Module to simplify writing an ATA adapter driver. 14 15 The interface is not very abstract, i.e. the actual driver is 16 free to access any controller or channel data of this library. 17*/ 18 19 20#include <bus/ATA.h> 21#include <bus/PCI.h> 22#include <ata_types.h> 23 24 25// one Physical Region Descriptor (PRD) 26// (one region must not cross 64K boundary; 27// the PRD table must not cross a 64K boundary) 28typedef struct prd_entry { 29 uint32 address; // physical address of block (must be even) 30 uint16 count; // size of block, 0 stands for 65536 (must be even) 31 uint8 res6; 32 LBITFIELD8_2( 33 res7_0 : 7, 34 EOT : 1 // 1 for last entry 35 ); 36} prd_entry; 37 38// IDE bus master command register 39#define ATA_BM_COMMAND_START_STOP 0x01 40#define ATA_BM_COMMAND_READ_FROM_DEVICE 0x08 41 42// IDE bus master status register 43#define ATA_BM_STATUS_ACTIVE 0x01 44#define ATA_BM_STATUS_ERROR 0x02 45#define ATA_BM_STATUS_INTERRUPT 0x04 46#define ATA_BM_STATUS_MASTER_DMA 0x20 47#define ATA_BM_STATUS_SLAVE_DMA 0x40 48#define ATA_BM_STATUS_SIMPLEX_DMA 0x80 49 50// offset of bus master registers 51enum { 52 ATA_BM_COMMAND_REG = 0, 53 ATA_BM_STATUS_REG = 2, 54 ATA_BM_PRDT_ADDRESS = 4 55 // offset of PRDT register; content must be dword-aligned 56}; 57 58// bit mask in class_api of PCI configuration 59// (for adapters that can run in compatability mode) 60enum { 61 ATA_API_PRIMARY_NATIVE = 1, // primary channel is in native mode 62 ATA_API_PRIMARY_FIXED = 2, // primary channel can be switched to native mode 63 ATA_API_SECONDARY_NATIVE = 4, // secondary channel is in native mode 64 ATA_API_SECONDARY_FIXED = 8 // secondary channel can be switched to native mode 65}; 66 67 68// (maximum) size of S/G table 69// there are so many restrictions that we want to keep it inside one page 70// to be sure that we fulfill them all 71#define ATA_ADAPTER_MAX_SG_COUNT (B_PAGE_SIZE / sizeof( prd_entry )) 72 73 74// channel node items 75// io address of command block (uint16) 76#define ATA_ADAPTER_COMMAND_BLOCK_BASE "ata_adapter/command_block_base" 77// io address of control block (uint16) 78#define ATA_ADAPTER_CONTROL_BLOCK_BASE "ata_adapter/control_block_base" 79// interrupt number (uint8) 80// can also be defined in controller node if both channels use same IRQ! 81#define ATA_ADAPTER_INTNUM "ata_adapter/irq" 82// 0 if primary channel, 1 if secondary channel, 2 if tertiary, ... (uint8) 83#define ATA_ADAPTER_CHANNEL_INDEX "ata_adapter/channel_index" 84 85// controller node items 86// io address of bus master registers (uint16) 87#define ATA_ADAPTER_BUS_MASTER_BASE "ata_adapter/bus_master_base" 88 89 90// info about one channel 91typedef struct ata_adapter_channel_info { 92 pci_device_module_info *pci; 93 pci_device *device; 94 95 uint16 command_block_base; // io address command block 96 uint16 control_block_base; // io address control block 97 uint16 bus_master_base; 98 int intnum; // interrupt number 99 100 uint32 lost; // != 0 if device got removed, i.e. if it must not 101 // be accessed anymore 102 103 ata_channel ataChannel; 104 device_node *node; 105 106 int32 (*inthand)( void *arg ); 107 108 area_id prd_area; 109 prd_entry *prdt; 110 uint32 prdt_phys; 111 uint32 dmaing; 112} ata_adapter_channel_info; 113 114 115// info about controller 116typedef struct ata_adapter_controller_info { 117 pci_device_module_info *pci; 118 pci_device *device; 119 120 uint16 bus_master_base; 121 122 uint32 lost; // != 0 if device got removed, i.e. if it must not 123 // be accessed anymore 124 125 device_node *node; 126} ata_adapter_controller_info; 127 128 129// interface of IDE adapter library 130typedef struct { 131 module_info info; 132 133 void (*set_channel)(ata_adapter_channel_info *channel, 134 ata_channel ataChannel); 135 136 // function calls that can be forwarded from actual driver 137 status_t (*write_command_block_regs)(ata_adapter_channel_info *channel, 138 ata_task_file *tf, ata_reg_mask mask); 139 status_t (*read_command_block_regs)(ata_adapter_channel_info *channel, 140 ata_task_file *tf, ata_reg_mask mask); 141 142 uint8 (*get_altstatus) (ata_adapter_channel_info *channel); 143 status_t (*write_device_control) (ata_adapter_channel_info *channel, uint8 val); 144 145 status_t (*write_pio)(ata_adapter_channel_info *channel, uint16 *data, int count, bool force_16bit); 146 status_t (*read_pio)(ata_adapter_channel_info *channel, uint16 *data, int count, bool force_16bit); 147 148 status_t (*prepare_dma)(ata_adapter_channel_info *channel, const physical_entry *sg_list, 149 size_t sg_list_count, bool to_device); 150 status_t (*start_dma)(ata_adapter_channel_info *channel); 151 status_t (*finish_dma)(ata_adapter_channel_info *channel); 152 153 // default functions that should be replaced by a more specific version 154 // (copy them from source code of this library and modify them at will) 155 int32 (*inthand)(void *arg); 156 157 // functions that must be called by init/uninit etc. of channel driver 158 status_t (*init_channel)(device_node *node, 159 ata_adapter_channel_info **cookie, size_t total_data_size, 160 int32 (*inthand)(void *arg)); 161 void (*uninit_channel)(ata_adapter_channel_info *channel); 162 void (*channel_removed)(ata_adapter_channel_info *channel); 163 164 // publish channel node 165 status_t (*publish_channel)(device_node *controller_node, 166 const char *channel_module_name, uint16 command_block_base, 167 uint16 control_block_base, uint8 intnum, bool can_dma, 168 uint8 channel_index, const char *name, 169 const io_resource *resources, device_node **node); 170 // verify channel configuration and publish node on success 171 status_t (*detect_channel)(pci_device_module_info *pci, pci_device *pciDevice, 172 device_node *controller_node, const char *channel_module_name, 173 bool controller_can_dma, uint16 command_block_base, 174 uint16 control_block_base, uint16 bus_master_base, 175 uint8 intnum, uint8 channel_index, const char *name, 176 device_node **node, bool supports_compatibility_mode); 177 178 // functions that must be called by init/uninit etc. of controller driver 179 status_t (*init_controller)(device_node *node, 180 ata_adapter_controller_info **cookie, size_t total_data_size); 181 void (*uninit_controller)(ata_adapter_controller_info *controller); 182 void (*controller_removed)(ata_adapter_controller_info *controller); 183 184 // publish controller node 185 status_t (*publish_controller)(device_node *parent, uint16 bus_master_base, 186 io_resource *resources, const char *controller_driver, 187 const char *controller_driver_type, const char *controller_name, 188 bool can_dma, bool can_cq, uint32 dma_alignment, uint32 dma_boundary, 189 uint32 max_sg_block_size, device_node **node); 190 // verify controller configuration and publish node on success 191 status_t (*detect_controller)(pci_device_module_info *pci, pci_device *pciDevice, 192 device_node *parent, uint16 bus_master_base, 193 const char *controller_driver, const char *controller_driver_type, 194 const char *controller_name, bool can_dma, bool can_cq, 195 uint32 dma_alignment, uint32 dma_boundary, uint32 max_sg_block_size, 196 device_node **node); 197 // standard master probe for controller that registers controller and channel nodes 198 status_t (*probe_controller)(device_node *parent, const char *controller_driver, 199 const char *controller_driver_type, const char *controller_name, 200 const char *channel_module_name, bool can_dma, bool can_cq, 201 uint32 dma_alignment, uint32 dma_boundary, uint32 max_sg_block_size, 202 bool supports_compatibility_mode); 203} ata_adapter_interface; 204 205 206#define ATA_ADAPTER_MODULE_NAME "generic/ata_adapter/v1" 207 208#endif /* _ATA_PCI_H */ 209