1/* Analyze RTL for C-Compiler
2   Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3   2000 Free Software Foundation, Inc.
4
5This file is part of GNU CC.
6
7GNU CC is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2, or (at your option)
10any later version.
11
12GNU CC is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with GNU CC; see the file COPYING.  If not, write to
19the Free Software Foundation, 59 Temple Place - Suite 330,
20Boston, MA 02111-1307, USA.  */
21
22
23#include "config.h"
24#include "system.h"
25#include "rtl.h"
26
27static int rtx_addr_can_trap_p	PROTO((rtx));
28static void reg_set_p_1		PROTO((rtx, rtx));
29static void reg_set_last_1	PROTO((rtx, rtx));
30
31
32/* Forward declarations */
33static int jmp_uses_reg_or_mem		PROTO((rtx));
34
35/* Bit flags that specify the machine subtype we are compiling for.
36   Bits are tested using macros TARGET_... defined in the tm.h file
37   and set by `-m...' switches.  Must be defined in rtlanal.c.  */
38
39int target_flags;
40
41/* Return 1 if the value of X is unstable
42   (would be different at a different point in the program).
43   The frame pointer, arg pointer, etc. are considered stable
44   (within one function) and so is anything marked `unchanging'.  */
45
46int
47rtx_unstable_p (x)
48     rtx x;
49{
50  register RTX_CODE code = GET_CODE (x);
51  register int i;
52  register char *fmt;
53
54  if (code == MEM)
55    return ! RTX_UNCHANGING_P (x);
56
57  if (code == QUEUED)
58    return 1;
59
60  if (code == CONST || code == CONST_INT)
61    return 0;
62
63  if (code == REG)
64    return ! (REGNO (x) == FRAME_POINTER_REGNUM
65	      || REGNO (x) == HARD_FRAME_POINTER_REGNUM
66	      || REGNO (x) == ARG_POINTER_REGNUM
67	      || RTX_UNCHANGING_P (x));
68
69  fmt = GET_RTX_FORMAT (code);
70  for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
71    if (fmt[i] == 'e')
72      if (rtx_unstable_p (XEXP (x, i)))
73	return 1;
74  return 0;
75}
76
77/* Return 1 if X has a value that can vary even between two
78   executions of the program.  0 means X can be compared reliably
79   against certain constants or near-constants.
80   The frame pointer and the arg pointer are considered constant.  */
81
82int
83rtx_varies_p (x)
84     rtx x;
85{
86  register RTX_CODE code = GET_CODE (x);
87  register int i;
88  register char *fmt;
89
90  switch (code)
91    {
92    case MEM:
93    case QUEUED:
94      return 1;
95
96    case CONST:
97    case CONST_INT:
98    case CONST_DOUBLE:
99    case SYMBOL_REF:
100    case LABEL_REF:
101      return 0;
102
103    case REG:
104      /* Note that we have to test for the actual rtx used for the frame
105	 and arg pointers and not just the register number in case we have
106	 eliminated the frame and/or arg pointer and are using it
107	 for pseudos.  */
108      return ! (x == frame_pointer_rtx || x == hard_frame_pointer_rtx
109		|| x == arg_pointer_rtx || x == pic_offset_table_rtx);
110
111    case LO_SUM:
112      /* The operand 0 of a LO_SUM is considered constant
113	 (in fact is it related specifically to operand 1).  */
114      return rtx_varies_p (XEXP (x, 1));
115
116    default:
117      break;
118    }
119
120  fmt = GET_RTX_FORMAT (code);
121  for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
122    if (fmt[i] == 'e')
123      if (rtx_varies_p (XEXP (x, i)))
124	return 1;
125  return 0;
126}
127
128/* Return 0 if the use of X as an address in a MEM can cause a trap.  */
129
130static int
131rtx_addr_can_trap_p (x)
132     register rtx x;
133{
134  register enum rtx_code code = GET_CODE (x);
135
136  switch (code)
137    {
138    case SYMBOL_REF:
139      return SYMBOL_REF_WEAK (x);
140
141    case LABEL_REF:
142      return 0;
143
144    case REG:
145      /* As in rtx_varies_p, we have to use the actual rtx, not reg number.  */
146      return ! (x == frame_pointer_rtx || x == hard_frame_pointer_rtx
147		|| x == stack_pointer_rtx || x == arg_pointer_rtx);
148
149    case CONST:
150      return rtx_addr_can_trap_p (XEXP (x, 0));
151
152    case PLUS:
153      /* An address is assumed not to trap if it is an address that can't
154	 trap plus a constant integer.  */
155      return (rtx_addr_can_trap_p (XEXP (x, 0))
156	      || GET_CODE (XEXP (x, 1)) != CONST_INT);
157
158    case LO_SUM:
159      return rtx_addr_can_trap_p (XEXP (x, 1));
160
161    default:
162      break;
163    }
164
165  /* If it isn't one of the case above, it can cause a trap.  */
166  return 1;
167}
168
169/* Return 1 if X refers to a memory location whose address
170   cannot be compared reliably with constant addresses,
171   or if X refers to a BLKmode memory object.  */
172
173int
174rtx_addr_varies_p (x)
175     rtx x;
176{
177  register enum rtx_code code;
178  register int i;
179  register char *fmt;
180
181  if (x == 0)
182    return 0;
183
184  code = GET_CODE (x);
185  if (code == MEM)
186    return GET_MODE (x) == BLKmode || rtx_varies_p (XEXP (x, 0));
187
188  fmt = GET_RTX_FORMAT (code);
189  for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
190    if (fmt[i] == 'e')
191      {
192	if (rtx_addr_varies_p (XEXP (x, i)))
193	  return 1;
194      }
195    else if (fmt[i] == 'E')
196      {
197	int j;
198	for (j = 0; j < XVECLEN (x, i); j++)
199	  if (rtx_addr_varies_p (XVECEXP (x, i, j)))
200	    return 1;
201      }
202  return 0;
203}
204
205/* Return the value of the integer term in X, if one is apparent;
206   otherwise return 0.
207   Only obvious integer terms are detected.
208   This is used in cse.c with the `related_value' field.*/
209
210HOST_WIDE_INT
211get_integer_term (x)
212     rtx x;
213{
214  if (GET_CODE (x) == CONST)
215    x = XEXP (x, 0);
216
217  if (GET_CODE (x) == MINUS
218      && GET_CODE (XEXP (x, 1)) == CONST_INT)
219    return - INTVAL (XEXP (x, 1));
220  if (GET_CODE (x) == PLUS
221      && GET_CODE (XEXP (x, 1)) == CONST_INT)
222    return INTVAL (XEXP (x, 1));
223  return 0;
224}
225
226/* If X is a constant, return the value sans apparent integer term;
227   otherwise return 0.
228   Only obvious integer terms are detected.  */
229
230rtx
231get_related_value (x)
232     rtx x;
233{
234  if (GET_CODE (x) != CONST)
235    return 0;
236  x = XEXP (x, 0);
237  if (GET_CODE (x) == PLUS
238      && GET_CODE (XEXP (x, 1)) == CONST_INT)
239    return XEXP (x, 0);
240  else if (GET_CODE (x) == MINUS
241	   && GET_CODE (XEXP (x, 1)) == CONST_INT)
242    return XEXP (x, 0);
243  return 0;
244}
245
246/* Nonzero if register REG appears somewhere within IN.
247   Also works if REG is not a register; in this case it checks
248   for a subexpression of IN that is Lisp "equal" to REG.  */
249
250int
251reg_mentioned_p (reg, in)
252     register rtx reg, in;
253{
254  register char *fmt;
255  register int i;
256  register enum rtx_code code;
257
258  if (in == 0)
259    return 0;
260
261  if (reg == in)
262    return 1;
263
264  if (GET_CODE (in) == LABEL_REF)
265    return reg == XEXP (in, 0);
266
267  code = GET_CODE (in);
268
269  switch (code)
270    {
271      /* Compare registers by number.  */
272    case REG:
273      return GET_CODE (reg) == REG && REGNO (in) == REGNO (reg);
274
275      /* These codes have no constituent expressions
276	 and are unique.  */
277    case SCRATCH:
278    case CC0:
279    case PC:
280      return 0;
281
282    case CONST_INT:
283      return GET_CODE (reg) == CONST_INT && INTVAL (in) == INTVAL (reg);
284
285    case CONST_DOUBLE:
286      /* These are kept unique for a given value.  */
287      return 0;
288
289    default:
290      break;
291    }
292
293  if (GET_CODE (reg) == code && rtx_equal_p (reg, in))
294    return 1;
295
296  fmt = GET_RTX_FORMAT (code);
297
298  for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
299    {
300      if (fmt[i] == 'E')
301	{
302	  register int j;
303	  for (j = XVECLEN (in, i) - 1; j >= 0; j--)
304	    if (reg_mentioned_p (reg, XVECEXP (in, i, j)))
305	      return 1;
306	}
307      else if (fmt[i] == 'e'
308	       && reg_mentioned_p (reg, XEXP (in, i)))
309	return 1;
310    }
311  return 0;
312}
313
314/* Return 1 if in between BEG and END, exclusive of BEG and END, there is
315   no CODE_LABEL insn.  */
316
317int
318no_labels_between_p (beg, end)
319     rtx beg, end;
320{
321  register rtx p;
322  for (p = NEXT_INSN (beg); p != end; p = NEXT_INSN (p))
323    if (GET_CODE (p) == CODE_LABEL)
324      return 0;
325  return 1;
326}
327
328/* Return 1 if in between BEG and END, exclusive of BEG and END, there is
329   no JUMP_INSN insn.  */
330
331int
332no_jumps_between_p (beg, end)
333     rtx beg, end;
334{
335  register rtx p;
336  for (p = NEXT_INSN (beg); p != end; p = NEXT_INSN (p))
337    if (GET_CODE (p) == JUMP_INSN)
338      return 0;
339  return 1;
340}
341
342/* Nonzero if register REG is used in an insn between
343   FROM_INSN and TO_INSN (exclusive of those two).  */
344
345int
346reg_used_between_p (reg, from_insn, to_insn)
347     rtx reg, from_insn, to_insn;
348{
349  register rtx insn;
350
351  if (from_insn == to_insn)
352    return 0;
353
354  for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn))
355    if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
356	&& (reg_overlap_mentioned_p (reg, PATTERN (insn))
357	   || (GET_CODE (insn) == CALL_INSN
358	      && (find_reg_fusage (insn, USE, reg)
359		  || find_reg_fusage (insn, CLOBBER, reg)))))
360      return 1;
361  return 0;
362}
363
364/* Nonzero if the old value of X, a register, is referenced in BODY.  If X
365   is entirely replaced by a new value and the only use is as a SET_DEST,
366   we do not consider it a reference.  */
367
368int
369reg_referenced_p (x, body)
370     rtx x;
371     rtx body;
372{
373  int i;
374
375  switch (GET_CODE (body))
376    {
377    case SET:
378      if (reg_overlap_mentioned_p (x, SET_SRC (body)))
379	return 1;
380
381      /* If the destination is anything other than CC0, PC, a REG or a SUBREG
382	 of a REG that occupies all of the REG, the insn references X if
383	 it is mentioned in the destination.  */
384      if (GET_CODE (SET_DEST (body)) != CC0
385	  && GET_CODE (SET_DEST (body)) != PC
386	  && GET_CODE (SET_DEST (body)) != REG
387	  && ! (GET_CODE (SET_DEST (body)) == SUBREG
388		&& GET_CODE (SUBREG_REG (SET_DEST (body))) == REG
389		&& (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (body))))
390		      + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
391		    == ((GET_MODE_SIZE (GET_MODE (SET_DEST (body)))
392			 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
393	  && reg_overlap_mentioned_p (x, SET_DEST (body)))
394	return 1;
395      return 0;
396
397    case ASM_OPERANDS:
398      for (i = ASM_OPERANDS_INPUT_LENGTH (body) - 1; i >= 0; i--)
399	if (reg_overlap_mentioned_p (x, ASM_OPERANDS_INPUT (body, i)))
400	  return 1;
401      return 0;
402
403    case CALL:
404    case USE:
405      return reg_overlap_mentioned_p (x, body);
406
407    case TRAP_IF:
408      return reg_overlap_mentioned_p (x, TRAP_CONDITION (body));
409
410    case UNSPEC:
411    case UNSPEC_VOLATILE:
412    case PARALLEL:
413      for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
414	if (reg_referenced_p (x, XVECEXP (body, 0, i)))
415	  return 1;
416      return 0;
417
418    default:
419      return 0;
420    }
421}
422
423/* Nonzero if register REG is referenced in an insn between
424   FROM_INSN and TO_INSN (exclusive of those two).  Sets of REG do
425   not count.  */
426
427int
428reg_referenced_between_p (reg, from_insn, to_insn)
429     rtx reg, from_insn, to_insn;
430{
431  register rtx insn;
432
433  if (from_insn == to_insn)
434    return 0;
435
436  for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn))
437    if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
438	&& (reg_referenced_p (reg, PATTERN (insn))
439	   || (GET_CODE (insn) == CALL_INSN
440	      && find_reg_fusage (insn, USE, reg))))
441      return 1;
442  return 0;
443}
444
445/* Nonzero if register REG is set or clobbered in an insn between
446   FROM_INSN and TO_INSN (exclusive of those two).  */
447
448int
449reg_set_between_p (reg, from_insn, to_insn)
450     rtx reg, from_insn, to_insn;
451{
452  register rtx insn;
453
454  if (from_insn == to_insn)
455    return 0;
456
457  for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn))
458    if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
459	&& reg_set_p (reg, insn))
460      return 1;
461  return 0;
462}
463
464/* Internals of reg_set_between_p.  */
465
466static rtx reg_set_reg;
467static int reg_set_flag;
468
469static void
470reg_set_p_1 (x, pat)
471     rtx x;
472     rtx pat ATTRIBUTE_UNUSED;
473{
474  /* We don't want to return 1 if X is a MEM that contains a register
475     within REG_SET_REG.  */
476
477  if ((GET_CODE (x) != MEM)
478      && reg_overlap_mentioned_p (reg_set_reg, x))
479    reg_set_flag = 1;
480}
481
482int
483reg_set_p (reg, insn)
484     rtx reg, insn;
485{
486  rtx body = insn;
487
488  /* We can be passed an insn or part of one.  If we are passed an insn,
489     check if a side-effect of the insn clobbers REG.  */
490  if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
491    {
492      if (FIND_REG_INC_NOTE (insn, reg)
493	  || (GET_CODE (insn) == CALL_INSN
494	      /* We'd like to test call_used_regs here, but rtlanal.c can't
495		 reference that variable due to its use in genattrtab.  So
496		 we'll just be more conservative.
497
498		 ??? Unless we could ensure that the CALL_INSN_FUNCTION_USAGE
499		 information holds all clobbered registers.  */
500	      && ((GET_CODE (reg) == REG
501		   && REGNO (reg) < FIRST_PSEUDO_REGISTER)
502		  || GET_CODE (reg) == MEM
503		  || find_reg_fusage (insn, CLOBBER, reg))))
504	return 1;
505
506      body = PATTERN (insn);
507    }
508
509  reg_set_reg = reg;
510  reg_set_flag = 0;
511  note_stores (body, reg_set_p_1);
512  return reg_set_flag;
513}
514
515/* Similar to reg_set_between_p, but check all registers in X.  Return 0
516   only if none of them are modified between START and END.  Do not
517   consider non-registers one way or the other.  */
518
519int
520regs_set_between_p (x, start, end)
521     rtx x;
522     rtx start, end;
523{
524  enum rtx_code code = GET_CODE (x);
525  char *fmt;
526  int i, j;
527
528  switch (code)
529    {
530    case CONST_INT:
531    case CONST_DOUBLE:
532    case CONST:
533    case SYMBOL_REF:
534    case LABEL_REF:
535    case PC:
536    case CC0:
537      return 0;
538
539    case REG:
540      return reg_set_between_p (x, start, end);
541
542    default:
543      break;
544    }
545
546  fmt = GET_RTX_FORMAT (code);
547  for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
548    {
549      if (fmt[i] == 'e' && regs_set_between_p (XEXP (x, i), start, end))
550	return 1;
551
552      else if (fmt[i] == 'E')
553	for (j = XVECLEN (x, i) - 1; j >= 0; j--)
554	  if (regs_set_between_p (XVECEXP (x, i, j), start, end))
555	    return 1;
556    }
557
558  return 0;
559}
560
561/* Similar to reg_set_between_p, but check all registers in X.  Return 0
562   only if none of them are modified between START and END.  Return 1 if
563   X contains a MEM; this routine does not perform any memory aliasing.  */
564
565int
566modified_between_p (x, start, end)
567     rtx x;
568     rtx start, end;
569{
570  enum rtx_code code = GET_CODE (x);
571  char *fmt;
572  int i, j;
573
574  switch (code)
575    {
576    case CONST_INT:
577    case CONST_DOUBLE:
578    case CONST:
579    case SYMBOL_REF:
580    case LABEL_REF:
581      return 0;
582
583    case PC:
584    case CC0:
585      return 1;
586
587    case MEM:
588      /* If the memory is not constant, assume it is modified.  If it is
589	 constant, we still have to check the address.  */
590      if (! RTX_UNCHANGING_P (x))
591	return 1;
592      break;
593
594    case REG:
595      return reg_set_between_p (x, start, end);
596
597    default:
598      break;
599    }
600
601  fmt = GET_RTX_FORMAT (code);
602  for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
603    {
604      if (fmt[i] == 'e' && modified_between_p (XEXP (x, i), start, end))
605	return 1;
606
607      if (fmt[i] == 'E')
608	for (j = XVECLEN (x, i) - 1; j >= 0; j--)
609	  if (modified_between_p (XVECEXP (x, i, j), start, end))
610	    return 1;
611    }
612
613  return 0;
614}
615
616/* Similar to reg_set_p, but check all registers in X.  Return 0 only if none
617   of them are modified in INSN.  Return 1 if X contains a MEM; this routine
618   does not perform any memory aliasing.  */
619
620int
621modified_in_p (x, insn)
622     rtx x;
623     rtx insn;
624{
625  enum rtx_code code = GET_CODE (x);
626  char *fmt;
627  int i, j;
628
629  switch (code)
630    {
631    case CONST_INT:
632    case CONST_DOUBLE:
633    case CONST:
634    case SYMBOL_REF:
635    case LABEL_REF:
636      return 0;
637
638    case PC:
639    case CC0:
640      return 1;
641
642    case MEM:
643      /* If the memory is not constant, assume it is modified.  If it is
644	 constant, we still have to check the address.  */
645      if (! RTX_UNCHANGING_P (x))
646	return 1;
647      break;
648
649    case REG:
650      return reg_set_p (x, insn);
651
652    default:
653      break;
654    }
655
656  fmt = GET_RTX_FORMAT (code);
657  for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
658    {
659      if (fmt[i] == 'e' && modified_in_p (XEXP (x, i), insn))
660	return 1;
661
662      if (fmt[i] == 'E')
663	for (j = XVECLEN (x, i) - 1; j >= 0; j--)
664	  if (modified_in_p (XVECEXP (x, i, j), insn))
665	    return 1;
666    }
667
668  return 0;
669}
670
671/* Given an INSN, return a SET expression if this insn has only a single SET.
672   It may also have CLOBBERs, USEs, or SET whose output
673   will not be used, which we ignore.  */
674
675rtx
676single_set (insn)
677     rtx insn;
678{
679  rtx set;
680  int i;
681
682  if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
683    return 0;
684
685  if (GET_CODE (PATTERN (insn)) == SET)
686    return PATTERN (insn);
687
688  else if (GET_CODE (PATTERN (insn)) == PARALLEL)
689    {
690      for (i = 0, set = 0; i < XVECLEN (PATTERN (insn), 0); i++)
691	if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
692	    && (! find_reg_note (insn, REG_UNUSED,
693				 SET_DEST (XVECEXP (PATTERN (insn), 0, i)))
694		|| side_effects_p (XVECEXP (PATTERN (insn), 0, i))))
695	  {
696	    if (set)
697	      return 0;
698	    else
699	      set = XVECEXP (PATTERN (insn), 0, i);
700	  }
701      return set;
702    }
703
704  return 0;
705}
706
707/* Given an INSN, return nonzero if it has more than one SET, else return
708   zero.  */
709
710int
711multiple_sets (insn)
712     rtx insn;
713{
714  int found;
715  int i;
716
717  /* INSN must be an insn.  */
718  if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
719    return 0;
720
721  /* Only a PARALLEL can have multiple SETs.  */
722  if (GET_CODE (PATTERN (insn)) == PARALLEL)
723    {
724      for (i = 0, found = 0; i < XVECLEN (PATTERN (insn), 0); i++)
725	if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET)
726	  {
727	    /* If we have already found a SET, then return now.  */
728	    if (found)
729	      return 1;
730	    else
731	      found = 1;
732	  }
733    }
734
735  /* Either zero or one SET.  */
736  return 0;
737}
738
739/* Return the last thing that X was assigned from before *PINSN.  Verify that
740   the object is not modified up to VALID_TO.  If it was, if we hit
741   a partial assignment to X, or hit a CODE_LABEL first, return X.  If we
742   found an assignment, update *PINSN to point to it.
743   ALLOW_HWREG is set to 1 if hardware registers are allowed to be the src.  */
744
745rtx
746find_last_value (x, pinsn, valid_to, allow_hwreg)
747     rtx x;
748     rtx *pinsn;
749     rtx valid_to;
750     int allow_hwreg;
751{
752  rtx p;
753
754  for (p = PREV_INSN (*pinsn); p && GET_CODE (p) != CODE_LABEL;
755       p = PREV_INSN (p))
756    if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
757      {
758	rtx set = single_set (p);
759	rtx note = find_reg_note (p, REG_EQUAL, NULL_RTX);
760
761	if (set && rtx_equal_p (x, SET_DEST (set)))
762	  {
763	    rtx src = SET_SRC (set);
764
765	    if (note && GET_CODE (XEXP (note, 0)) != EXPR_LIST)
766	      src = XEXP (note, 0);
767
768	    if (! modified_between_p (src, PREV_INSN (p), valid_to)
769		/* Reject hard registers because we don't usually want
770		   to use them; we'd rather use a pseudo.  */
771		&& (! (GET_CODE (src) == REG
772		      && REGNO (src) < FIRST_PSEUDO_REGISTER) || allow_hwreg))
773	      {
774		*pinsn = p;
775		return src;
776	      }
777	  }
778
779	/* If set in non-simple way, we don't have a value.  */
780	if (reg_set_p (x, p))
781	  break;
782      }
783
784  return x;
785}
786
787/* Return nonzero if register in range [REGNO, ENDREGNO)
788   appears either explicitly or implicitly in X
789   other than being stored into.
790
791   References contained within the substructure at LOC do not count.
792   LOC may be zero, meaning don't ignore anything.  */
793
794int
795refers_to_regno_p (regno, endregno, x, loc)
796     int regno, endregno;
797     rtx x;
798     rtx *loc;
799{
800  register int i;
801  register RTX_CODE code;
802  register char *fmt;
803
804 repeat:
805  /* The contents of a REG_NONNEG note is always zero, so we must come here
806     upon repeat in case the last REG_NOTE is a REG_NONNEG note.  */
807  if (x == 0)
808    return 0;
809
810  code = GET_CODE (x);
811
812  switch (code)
813    {
814    case REG:
815      i = REGNO (x);
816
817      /* If we modifying the stack, frame, or argument pointer, it will
818	 clobber a virtual register.  In fact, we could be more precise,
819	 but it isn't worth it.  */
820      if ((i == STACK_POINTER_REGNUM
821#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
822	   || i == ARG_POINTER_REGNUM
823#endif
824	   || i == FRAME_POINTER_REGNUM)
825	  && regno >= FIRST_VIRTUAL_REGISTER && regno <= LAST_VIRTUAL_REGISTER)
826	return 1;
827
828      return (endregno > i
829	      && regno < i + (i < FIRST_PSEUDO_REGISTER
830			      ? HARD_REGNO_NREGS (i, GET_MODE (x))
831			      : 1));
832
833    case SUBREG:
834      /* If this is a SUBREG of a hard reg, we can see exactly which
835	 registers are being modified.  Otherwise, handle normally.  */
836      if (GET_CODE (SUBREG_REG (x)) == REG
837	  && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
838	{
839	  int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
840	  int inner_endregno
841	    = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
842			     ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
843
844	  return endregno > inner_regno && regno < inner_endregno;
845	}
846      break;
847
848    case CLOBBER:
849    case SET:
850      if (&SET_DEST (x) != loc
851	  /* Note setting a SUBREG counts as referring to the REG it is in for
852	     a pseudo but not for hard registers since we can
853	     treat each word individually.  */
854	  && ((GET_CODE (SET_DEST (x)) == SUBREG
855	       && loc != &SUBREG_REG (SET_DEST (x))
856	       && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
857	       && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
858	       && refers_to_regno_p (regno, endregno,
859				     SUBREG_REG (SET_DEST (x)), loc))
860	      || (GET_CODE (SET_DEST (x)) != REG
861		  && refers_to_regno_p (regno, endregno, SET_DEST (x), loc))))
862	return 1;
863
864      if (code == CLOBBER || loc == &SET_SRC (x))
865	return 0;
866      x = SET_SRC (x);
867      goto repeat;
868
869    default:
870      break;
871    }
872
873  /* X does not match, so try its subexpressions.  */
874
875  fmt = GET_RTX_FORMAT (code);
876  for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
877    {
878      if (fmt[i] == 'e' && loc != &XEXP (x, i))
879	{
880	  if (i == 0)
881	    {
882	      x = XEXP (x, 0);
883	      goto repeat;
884	    }
885	  else
886	    if (refers_to_regno_p (regno, endregno, XEXP (x, i), loc))
887	      return 1;
888	}
889      else if (fmt[i] == 'E')
890	{
891	  register int j;
892	  for (j = XVECLEN (x, i) - 1; j >=0; j--)
893	    if (loc != &XVECEXP (x, i, j)
894		&& refers_to_regno_p (regno, endregno, XVECEXP (x, i, j), loc))
895	      return 1;
896	}
897    }
898  return 0;
899}
900
901/* Nonzero if modifying X will affect IN.  If X is a register or a SUBREG,
902   we check if any register number in X conflicts with the relevant register
903   numbers.  If X is a constant, return 0.  If X is a MEM, return 1 iff IN
904   contains a MEM (we don't bother checking for memory addresses that can't
905   conflict because we expect this to be a rare case.  */
906
907int
908reg_overlap_mentioned_p (x, in)
909     rtx x, in;
910{
911  int regno, endregno;
912
913  /* Overly conservative.  */
914  if (GET_CODE (x) == STRICT_LOW_PART)
915    x = XEXP (x, 0);
916
917  /* If either argument is a constant, then modifying X can not affect IN.  */
918  if (CONSTANT_P (x) || CONSTANT_P (in))
919    return 0;
920  else if (GET_CODE (x) == SUBREG)
921    {
922      regno = REGNO (SUBREG_REG (x));
923      if (regno < FIRST_PSEUDO_REGISTER)
924	regno += SUBREG_WORD (x);
925    }
926  else if (GET_CODE (x) == REG)
927    regno = REGNO (x);
928  else if (GET_CODE (x) == MEM)
929    {
930      char *fmt;
931      int i;
932
933      if (GET_CODE (in) == MEM)
934	return 1;
935
936      fmt = GET_RTX_FORMAT (GET_CODE (in));
937
938      for (i = GET_RTX_LENGTH (GET_CODE (in)) - 1; i >= 0; i--)
939	if (fmt[i] == 'e' && reg_overlap_mentioned_p (x, XEXP (in, i)))
940	  return 1;
941
942      return 0;
943    }
944  else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
945	   || GET_CODE (x) == CC0)
946    return reg_mentioned_p (x, in);
947  else if (GET_CODE (x) == PARALLEL
948	   && GET_MODE (x) == BLKmode)
949    {
950      register int i;
951
952      /* If any register in here refers to it
953	 we return true.  */
954      for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
955	if (reg_overlap_mentioned_p (SET_DEST (XVECEXP (x, 0, i)), in))
956	  return 1;
957      return 0;
958    }
959  else
960    abort ();
961
962  endregno = regno + (regno < FIRST_PSEUDO_REGISTER
963		      ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
964
965  return refers_to_regno_p (regno, endregno, in, NULL_PTR);
966}
967
968/* Used for communications between the next few functions.  */
969
970static int reg_set_last_unknown;
971static rtx reg_set_last_value;
972static int reg_set_last_first_regno, reg_set_last_last_regno;
973
974/* Called via note_stores from reg_set_last.  */
975
976static void
977reg_set_last_1 (x, pat)
978     rtx x;
979     rtx pat;
980{
981  int first, last;
982
983  /* If X is not a register, or is not one in the range we care
984     about, ignore.  */
985  if (GET_CODE (x) != REG)
986    return;
987
988  first = REGNO (x);
989  last = first + (first < FIRST_PSEUDO_REGISTER
990		  ? HARD_REGNO_NREGS (first, GET_MODE (x)) : 1);
991
992  if (first >= reg_set_last_last_regno
993      || last <= reg_set_last_first_regno)
994    return;
995
996  /* If this is a CLOBBER or is some complex LHS, or doesn't modify
997     exactly the registers we care about, show we don't know the value.  */
998  if (GET_CODE (pat) == CLOBBER || SET_DEST (pat) != x
999      || first != reg_set_last_first_regno
1000      || last != reg_set_last_last_regno)
1001    reg_set_last_unknown = 1;
1002  else
1003    reg_set_last_value = SET_SRC (pat);
1004}
1005
1006/* Return the last value to which REG was set prior to INSN.  If we can't
1007   find it easily, return 0.
1008
1009   We only return a REG, SUBREG, or constant because it is too hard to
1010   check if a MEM remains unchanged.  */
1011
1012rtx
1013reg_set_last (x, insn)
1014     rtx x;
1015     rtx insn;
1016{
1017  rtx orig_insn = insn;
1018
1019  reg_set_last_first_regno = REGNO (x);
1020
1021  reg_set_last_last_regno
1022    = reg_set_last_first_regno
1023      + (reg_set_last_first_regno < FIRST_PSEUDO_REGISTER
1024	 ? HARD_REGNO_NREGS (reg_set_last_first_regno, GET_MODE (x)) : 1);
1025
1026  reg_set_last_unknown = 0;
1027  reg_set_last_value = 0;
1028
1029  /* Scan backwards until reg_set_last_1 changed one of the above flags.
1030     Stop when we reach a label or X is a hard reg and we reach a
1031     CALL_INSN (if reg_set_last_last_regno is a hard reg).
1032
1033     If we find a set of X, ensure that its SET_SRC remains unchanged.  */
1034
1035  /* We compare with <= here, because reg_set_last_last_regno
1036     is actually the number of the first reg *not* in X.  */
1037  for (;
1038       insn && GET_CODE (insn) != CODE_LABEL
1039       && ! (GET_CODE (insn) == CALL_INSN
1040	     && reg_set_last_last_regno <= FIRST_PSEUDO_REGISTER);
1041       insn = PREV_INSN (insn))
1042    if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
1043      {
1044	note_stores (PATTERN (insn), reg_set_last_1);
1045	if (reg_set_last_unknown)
1046	  return 0;
1047	else if (reg_set_last_value)
1048	  {
1049	    if (CONSTANT_P (reg_set_last_value)
1050		|| ((GET_CODE (reg_set_last_value) == REG
1051		     || GET_CODE (reg_set_last_value) == SUBREG)
1052		    && ! reg_set_between_p (reg_set_last_value,
1053					    insn, orig_insn)))
1054	      return reg_set_last_value;
1055	    else
1056	      return 0;
1057	  }
1058      }
1059
1060  return 0;
1061}
1062
1063/* This is 1 until after the rtl generation pass.  */
1064int rtx_equal_function_value_matters;
1065
1066/* Return 1 if X and Y are identical-looking rtx's.
1067   This is the Lisp function EQUAL for rtx arguments.  */
1068
1069int
1070rtx_equal_p (x, y)
1071     rtx x, y;
1072{
1073  register int i;
1074  register int j;
1075  register enum rtx_code code;
1076  register char *fmt;
1077
1078  if (x == y)
1079    return 1;
1080  if (x == 0 || y == 0)
1081    return 0;
1082
1083  code = GET_CODE (x);
1084  /* Rtx's of different codes cannot be equal.  */
1085  if (code != GET_CODE (y))
1086    return 0;
1087
1088  /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1089     (REG:SI x) and (REG:HI x) are NOT equivalent.  */
1090
1091  if (GET_MODE (x) != GET_MODE (y))
1092    return 0;
1093
1094  /* REG, LABEL_REF, and SYMBOL_REF can be compared nonrecursively.  */
1095
1096  if (code == REG)
1097    /* Until rtl generation is complete, don't consider a reference to the
1098       return register of the current function the same as the return from a
1099       called function.  This eases the job of function integration.  Once the
1100       distinction is no longer needed, they can be considered equivalent.  */
1101    return (REGNO (x) == REGNO (y)
1102	    && (! rtx_equal_function_value_matters
1103		|| REG_FUNCTION_VALUE_P (x) == REG_FUNCTION_VALUE_P (y)));
1104  else if (code == LABEL_REF)
1105    return XEXP (x, 0) == XEXP (y, 0);
1106  else if (code == SYMBOL_REF)
1107    return XSTR (x, 0) == XSTR (y, 0);
1108  else if (code == SCRATCH || code == CONST_DOUBLE)
1109    return 0;
1110
1111  /* Compare the elements.  If any pair of corresponding elements
1112     fail to match, return 0 for the whole things.  */
1113
1114  fmt = GET_RTX_FORMAT (code);
1115  for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1116    {
1117      switch (fmt[i])
1118	{
1119	case 'w':
1120	  if (XWINT (x, i) != XWINT (y, i))
1121	    return 0;
1122	  break;
1123
1124	case 'n':
1125	case 'i':
1126	  if (XINT (x, i) != XINT (y, i))
1127	    return 0;
1128	  break;
1129
1130	case 'V':
1131	case 'E':
1132	  /* Two vectors must have the same length.  */
1133	  if (XVECLEN (x, i) != XVECLEN (y, i))
1134	    return 0;
1135
1136	  /* And the corresponding elements must match.  */
1137	  for (j = 0; j < XVECLEN (x, i); j++)
1138	    if (rtx_equal_p (XVECEXP (x, i, j), XVECEXP (y, i, j)) == 0)
1139	      return 0;
1140	  break;
1141
1142	case 'e':
1143	  if (rtx_equal_p (XEXP (x, i), XEXP (y, i)) == 0)
1144	    return 0;
1145	  break;
1146
1147	case 'S':
1148	case 's':
1149	  if (strcmp (XSTR (x, i), XSTR (y, i)))
1150	    return 0;
1151	  break;
1152
1153	case 'u':
1154	  /* These are just backpointers, so they don't matter.  */
1155	  break;
1156
1157	case '0':
1158	  break;
1159
1160	  /* It is believed that rtx's at this level will never
1161	     contain anything but integers and other rtx's,
1162	     except for within LABEL_REFs and SYMBOL_REFs.  */
1163	default:
1164	  abort ();
1165	}
1166    }
1167  return 1;
1168}
1169
1170/* Call FUN on each register or MEM that is stored into or clobbered by X.
1171   (X would be the pattern of an insn).
1172   FUN receives two arguments:
1173     the REG, MEM, CC0 or PC being stored in or clobbered,
1174     the SET or CLOBBER rtx that does the store.
1175
1176  If the item being stored in or clobbered is a SUBREG of a hard register,
1177  the SUBREG will be passed.  */
1178
1179void
1180note_stores (x, fun)
1181     register rtx x;
1182     void (*fun) PROTO ((rtx, rtx));
1183{
1184  if ((GET_CODE (x) == SET || GET_CODE (x) == CLOBBER))
1185    {
1186      register rtx dest = SET_DEST (x);
1187      while ((GET_CODE (dest) == SUBREG
1188	      && (GET_CODE (SUBREG_REG (dest)) != REG
1189		  || REGNO (SUBREG_REG (dest)) >= FIRST_PSEUDO_REGISTER))
1190	     || GET_CODE (dest) == ZERO_EXTRACT
1191	     || GET_CODE (dest) == SIGN_EXTRACT
1192	     || GET_CODE (dest) == STRICT_LOW_PART)
1193	dest = XEXP (dest, 0);
1194
1195      if (GET_CODE (dest) == PARALLEL
1196	  && GET_MODE (dest) == BLKmode)
1197	{
1198	  register int i;
1199	  for (i = XVECLEN (dest, 0) - 1; i >= 0; i--)
1200	    (*fun) (SET_DEST (XVECEXP (dest, 0, i)), x);
1201	}
1202      else
1203	(*fun) (dest, x);
1204    }
1205  else if (GET_CODE (x) == PARALLEL)
1206    {
1207      register int i;
1208      for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
1209	{
1210	  register rtx y = XVECEXP (x, 0, i);
1211	  if (GET_CODE (y) == SET || GET_CODE (y) == CLOBBER)
1212	    {
1213	      register rtx dest = SET_DEST (y);
1214	      while ((GET_CODE (dest) == SUBREG
1215		      && (GET_CODE (SUBREG_REG (dest)) != REG
1216			  || (REGNO (SUBREG_REG (dest))
1217			      >= FIRST_PSEUDO_REGISTER)))
1218		     || GET_CODE (dest) == ZERO_EXTRACT
1219		     || GET_CODE (dest) == SIGN_EXTRACT
1220		     || GET_CODE (dest) == STRICT_LOW_PART)
1221		dest = XEXP (dest, 0);
1222	      if (GET_CODE (dest) == PARALLEL
1223		  && GET_MODE (dest) == BLKmode)
1224		{
1225		  register int i;
1226		  for (i = XVECLEN (dest, 0) - 1; i >= 0; i--)
1227		    (*fun) (SET_DEST (XVECEXP (dest, 0, i)), y);
1228		}
1229	      else
1230		(*fun) (dest, y);
1231	    }
1232	}
1233    }
1234}
1235
1236/* Return nonzero if X's old contents don't survive after INSN.
1237   This will be true if X is (cc0) or if X is a register and
1238   X dies in INSN or because INSN entirely sets X.
1239
1240   "Entirely set" means set directly and not through a SUBREG,
1241   ZERO_EXTRACT or SIGN_EXTRACT, so no trace of the old contents remains.
1242   Likewise, REG_INC does not count.
1243
1244   REG may be a hard or pseudo reg.  Renumbering is not taken into account,
1245   but for this use that makes no difference, since regs don't overlap
1246   during their lifetimes.  Therefore, this function may be used
1247   at any time after deaths have been computed (in flow.c).
1248
1249   If REG is a hard reg that occupies multiple machine registers, this
1250   function will only return 1 if each of those registers will be replaced
1251   by INSN.  */
1252
1253int
1254dead_or_set_p (insn, x)
1255     rtx insn;
1256     rtx x;
1257{
1258  register int regno, last_regno;
1259  register int i;
1260
1261  /* Can't use cc0_rtx below since this file is used by genattrtab.c.  */
1262  if (GET_CODE (x) == CC0)
1263    return 1;
1264
1265  if (GET_CODE (x) != REG)
1266    abort ();
1267
1268  regno = REGNO (x);
1269  last_regno = (regno >= FIRST_PSEUDO_REGISTER ? regno
1270		: regno + HARD_REGNO_NREGS (regno, GET_MODE (x)) - 1);
1271
1272  for (i = regno; i <= last_regno; i++)
1273    if (! dead_or_set_regno_p (insn, i))
1274      return 0;
1275
1276  return 1;
1277}
1278
1279/* Utility function for dead_or_set_p to check an individual register.  Also
1280   called from flow.c.  */
1281
1282int
1283dead_or_set_regno_p (insn, test_regno)
1284     rtx insn;
1285     int test_regno;
1286{
1287  int regno, endregno;
1288  rtx link;
1289
1290  /* See if there is a death note for something that includes
1291     TEST_REGNO.  */
1292  for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1293    {
1294      if (REG_NOTE_KIND (link) != REG_DEAD
1295	  || GET_CODE (XEXP (link, 0)) != REG)
1296	continue;
1297
1298      regno = REGNO (XEXP (link, 0));
1299      endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1
1300		  : regno + HARD_REGNO_NREGS (regno,
1301					      GET_MODE (XEXP (link, 0))));
1302
1303      if (test_regno >= regno && test_regno < endregno)
1304	return 1;
1305    }
1306
1307  if (GET_CODE (insn) == CALL_INSN
1308      && find_regno_fusage (insn, CLOBBER, test_regno))
1309    return 1;
1310
1311  if (GET_CODE (PATTERN (insn)) == SET)
1312    {
1313      rtx dest = SET_DEST (PATTERN (insn));
1314
1315      /* A value is totally replaced if it is the destination or the
1316	 destination is a SUBREG of REGNO that does not change the number of
1317	 words in it.  */
1318      if (GET_CODE (dest) == SUBREG
1319	  && (((GET_MODE_SIZE (GET_MODE (dest))
1320		+ UNITS_PER_WORD - 1) / UNITS_PER_WORD)
1321	      == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))
1322		   + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))
1323	dest = SUBREG_REG (dest);
1324
1325      if (GET_CODE (dest) != REG)
1326	return 0;
1327
1328      regno = REGNO (dest);
1329      endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1
1330		  : regno + HARD_REGNO_NREGS (regno, GET_MODE (dest)));
1331
1332      return (test_regno >= regno && test_regno < endregno);
1333    }
1334  else if (GET_CODE (PATTERN (insn)) == PARALLEL)
1335    {
1336      register int i;
1337
1338      for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
1339	{
1340	  rtx body = XVECEXP (PATTERN (insn), 0, i);
1341
1342	  if (GET_CODE (body) == SET || GET_CODE (body) == CLOBBER)
1343	    {
1344	      rtx dest = SET_DEST (body);
1345
1346	      if (GET_CODE (dest) == SUBREG
1347		  && (((GET_MODE_SIZE (GET_MODE (dest))
1348			+ UNITS_PER_WORD - 1) / UNITS_PER_WORD)
1349		      == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))
1350			   + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))
1351		dest = SUBREG_REG (dest);
1352
1353	      if (GET_CODE (dest) != REG)
1354		continue;
1355
1356	      regno = REGNO (dest);
1357	      endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1
1358			  : regno + HARD_REGNO_NREGS (regno, GET_MODE (dest)));
1359
1360	      if (test_regno >= regno && test_regno < endregno)
1361		return 1;
1362	    }
1363	}
1364    }
1365
1366  return 0;
1367}
1368
1369/* Return the reg-note of kind KIND in insn INSN, if there is one.
1370   If DATUM is nonzero, look for one whose datum is DATUM.  */
1371
1372rtx
1373find_reg_note (insn, kind, datum)
1374     rtx insn;
1375     enum reg_note kind;
1376     rtx datum;
1377{
1378  register rtx link;
1379
1380  /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN.  */
1381  if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
1382    return 0;
1383
1384  for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1385    if (REG_NOTE_KIND (link) == kind
1386	&& (datum == 0 || datum == XEXP (link, 0)))
1387      return link;
1388  return 0;
1389}
1390
1391/* Return the reg-note of kind KIND in insn INSN which applies to register
1392   number REGNO, if any.  Return 0 if there is no such reg-note.  Note that
1393   the REGNO of this NOTE need not be REGNO if REGNO is a hard register;
1394   it might be the case that the note overlaps REGNO.  */
1395
1396rtx
1397find_regno_note (insn, kind, regno)
1398     rtx insn;
1399     enum reg_note kind;
1400     int regno;
1401{
1402  register rtx link;
1403
1404  /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN.  */
1405  if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
1406    return 0;
1407
1408  for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1409    if (REG_NOTE_KIND (link) == kind
1410	/* Verify that it is a register, so that scratch and MEM won't cause a
1411	   problem here.  */
1412	&& GET_CODE (XEXP (link, 0)) == REG
1413	&& REGNO (XEXP (link, 0)) <= regno
1414	&& ((REGNO (XEXP (link, 0))
1415	     + (REGNO (XEXP (link, 0)) >= FIRST_PSEUDO_REGISTER ? 1
1416		: HARD_REGNO_NREGS (REGNO (XEXP (link, 0)),
1417				    GET_MODE (XEXP (link, 0)))))
1418	    > regno))
1419      return link;
1420  return 0;
1421}
1422
1423/* Return true if DATUM, or any overlap of DATUM, of kind CODE is found
1424   in the CALL_INSN_FUNCTION_USAGE information of INSN.  */
1425
1426int
1427find_reg_fusage (insn, code, datum)
1428     rtx insn;
1429     enum rtx_code code;
1430     rtx datum;
1431{
1432  /* If it's not a CALL_INSN, it can't possibly have a
1433     CALL_INSN_FUNCTION_USAGE field, so don't bother checking.  */
1434  if (GET_CODE (insn) != CALL_INSN)
1435    return 0;
1436
1437  if (! datum)
1438    abort();
1439
1440  if (GET_CODE (datum) != REG)
1441    {
1442      register rtx link;
1443
1444      for (link = CALL_INSN_FUNCTION_USAGE (insn);
1445           link;
1446	   link = XEXP (link, 1))
1447        if (GET_CODE (XEXP (link, 0)) == code
1448	    && rtx_equal_p (datum, SET_DEST (XEXP (link, 0))))
1449          return 1;
1450    }
1451  else
1452    {
1453      register int regno = REGNO (datum);
1454
1455      /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1456	 to pseudo registers, so don't bother checking.  */
1457
1458      if (regno < FIRST_PSEUDO_REGISTER)
1459        {
1460	  int end_regno = regno + HARD_REGNO_NREGS (regno, GET_MODE (datum));
1461	  int i;
1462
1463	  for (i = regno; i < end_regno; i++)
1464	    if (find_regno_fusage (insn, code, i))
1465	      return 1;
1466        }
1467    }
1468
1469  return 0;
1470}
1471
1472/* Return true if REGNO, or any overlap of REGNO, of kind CODE is found
1473   in the CALL_INSN_FUNCTION_USAGE information of INSN.  */
1474
1475int
1476find_regno_fusage (insn, code, regno)
1477     rtx insn;
1478     enum rtx_code code;
1479     int regno;
1480{
1481  register rtx link;
1482
1483  /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1484     to pseudo registers, so don't bother checking.  */
1485
1486  if (regno >= FIRST_PSEUDO_REGISTER
1487      || GET_CODE (insn) != CALL_INSN )
1488    return 0;
1489
1490  for (link = CALL_INSN_FUNCTION_USAGE (insn); link; link = XEXP (link, 1))
1491   {
1492    register int regnote;
1493    register rtx op;
1494
1495    if (GET_CODE (op = XEXP (link, 0)) == code
1496	&& GET_CODE (SET_DEST (op)) == REG
1497	&& (regnote = REGNO (SET_DEST (op))) <= regno
1498	&& regnote
1499		+ HARD_REGNO_NREGS (regnote, GET_MODE (SET_DEST (op)))
1500	    > regno)
1501      return 1;
1502   }
1503
1504  return 0;
1505}
1506
1507/* Remove register note NOTE from the REG_NOTES of INSN.  */
1508
1509void
1510remove_note (insn, note)
1511     register rtx note;
1512     register rtx insn;
1513{
1514  register rtx link;
1515
1516  if (REG_NOTES (insn) == note)
1517    {
1518      REG_NOTES (insn) = XEXP (note, 1);
1519      return;
1520    }
1521
1522  for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1523    if (XEXP (link, 1) == note)
1524      {
1525	XEXP (link, 1) = XEXP (note, 1);
1526	return;
1527      }
1528
1529  abort ();
1530}
1531
1532/* Search LISTP (an EXPR_LIST) for NODE and remove NODE from the list
1533   if it is found.
1534
1535   A simple equality test is used to determine if NODE is on the
1536   EXPR_LIST.  */
1537
1538void
1539remove_node_from_expr_list (node, listp)
1540     rtx node;
1541     rtx *listp;
1542{
1543  rtx temp = *listp;
1544  rtx prev = NULL_RTX;
1545
1546  while (temp)
1547    {
1548      if (node == XEXP (temp, 0))
1549	{
1550	  /* Splice the node out of the list.  */
1551	  if (prev)
1552	    XEXP (prev, 1) = XEXP (temp, 1);
1553	  else
1554	    *listp = XEXP (temp, 1);
1555
1556	  return;
1557	}
1558      temp = XEXP (temp, 1);
1559    }
1560}
1561
1562/* Nonzero if X contains any volatile instructions.  These are instructions
1563   which may cause unpredictable machine state instructions, and thus no
1564   instructions should be moved or combined across them.  This includes
1565   only volatile asms and UNSPEC_VOLATILE instructions.  */
1566
1567int
1568volatile_insn_p (x)
1569     rtx x;
1570{
1571  register RTX_CODE code;
1572
1573  code = GET_CODE (x);
1574  switch (code)
1575    {
1576    case LABEL_REF:
1577    case SYMBOL_REF:
1578    case CONST_INT:
1579    case CONST:
1580    case CONST_DOUBLE:
1581    case CC0:
1582    case PC:
1583    case REG:
1584    case SCRATCH:
1585    case CLOBBER:
1586    case ASM_INPUT:
1587    case ADDR_VEC:
1588    case ADDR_DIFF_VEC:
1589    case CALL:
1590    case MEM:
1591      return 0;
1592
1593    case UNSPEC_VOLATILE:
1594 /* case TRAP_IF: This isn't clear yet.  */
1595      return 1;
1596
1597    case ASM_OPERANDS:
1598      if (MEM_VOLATILE_P (x))
1599	return 1;
1600
1601    default:
1602      break;
1603    }
1604
1605  /* Recursively scan the operands of this expression.  */
1606
1607  {
1608    register char *fmt = GET_RTX_FORMAT (code);
1609    register int i;
1610
1611    for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1612      {
1613	if (fmt[i] == 'e')
1614	  {
1615	    if (volatile_insn_p (XEXP (x, i)))
1616	      return 1;
1617	  }
1618	if (fmt[i] == 'E')
1619	  {
1620	    register int j;
1621	    for (j = 0; j < XVECLEN (x, i); j++)
1622	      if (volatile_insn_p (XVECEXP (x, i, j)))
1623		return 1;
1624	  }
1625      }
1626  }
1627  return 0;
1628}
1629
1630/* Nonzero if X contains any volatile memory references
1631   UNSPEC_VOLATILE operations or volatile ASM_OPERANDS expressions.  */
1632
1633int
1634volatile_refs_p (x)
1635     rtx x;
1636{
1637  register RTX_CODE code;
1638
1639  code = GET_CODE (x);
1640  switch (code)
1641    {
1642    case LABEL_REF:
1643    case SYMBOL_REF:
1644    case CONST_INT:
1645    case CONST:
1646    case CONST_DOUBLE:
1647    case CC0:
1648    case PC:
1649    case REG:
1650    case SCRATCH:
1651    case CLOBBER:
1652    case ASM_INPUT:
1653    case ADDR_VEC:
1654    case ADDR_DIFF_VEC:
1655      return 0;
1656
1657    case CALL:
1658    case UNSPEC_VOLATILE:
1659 /* case TRAP_IF: This isn't clear yet.  */
1660      return 1;
1661
1662    case MEM:
1663    case ASM_OPERANDS:
1664      if (MEM_VOLATILE_P (x))
1665	return 1;
1666
1667    default:
1668      break;
1669    }
1670
1671  /* Recursively scan the operands of this expression.  */
1672
1673  {
1674    register char *fmt = GET_RTX_FORMAT (code);
1675    register int i;
1676
1677    for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1678      {
1679	if (fmt[i] == 'e')
1680	  {
1681	    if (volatile_refs_p (XEXP (x, i)))
1682	      return 1;
1683	  }
1684	if (fmt[i] == 'E')
1685	  {
1686	    register int j;
1687	    for (j = 0; j < XVECLEN (x, i); j++)
1688	      if (volatile_refs_p (XVECEXP (x, i, j)))
1689		return 1;
1690	  }
1691      }
1692  }
1693  return 0;
1694}
1695
1696/* Similar to above, except that it also rejects register pre- and post-
1697   incrementing.  */
1698
1699int
1700side_effects_p (x)
1701     rtx x;
1702{
1703  register RTX_CODE code;
1704
1705  code = GET_CODE (x);
1706  switch (code)
1707    {
1708    case LABEL_REF:
1709    case SYMBOL_REF:
1710    case CONST_INT:
1711    case CONST:
1712    case CONST_DOUBLE:
1713    case CC0:
1714    case PC:
1715    case REG:
1716    case SCRATCH:
1717    case ASM_INPUT:
1718    case ADDR_VEC:
1719    case ADDR_DIFF_VEC:
1720      return 0;
1721
1722    case CLOBBER:
1723      /* Reject CLOBBER with a non-VOID mode.  These are made by combine.c
1724	 when some combination can't be done.  If we see one, don't think
1725	 that we can simplify the expression.  */
1726      return (GET_MODE (x) != VOIDmode);
1727
1728    case PRE_INC:
1729    case PRE_DEC:
1730    case POST_INC:
1731    case POST_DEC:
1732    case CALL:
1733    case UNSPEC_VOLATILE:
1734 /* case TRAP_IF: This isn't clear yet.  */
1735      return 1;
1736
1737    case MEM:
1738    case ASM_OPERANDS:
1739      if (MEM_VOLATILE_P (x))
1740	return 1;
1741
1742    default:
1743      break;
1744    }
1745
1746  /* Recursively scan the operands of this expression.  */
1747
1748  {
1749    register char *fmt = GET_RTX_FORMAT (code);
1750    register int i;
1751
1752    for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1753      {
1754	if (fmt[i] == 'e')
1755	  {
1756	    if (side_effects_p (XEXP (x, i)))
1757	      return 1;
1758	  }
1759	if (fmt[i] == 'E')
1760	  {
1761	    register int j;
1762	    for (j = 0; j < XVECLEN (x, i); j++)
1763	      if (side_effects_p (XVECEXP (x, i, j)))
1764		return 1;
1765	  }
1766      }
1767  }
1768  return 0;
1769}
1770
1771/* Return nonzero if evaluating rtx X might cause a trap.  */
1772
1773int
1774may_trap_p (x)
1775     rtx x;
1776{
1777  int i;
1778  enum rtx_code code;
1779  char *fmt;
1780
1781  if (x == 0)
1782    return 0;
1783  code = GET_CODE (x);
1784  switch (code)
1785    {
1786      /* Handle these cases quickly.  */
1787    case CONST_INT:
1788    case CONST_DOUBLE:
1789    case SYMBOL_REF:
1790    case LABEL_REF:
1791    case CONST:
1792    case PC:
1793    case CC0:
1794    case REG:
1795    case SCRATCH:
1796      return 0;
1797
1798      /* Conditional trap can trap!  */
1799    case UNSPEC_VOLATILE:
1800    case TRAP_IF:
1801      return 1;
1802
1803      /* Memory ref can trap unless it's a static var or a stack slot.  */
1804    case MEM:
1805      return rtx_addr_can_trap_p (XEXP (x, 0));
1806
1807      /* Division by a non-constant might trap.  */
1808    case DIV:
1809    case MOD:
1810    case UDIV:
1811    case UMOD:
1812      if (! CONSTANT_P (XEXP (x, 1))
1813	  || GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1814	return 1;
1815      /* This was const0_rtx, but by not using that,
1816	 we can link this file into other programs.  */
1817      if (GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) == 0)
1818	return 1;
1819      break;
1820
1821    case EXPR_LIST:
1822      /* An EXPR_LIST is used to represent a function call.  This
1823	 certainly may trap.  */
1824      return 1;
1825
1826    default:
1827      /* Any floating arithmetic may trap.  */
1828      if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1829	return 1;
1830    }
1831
1832  fmt = GET_RTX_FORMAT (code);
1833  for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1834    {
1835      if (fmt[i] == 'e')
1836	{
1837	  if (may_trap_p (XEXP (x, i)))
1838	    return 1;
1839	}
1840      else if (fmt[i] == 'E')
1841	{
1842	  register int j;
1843	  for (j = 0; j < XVECLEN (x, i); j++)
1844	    if (may_trap_p (XVECEXP (x, i, j)))
1845	      return 1;
1846	}
1847    }
1848  return 0;
1849}
1850
1851/* Return nonzero if X contains a comparison that is not either EQ or NE,
1852   i.e., an inequality.  */
1853
1854int
1855inequality_comparisons_p (x)
1856     rtx x;
1857{
1858  register char *fmt;
1859  register int len, i;
1860  register enum rtx_code code = GET_CODE (x);
1861
1862  switch (code)
1863    {
1864    case REG:
1865    case SCRATCH:
1866    case PC:
1867    case CC0:
1868    case CONST_INT:
1869    case CONST_DOUBLE:
1870    case CONST:
1871    case LABEL_REF:
1872    case SYMBOL_REF:
1873      return 0;
1874
1875    case LT:
1876    case LTU:
1877    case GT:
1878    case GTU:
1879    case LE:
1880    case LEU:
1881    case GE:
1882    case GEU:
1883      return 1;
1884
1885    default:
1886      break;
1887    }
1888
1889  len = GET_RTX_LENGTH (code);
1890  fmt = GET_RTX_FORMAT (code);
1891
1892  for (i = 0; i < len; i++)
1893    {
1894      if (fmt[i] == 'e')
1895	{
1896	  if (inequality_comparisons_p (XEXP (x, i)))
1897	    return 1;
1898	}
1899      else if (fmt[i] == 'E')
1900	{
1901	  register int j;
1902	  for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1903	    if (inequality_comparisons_p (XVECEXP (x, i, j)))
1904	      return 1;
1905	}
1906    }
1907
1908  return 0;
1909}
1910
1911/* Replace any occurrence of FROM in X with TO.  The function does
1912   not enter into CONST_DOUBLE for the replace.
1913
1914   Note that copying is not done so X must not be shared unless all copies
1915   are to be modified.  */
1916
1917rtx
1918replace_rtx (x, from, to)
1919     rtx x, from, to;
1920{
1921  register int i, j;
1922  register char *fmt;
1923
1924  /* The following prevents loops occurrence when we change MEM in
1925     CONST_DOUBLE onto the same CONST_DOUBLE. */
1926  if (x != 0 && GET_CODE (x) == CONST_DOUBLE)
1927    return x;
1928
1929  if (x == from)
1930    return to;
1931
1932  /* Allow this function to make replacements in EXPR_LISTs.  */
1933  if (x == 0)
1934    return 0;
1935
1936  fmt = GET_RTX_FORMAT (GET_CODE (x));
1937  for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
1938    {
1939      if (fmt[i] == 'e')
1940	XEXP (x, i) = replace_rtx (XEXP (x, i), from, to);
1941      else if (fmt[i] == 'E')
1942	for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1943	  XVECEXP (x, i, j) = replace_rtx (XVECEXP (x, i, j), from, to);
1944    }
1945
1946  return x;
1947}
1948
1949/* Throughout the rtx X, replace many registers according to REG_MAP.
1950   Return the replacement for X (which may be X with altered contents).
1951   REG_MAP[R] is the replacement for register R, or 0 for don't replace.
1952   NREGS is the length of REG_MAP; regs >= NREGS are not mapped.
1953
1954   We only support REG_MAP entries of REG or SUBREG.  Also, hard registers
1955   should not be mapped to pseudos or vice versa since validate_change
1956   is not called.
1957
1958   If REPLACE_DEST is 1, replacements are also done in destinations;
1959   otherwise, only sources are replaced.  */
1960
1961rtx
1962replace_regs (x, reg_map, nregs, replace_dest)
1963     rtx x;
1964     rtx *reg_map;
1965     int nregs;
1966     int replace_dest;
1967{
1968  register enum rtx_code code;
1969  register int i;
1970  register char *fmt;
1971
1972  if (x == 0)
1973    return x;
1974
1975  code = GET_CODE (x);
1976  switch (code)
1977    {
1978    case SCRATCH:
1979    case PC:
1980    case CC0:
1981    case CONST_INT:
1982    case CONST_DOUBLE:
1983    case CONST:
1984    case SYMBOL_REF:
1985    case LABEL_REF:
1986      return x;
1987
1988    case REG:
1989      /* Verify that the register has an entry before trying to access it.  */
1990      if (REGNO (x) < nregs && reg_map[REGNO (x)] != 0)
1991	{
1992	  /* SUBREGs can't be shared.  Always return a copy to ensure that if
1993	     this replacement occurs more than once then each instance will
1994	     get distinct rtx.  */
1995	  if (GET_CODE (reg_map[REGNO (x)]) == SUBREG)
1996	    return copy_rtx (reg_map[REGNO (x)]);
1997	  return reg_map[REGNO (x)];
1998	}
1999      return x;
2000
2001    case SUBREG:
2002      /* Prevent making nested SUBREGs.  */
2003      if (GET_CODE (SUBREG_REG (x)) == REG && REGNO (SUBREG_REG (x)) < nregs
2004	  && reg_map[REGNO (SUBREG_REG (x))] != 0
2005	  && GET_CODE (reg_map[REGNO (SUBREG_REG (x))]) == SUBREG)
2006	{
2007	  rtx map_val = reg_map[REGNO (SUBREG_REG (x))];
2008	  rtx map_inner = SUBREG_REG (map_val);
2009
2010	  if (GET_MODE (x) == GET_MODE (map_inner))
2011	    return map_inner;
2012	  else
2013	    {
2014	      /* We cannot call gen_rtx here since we may be linked with
2015		 genattrtab.c.  */
2016	      /* Let's try clobbering the incoming SUBREG and see
2017		 if this is really safe.  */
2018	      SUBREG_REG (x) = map_inner;
2019	      SUBREG_WORD (x) += SUBREG_WORD (map_val);
2020	      return x;
2021#if 0
2022	      rtx new = rtx_alloc (SUBREG);
2023	      PUT_MODE (new, GET_MODE (x));
2024	      SUBREG_REG (new) = map_inner;
2025	      SUBREG_WORD (new) = SUBREG_WORD (x) + SUBREG_WORD (map_val);
2026#endif
2027	    }
2028	}
2029      break;
2030
2031    case SET:
2032      if (replace_dest)
2033	SET_DEST (x) = replace_regs (SET_DEST (x), reg_map, nregs, 0);
2034
2035      else if (GET_CODE (SET_DEST (x)) == MEM
2036	       || GET_CODE (SET_DEST (x)) == STRICT_LOW_PART)
2037	/* Even if we are not to replace destinations, replace register if it
2038	   is CONTAINED in destination (destination is memory or
2039	   STRICT_LOW_PART).  */
2040	XEXP (SET_DEST (x), 0) = replace_regs (XEXP (SET_DEST (x), 0),
2041					       reg_map, nregs, 0);
2042      else if (GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
2043	/* Similarly, for ZERO_EXTRACT we replace all operands.  */
2044	break;
2045
2046      SET_SRC (x) = replace_regs (SET_SRC (x), reg_map, nregs, 0);
2047      return x;
2048
2049    default:
2050      break;
2051    }
2052
2053  fmt = GET_RTX_FORMAT (code);
2054  for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2055    {
2056      if (fmt[i] == 'e')
2057	XEXP (x, i) = replace_regs (XEXP (x, i), reg_map, nregs, replace_dest);
2058      if (fmt[i] == 'E')
2059	{
2060	  register int j;
2061	  for (j = 0; j < XVECLEN (x, i); j++)
2062	    XVECEXP (x, i, j) = replace_regs (XVECEXP (x, i, j), reg_map,
2063					      nregs, replace_dest);
2064	}
2065    }
2066  return x;
2067}
2068
2069/* Return 1 if X, the SRC_SRC of  SET of (pc) contain a REG or MEM that is
2070   not in the constant pool and not in the condition of an IF_THEN_ELSE.  */
2071
2072static int
2073jmp_uses_reg_or_mem (x)
2074     rtx x;
2075{
2076  enum rtx_code code = GET_CODE (x);
2077  int i, j;
2078  char *fmt;
2079
2080  switch (code)
2081    {
2082    case CONST:
2083    case LABEL_REF:
2084    case PC:
2085      return 0;
2086
2087    case REG:
2088      return 1;
2089
2090    case MEM:
2091      return ! (GET_CODE (XEXP (x, 0)) == SYMBOL_REF
2092		&& CONSTANT_POOL_ADDRESS_P (XEXP (x, 0)));
2093
2094    case IF_THEN_ELSE:
2095      return (jmp_uses_reg_or_mem (XEXP (x, 1))
2096	      || jmp_uses_reg_or_mem (XEXP (x, 2)));
2097
2098    case PLUS:  case MINUS:  case MULT:
2099      return (jmp_uses_reg_or_mem (XEXP (x, 0))
2100	      || jmp_uses_reg_or_mem (XEXP (x, 1)));
2101
2102    default:
2103      break;
2104    }
2105
2106  fmt = GET_RTX_FORMAT (code);
2107  for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2108    {
2109      if (fmt[i] == 'e'
2110	  && jmp_uses_reg_or_mem (XEXP (x, i)))
2111	return 1;
2112
2113      if (fmt[i] == 'E')
2114	for (j = 0; j < XVECLEN (x, i); j++)
2115	  if (jmp_uses_reg_or_mem (XVECEXP (x, i, j)))
2116	    return 1;
2117    }
2118
2119  return 0;
2120}
2121
2122/* Return nonzero if INSN is an indirect jump (aka computed jump).
2123
2124   Tablejumps and casesi insns are not considered indirect jumps;
2125   we can recognize them by a (use (lael_ref)).  */
2126
2127int
2128computed_jump_p (insn)
2129     rtx insn;
2130{
2131  int i;
2132  if (GET_CODE (insn) == JUMP_INSN)
2133    {
2134      rtx pat = PATTERN (insn);
2135
2136      if (GET_CODE (pat) == PARALLEL)
2137	{
2138	  int len = XVECLEN (pat, 0);
2139	  int has_use_labelref = 0;
2140
2141	  for (i = len - 1; i >= 0; i--)
2142	    if (GET_CODE (XVECEXP (pat, 0, i)) == USE
2143		&& (GET_CODE (XEXP (XVECEXP (pat, 0, i), 0))
2144		    == LABEL_REF))
2145	      has_use_labelref = 1;
2146
2147	  if (! has_use_labelref)
2148	    for (i = len - 1; i >= 0; i--)
2149	      if (GET_CODE (XVECEXP (pat, 0, i)) == SET
2150		  && SET_DEST (XVECEXP (pat, 0, i)) == pc_rtx
2151		  && jmp_uses_reg_or_mem (SET_SRC (XVECEXP (pat, 0, i))))
2152		return 1;
2153	}
2154      else if (GET_CODE (pat) == SET
2155	       && SET_DEST (pat) == pc_rtx
2156	       && jmp_uses_reg_or_mem (SET_SRC (pat)))
2157	return 1;
2158    }
2159  return 0;
2160}
2161
2162/* Traverse X via depth-first search, calling F for each
2163   sub-expression (including X itself).  F is also passed the DATA.
2164   If F returns -1, do not traverse sub-expressions, but continue
2165   traversing the rest of the tree.  If F ever returns any other
2166   non-zero value, stop the traversal, and return the value returned
2167   by F.  Otherwise, return 0.  This function does not traverse inside
2168   tree structure that contains RTX_EXPRs, or into sub-expressions
2169   whose format code is `0' since it is not known whether or not those
2170   codes are actually RTL.
2171
2172   This routine is very general, and could (should?) be used to
2173   implement many of the other routines in this file.  */
2174
2175int
2176for_each_rtx (x, f, data)
2177     rtx *x;
2178     rtx_function f;
2179     void *data;
2180{
2181  int result;
2182  int length;
2183  char* format;
2184  int i;
2185
2186  /* Call F on X.  */
2187  result = (*f)(x, data);
2188  if (result == -1)
2189    /* Do not traverse sub-expressions.  */
2190    return 0;
2191  else if (result != 0)
2192    /* Stop the traversal.  */
2193    return result;
2194
2195  if (*x == NULL_RTX)
2196    /* There are no sub-expressions.  */
2197    return 0;
2198
2199  length = GET_RTX_LENGTH (GET_CODE (*x));
2200  format = GET_RTX_FORMAT (GET_CODE (*x));
2201
2202  for (i = 0; i < length; ++i)
2203    {
2204      switch (format[i])
2205	{
2206	case 'e':
2207	  result = for_each_rtx (&XEXP (*x, i), f, data);
2208	  if (result != 0)
2209	    return result;
2210	  break;
2211
2212	case 'V':
2213	case 'E':
2214	  if (XVEC (*x, i) != 0)
2215	    {
2216	      int j;
2217	      for (j = 0; j < XVECLEN (*x, i); ++j)
2218		{
2219		  result = for_each_rtx (&XVECEXP (*x, i, j), f, data);
2220		  if (result != 0)
2221		    return result;
2222		}
2223	    }
2224	  break;
2225
2226	default:
2227	  /* Nothing to do.  */
2228	  break;
2229	}
2230
2231    }
2232
2233  return 0;
2234}
2235
2236/* Searches X for any reference to REGNO, returning the rtx of the
2237   reference found if any.  Otherwise, returns NULL_RTX.  */
2238
2239rtx
2240regno_use_in (regno, x)
2241     int regno;
2242     rtx x;
2243{
2244  register char *fmt;
2245  int i, j;
2246  rtx tem;
2247
2248  if (GET_CODE (x) == REG && REGNO (x) == regno)
2249    return x;
2250
2251  fmt = GET_RTX_FORMAT (GET_CODE (x));
2252  for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
2253    {
2254      if (fmt[i] == 'e')
2255	{
2256	  if ((tem = regno_use_in (regno, XEXP (x, i))))
2257	    return tem;
2258	}
2259      else if (fmt[i] == 'E')
2260	for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2261	  if ((tem = regno_use_in (regno , XVECEXP (x, i, j))))
2262	    return tem;
2263    }
2264
2265  return NULL_RTX;
2266}
2267
2268
2269/* Return 1 if X is an autoincrement side effect and the register is
2270   not the stack pointer.  */
2271int
2272auto_inc_p (x)
2273     rtx x;
2274{
2275  switch (GET_CODE (x))
2276    {
2277    case PRE_INC:
2278    case POST_INC:
2279    case PRE_DEC:
2280    case POST_DEC:
2281    case PRE_MODIFY:
2282    case POST_MODIFY:
2283      /* There are no REG_INC notes for SP.  */
2284      if (XEXP (x, 0) != stack_pointer_rtx)
2285	return 1;
2286    default:
2287      break;
2288    }
2289  return 0;
2290}
2291
2292/* Return 1 if the sequence of instructions beginning with FROM and up
2293   to and including TO is safe to move.  If NEW_TO is non-NULL, and
2294   the sequence is not already safe to move, but can be easily
2295   extended to a sequence which is safe, then NEW_TO will point to the
2296   end of the extended sequence.
2297
2298   For now, this function only checks that the region contains whole
2299   exception regiongs, but it could be extended to check additional
2300   conditions as well.  */
2301
2302int
2303insns_safe_to_move_p (from, to, new_to)
2304     rtx from;
2305     rtx to;
2306     rtx *new_to;
2307{
2308  int eh_region_count = 0;
2309  int past_to_p = 0;
2310  rtx r = from;
2311
2312  /* By default, assume the end of the region will be what was
2313     suggested.  */
2314  if (new_to)
2315    *new_to = to;
2316
2317  while (r)
2318    {
2319      if (GET_CODE (r) == NOTE)
2320	{
2321	  switch (NOTE_LINE_NUMBER (r))
2322	    {
2323	    case NOTE_INSN_EH_REGION_BEG:
2324	      ++eh_region_count;
2325	      break;
2326
2327	    case NOTE_INSN_EH_REGION_END:
2328	      if (eh_region_count == 0)
2329		/* This sequence of instructions contains the end of
2330		   an exception region, but not he beginning.  Moving
2331		   it will cause chaos.  */
2332		return 0;
2333
2334	      --eh_region_count;
2335	      break;
2336
2337	    default:
2338	      break;
2339	    }
2340	}
2341      else if (past_to_p)
2342	/* If we've passed TO, and we see a non-note instruction, we
2343	   can't extend the sequence to a movable sequence.  */
2344	return 0;
2345
2346      if (r == to)
2347	{
2348	  if (!new_to)
2349	    /* It's OK to move the sequence if there were matched sets of
2350	       exception region notes.  */
2351	    return eh_region_count == 0;
2352
2353	  past_to_p = 1;
2354	}
2355
2356      /* It's OK to move the sequence if there were matched sets of
2357	 exception region notes.  */
2358      if (past_to_p && eh_region_count == 0)
2359	{
2360	  *new_to = r;
2361	  return 1;
2362	}
2363
2364      /* Go to the next instruction.  */
2365      r = NEXT_INSN (r);
2366    }
2367
2368  return 0;
2369}
2370