1/* Save and restore call-clobbered registers which are live across a call. 2 Copyright (C) 1989, 1992, 94-95, 97, 98, 1999 Free Software Foundation, Inc. 3 4This file is part of GNU CC. 5 6GNU CC is free software; you can redistribute it and/or modify 7it under the terms of the GNU General Public License as published by 8the Free Software Foundation; either version 2, or (at your option) 9any later version. 10 11GNU CC is distributed in the hope that it will be useful, 12but WITHOUT ANY WARRANTY; without even the implied warranty of 13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14GNU General Public License for more details. 15 16You should have received a copy of the GNU General Public License 17along with GNU CC; see the file COPYING. If not, write to 18the Free Software Foundation, 59 Temple Place - Suite 330, 19Boston, MA 02111-1307, USA. */ 20 21#include "config.h" 22#include "system.h" 23#include "rtl.h" 24#include "insn-config.h" 25#include "flags.h" 26#include "regs.h" 27#include "hard-reg-set.h" 28#include "recog.h" 29#include "basic-block.h" 30#include "reload.h" 31#include "expr.h" 32#include "toplev.h" 33 34#ifndef MAX_MOVE_MAX 35#define MAX_MOVE_MAX MOVE_MAX 36#endif 37 38#ifndef MIN_UNITS_PER_WORD 39#define MIN_UNITS_PER_WORD UNITS_PER_WORD 40#endif 41 42#define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD) 43 44/* Modes for each hard register that we can save. The smallest mode is wide 45 enough to save the entire contents of the register. When saving the 46 register because it is live we first try to save in multi-register modes. 47 If that is not possible the save is done one register at a time. */ 48 49static enum machine_mode 50 regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1]; 51 52/* For each hard register, a place on the stack where it can be saved, 53 if needed. */ 54 55static rtx 56 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1]; 57 58/* We will only make a register eligible for caller-save if it can be 59 saved in its widest mode with a simple SET insn as long as the memory 60 address is valid. We record the INSN_CODE is those insns here since 61 when we emit them, the addresses might not be valid, so they might not 62 be recognized. */ 63 64static enum insn_code 65 reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1]; 66static enum insn_code 67 reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1]; 68 69/* Set of hard regs currently residing in save area (during insn scan). */ 70 71static HARD_REG_SET hard_regs_saved; 72 73/* Number of registers currently in hard_regs_saved. */ 74 75static int n_regs_saved; 76 77/* Computed by mark_referenced_regs, all regs referenced in a given 78 insn. */ 79static HARD_REG_SET referenced_regs; 80 81/* Computed in mark_set_regs, holds all registers set by the current 82 instruction. */ 83static HARD_REG_SET this_insn_sets; 84 85 86static void mark_set_regs PROTO((rtx, rtx)); 87static void mark_referenced_regs PROTO((rtx)); 88static int insert_save PROTO((struct insn_chain *, int, int, 89 HARD_REG_SET *)); 90static int insert_restore PROTO((struct insn_chain *, int, int, 91 int)); 92static void insert_one_insn PROTO((struct insn_chain *, int, 93 enum insn_code, rtx)); 94 95/* Initialize for caller-save. 96 97 Look at all the hard registers that are used by a call and for which 98 regclass.c has not already excluded from being used across a call. 99 100 Ensure that we can find a mode to save the register and that there is a 101 simple insn to save and restore the register. This latter check avoids 102 problems that would occur if we tried to save the MQ register of some 103 machines directly into memory. */ 104 105void 106init_caller_save () 107{ 108 char *first_obj = (char *) oballoc (0); 109 rtx addr_reg; 110 int offset; 111 rtx address; 112 int i, j; 113 114 /* First find all the registers that we need to deal with and all 115 the modes that they can have. If we can't find a mode to use, 116 we can't have the register live over calls. */ 117 118 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 119 { 120 if (call_used_regs[i] && ! call_fixed_regs[i]) 121 { 122 for (j = 1; j <= MOVE_MAX_WORDS; j++) 123 { 124 regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j); 125 if (regno_save_mode[i][j] == VOIDmode && j == 1) 126 { 127 call_fixed_regs[i] = 1; 128 SET_HARD_REG_BIT (call_fixed_reg_set, i); 129 } 130 } 131 } 132 else 133 regno_save_mode[i][1] = VOIDmode; 134 } 135 136 /* The following code tries to approximate the conditions under which 137 we can easily save and restore a register without scratch registers or 138 other complexities. It will usually work, except under conditions where 139 the validity of an insn operand is dependent on the address offset. 140 No such cases are currently known. 141 142 We first find a typical offset from some BASE_REG_CLASS register. 143 This address is chosen by finding the first register in the class 144 and by finding the smallest power of two that is a valid offset from 145 that register in every mode we will use to save registers. */ 146 147 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 148 if (TEST_HARD_REG_BIT (reg_class_contents[(int) BASE_REG_CLASS], i)) 149 break; 150 151 if (i == FIRST_PSEUDO_REGISTER) 152 abort (); 153 154 addr_reg = gen_rtx_REG (Pmode, i); 155 156 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1) 157 { 158 address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset)); 159 160 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 161 if (regno_save_mode[i][1] != VOIDmode 162 && ! strict_memory_address_p (regno_save_mode[i][1], address)) 163 break; 164 165 if (i == FIRST_PSEUDO_REGISTER) 166 break; 167 } 168 169 /* If we didn't find a valid address, we must use register indirect. */ 170 if (offset == 0) 171 address = addr_reg; 172 173 /* Next we try to form an insn to save and restore the register. We 174 see if such an insn is recognized and meets its constraints. */ 175 176 start_sequence (); 177 178 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 179 for (j = 1; j <= MOVE_MAX_WORDS; j++) 180 if (regno_save_mode[i][j] != VOIDmode) 181 { 182 rtx mem = gen_rtx_MEM (regno_save_mode[i][j], address); 183 rtx reg = gen_rtx_REG (regno_save_mode[i][j], i); 184 rtx savepat = gen_rtx_SET (VOIDmode, mem, reg); 185 rtx restpat = gen_rtx_SET (VOIDmode, reg, mem); 186 rtx saveinsn = emit_insn (savepat); 187 rtx restinsn = emit_insn (restpat); 188 int ok; 189 190 reg_save_code[i][j] = recog_memoized (saveinsn); 191 reg_restore_code[i][j] = recog_memoized (restinsn); 192 193 /* Now extract both insns and see if we can meet their 194 constraints. */ 195 ok = (reg_save_code[i][j] != (enum insn_code)-1 196 && reg_restore_code[i][j] != (enum insn_code)-1); 197 if (ok) 198 { 199 extract_insn (saveinsn); 200 ok = constrain_operands (1); 201 extract_insn (restinsn); 202 ok &= constrain_operands (1); 203 } 204 205 if (! ok) 206 { 207 regno_save_mode[i][j] = VOIDmode; 208 if (j == 1) 209 { 210 call_fixed_regs[i] = 1; 211 SET_HARD_REG_BIT (call_fixed_reg_set, i); 212 } 213 } 214 } 215 216 end_sequence (); 217 218 obfree (first_obj); 219} 220 221/* Initialize save areas by showing that we haven't allocated any yet. */ 222 223void 224init_save_areas () 225{ 226 int i, j; 227 228 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 229 for (j = 1; j <= MOVE_MAX_WORDS; j++) 230 regno_save_mem[i][j] = 0; 231} 232 233/* Allocate save areas for any hard registers that might need saving. 234 We take a conservative approach here and look for call-clobbered hard 235 registers that are assigned to pseudos that cross calls. This may 236 overestimate slightly (especially if some of these registers are later 237 used as spill registers), but it should not be significant. 238 239 Future work: 240 241 In the fallback case we should iterate backwards across all possible 242 modes for the save, choosing the largest available one instead of 243 falling back to the smallest mode immediately. (eg TF -> DF -> SF). 244 245 We do not try to use "move multiple" instructions that exist 246 on some machines (such as the 68k moveml). It could be a win to try 247 and use them when possible. The hard part is doing it in a way that is 248 machine independent since they might be saving non-consecutive 249 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */ 250 251void 252setup_save_areas () 253{ 254 int i, j, k; 255 HARD_REG_SET hard_regs_used; 256 257 /* Allocate space in the save area for the largest multi-register 258 pseudos first, then work backwards to single register 259 pseudos. */ 260 261 /* Find and record all call-used hard-registers in this function. */ 262 CLEAR_HARD_REG_SET (hard_regs_used); 263 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) 264 if (reg_renumber[i] >= 0 && REG_N_CALLS_CROSSED (i) > 0) 265 { 266 int regno = reg_renumber[i]; 267 int endregno 268 = regno + HARD_REGNO_NREGS (regno, GET_MODE (regno_reg_rtx[i])); 269 int nregs = endregno - regno; 270 271 for (j = 0; j < nregs; j++) 272 { 273 if (call_used_regs[regno+j]) 274 SET_HARD_REG_BIT (hard_regs_used, regno+j); 275 } 276 } 277 278 /* Now run through all the call-used hard-registers and allocate 279 space for them in the caller-save area. Try to allocate space 280 in a manner which allows multi-register saves/restores to be done. */ 281 282 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 283 for (j = MOVE_MAX_WORDS; j > 0; j--) 284 { 285 int do_save = 1; 286 287 /* If no mode exists for this size, try another. Also break out 288 if we have already saved this hard register. */ 289 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0) 290 continue; 291 292 /* See if any register in this group has been saved. */ 293 for (k = 0; k < j; k++) 294 if (regno_save_mem[i + k][1]) 295 { 296 do_save = 0; 297 break; 298 } 299 if (! do_save) 300 continue; 301 302 for (k = 0; k < j; k++) 303 if (! TEST_HARD_REG_BIT (hard_regs_used, i + k)) 304 { 305 do_save = 0; 306 break; 307 } 308 if (! do_save) 309 continue; 310 311 /* We have found an acceptable mode to store in. */ 312 regno_save_mem[i][j] 313 = assign_stack_local (regno_save_mode[i][j], 314 GET_MODE_SIZE (regno_save_mode[i][j]), 0); 315 316 /* Setup single word save area just in case... */ 317 for (k = 0; k < j; k++) 318 { 319 /* This should not depend on WORDS_BIG_ENDIAN. 320 The order of words in regs is the same as in memory. */ 321 rtx temp = gen_rtx_MEM (regno_save_mode[i+k][1], 322 XEXP (regno_save_mem[i][j], 0)); 323 324 regno_save_mem[i+k][1] 325 = adj_offsettable_operand (temp, k * UNITS_PER_WORD); 326 } 327 } 328} 329 330/* Find the places where hard regs are live across calls and save them. */ 331void 332save_call_clobbered_regs () 333{ 334 struct insn_chain *chain, *next; 335 336 CLEAR_HARD_REG_SET (hard_regs_saved); 337 n_regs_saved = 0; 338 339 for (chain = reload_insn_chain; chain != 0; chain = next) 340 { 341 rtx insn = chain->insn; 342 enum rtx_code code = GET_CODE (insn); 343 344 next = chain->next; 345 346 if (chain->is_caller_save_insn) 347 abort (); 348 349 if (GET_RTX_CLASS (code) == 'i') 350 { 351 /* If some registers have been saved, see if INSN references 352 any of them. We must restore them before the insn if so. */ 353 354 if (n_regs_saved) 355 { 356 int regno; 357 358 if (code == JUMP_INSN) 359 /* Restore all registers if this is a JUMP_INSN. */ 360 COPY_HARD_REG_SET (referenced_regs, hard_regs_saved); 361 else 362 { 363 CLEAR_HARD_REG_SET (referenced_regs); 364 mark_referenced_regs (PATTERN (insn)); 365 AND_HARD_REG_SET (referenced_regs, hard_regs_saved); 366 } 367 368 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) 369 if (TEST_HARD_REG_BIT (referenced_regs, regno)) 370 regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS); 371 } 372 373 if (code == CALL_INSN) 374 { 375 rtx x; 376 int regno, nregs; 377 HARD_REG_SET hard_regs_to_save; 378 379 /* Use the register life information in CHAIN to compute which 380 regs are live before the call. */ 381 REG_SET_TO_HARD_REG_SET (hard_regs_to_save, chain->live_before); 382 compute_use_by_pseudos (&hard_regs_to_save, chain->live_before); 383 384 /* Record all registers set in this call insn. These don't need 385 to be saved. */ 386 CLEAR_HARD_REG_SET (this_insn_sets); 387 note_stores (PATTERN (insn), mark_set_regs); 388 389 /* Compute which hard regs must be saved before this call. */ 390 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set); 391 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets); 392 AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved); 393 AND_HARD_REG_SET (hard_regs_to_save, call_used_reg_set); 394 395 /* Registers used for function parameters need not be saved. */ 396 for (x = CALL_INSN_FUNCTION_USAGE (insn); x != 0; 397 x = XEXP (x, 1)) 398 { 399 rtx y; 400 401 if (GET_CODE (XEXP (x, 0)) != USE) 402 continue; 403 y = XEXP (XEXP (x, 0), 0); 404 if (GET_CODE (y) != REG) 405 abort (); 406 regno = REGNO (y); 407 if (REGNO (y) >= FIRST_PSEUDO_REGISTER) 408 abort (); 409 nregs = HARD_REGNO_NREGS (regno, GET_MODE (y)); 410 while (nregs-- > 0) 411 CLEAR_HARD_REG_BIT (hard_regs_to_save, regno + nregs); 412 } 413 414 /* Neither do registers for which we find a death note. */ 415 for (x = REG_NOTES (insn); x != 0; x = XEXP (x, 1)) 416 { 417 rtx y = XEXP (x, 0); 418 419 if (REG_NOTE_KIND (x) != REG_DEAD) 420 continue; 421 if (GET_CODE (y) != REG) 422 abort (); 423 regno = REGNO (y); 424 425 if (regno >= FIRST_PSEUDO_REGISTER) 426 regno = reg_renumber[regno]; 427 if (regno < 0) 428 continue; 429 nregs = HARD_REGNO_NREGS (regno, GET_MODE (y)); 430 while (nregs-- > 0) 431 CLEAR_HARD_REG_BIT (hard_regs_to_save, regno + nregs); 432 } 433 434 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) 435 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno)) 436 regno += insert_save (chain, 1, regno, &hard_regs_to_save); 437 438 /* Must recompute n_regs_saved. */ 439 n_regs_saved = 0; 440 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) 441 if (TEST_HARD_REG_BIT (hard_regs_saved, regno)) 442 n_regs_saved++; 443 } 444 } 445 446 if (chain->next == 0 || chain->next->block > chain->block) 447 { 448 int regno; 449 /* At the end of the basic block, we must restore any registers that 450 remain saved. If the last insn in the block is a JUMP_INSN, put 451 the restore before the insn, otherwise, put it after the insn. */ 452 453 if (n_regs_saved) 454 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) 455 if (TEST_HARD_REG_BIT (hard_regs_saved, regno)) 456 regno += insert_restore (chain, GET_CODE (insn) == JUMP_INSN, 457 regno, MOVE_MAX_WORDS); 458 } 459 } 460} 461 462/* Here from note_stores when an insn stores a value in a register. 463 Set the proper bit or bits in this_insn_sets. All pseudos that have 464 been assigned hard regs have had their register number changed already, 465 so we can ignore pseudos. */ 466static void 467mark_set_regs (reg, setter) 468 rtx reg; 469 rtx setter ATTRIBUTE_UNUSED; 470{ 471 register int regno, endregno, i; 472 enum machine_mode mode = GET_MODE (reg); 473 int word = 0; 474 475 if (GET_CODE (reg) == SUBREG) 476 { 477 word = SUBREG_WORD (reg); 478 reg = SUBREG_REG (reg); 479 } 480 481 if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER) 482 return; 483 484 regno = REGNO (reg) + word; 485 endregno = regno + HARD_REGNO_NREGS (regno, mode); 486 487 for (i = regno; i < endregno; i++) 488 SET_HARD_REG_BIT (this_insn_sets, i); 489} 490 491/* Walk X and record all referenced registers in REFERENCED_REGS. */ 492static void 493mark_referenced_regs (x) 494 rtx x; 495{ 496 enum rtx_code code = GET_CODE (x); 497 char *fmt; 498 int i, j; 499 500 if (code == SET) 501 mark_referenced_regs (SET_SRC (x)); 502 if (code == SET || code == CLOBBER) 503 { 504 x = SET_DEST (x); 505 code = GET_CODE (x); 506 if (code == REG || code == PC || code == CC0 507 || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)) 508 return; 509 } 510 if (code == MEM || code == SUBREG) 511 { 512 x = XEXP (x, 0); 513 code = GET_CODE (x); 514 } 515 516 if (code == REG) 517 { 518 int regno = REGNO (x); 519 int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno 520 : reg_renumber[regno]); 521 522 if (hardregno >= 0) 523 { 524 int nregs = HARD_REGNO_NREGS (hardregno, GET_MODE (x)); 525 while (nregs-- > 0) 526 SET_HARD_REG_BIT (referenced_regs, hardregno + nregs); 527 } 528 /* If this is a pseudo that did not get a hard register, scan its 529 memory location, since it might involve the use of another 530 register, which might be saved. */ 531 else if (reg_equiv_mem[regno] != 0) 532 mark_referenced_regs (XEXP (reg_equiv_mem[regno], 0)); 533 else if (reg_equiv_address[regno] != 0) 534 mark_referenced_regs (reg_equiv_address[regno]); 535 return; 536 } 537 538 fmt = GET_RTX_FORMAT (code); 539 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 540 { 541 if (fmt[i] == 'e') 542 mark_referenced_regs (XEXP (x, i)); 543 else if (fmt[i] == 'E') 544 for (j = XVECLEN (x, i) - 1; j >= 0; j--) 545 mark_referenced_regs (XVECEXP (x, i, j)); 546 } 547} 548 549/* Insert a sequence of insns to restore. Place these insns in front of 550 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is 551 the maximum number of registers which should be restored during this call. 552 It should never be less than 1 since we only work with entire registers. 553 554 Note that we have verified in init_caller_save that we can do this 555 with a simple SET, so use it. Set INSN_CODE to what we save there 556 since the address might not be valid so the insn might not be recognized. 557 These insns will be reloaded and have register elimination done by 558 find_reload, so we need not worry about that here. 559 560 Return the extra number of registers saved. */ 561 562static int 563insert_restore (chain, before_p, regno, maxrestore) 564 struct insn_chain *chain; 565 int before_p; 566 int regno; 567 int maxrestore; 568{ 569 int i; 570 rtx pat = NULL_RTX; 571 enum insn_code code = CODE_FOR_nothing; 572 int numregs = 0; 573 574 /* A common failure mode if register status is not correct in the RTL 575 is for this routine to be called with a REGNO we didn't expect to 576 save. That will cause us to write an insn with a (nil) SET_DEST 577 or SET_SRC. Instead of doing so and causing a crash later, check 578 for this common case and abort here instead. This will remove one 579 step in debugging such problems. */ 580 581 if (regno_save_mem[regno][1] == 0) 582 abort (); 583 584 /* Get the pattern to emit and update our status. 585 586 See if we can restore `maxrestore' registers at once. Work 587 backwards to the single register case. */ 588 for (i = maxrestore; i > 0; i--) 589 { 590 int j, k; 591 int ok = 1; 592 593 if (regno_save_mem[regno][i] == 0) 594 continue; 595 596 for (j = 0; j < i; j++) 597 if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j)) 598 { 599 ok = 0; 600 break; 601 } 602 /* Must do this one restore at a time */ 603 if (! ok) 604 continue; 605 606 pat = gen_rtx_SET (VOIDmode, 607 gen_rtx_REG (GET_MODE (regno_save_mem[regno][i]), 608 regno), 609 regno_save_mem[regno][i]); 610 code = reg_restore_code[regno][i]; 611 612 /* Clear status for all registers we restored. */ 613 for (k = 0; k < i; k++) 614 { 615 CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k); 616 n_regs_saved--; 617 } 618 619 numregs = i; 620 break; 621 } 622 623 insert_one_insn (chain, before_p, code, pat); 624 625 /* Tell our callers how many extra registers we saved/restored */ 626 return numregs - 1; 627} 628 629/* Like insert_restore above, but save registers instead. */ 630static int 631insert_save (chain, before_p, regno, to_save) 632 struct insn_chain *chain; 633 int before_p; 634 int regno; 635 HARD_REG_SET *to_save; 636{ 637 int i; 638 rtx pat = NULL_RTX; 639 enum insn_code code = CODE_FOR_nothing; 640 int numregs = 0; 641 642 /* A common failure mode if register status is not correct in the RTL 643 is for this routine to be called with a REGNO we didn't expect to 644 save. That will cause us to write an insn with a (nil) SET_DEST 645 or SET_SRC. Instead of doing so and causing a crash later, check 646 for this common case and abort here instead. This will remove one 647 step in debugging such problems. */ 648 649 if (regno_save_mem[regno][1] == 0) 650 abort (); 651 652 /* Get the pattern to emit and update our status. 653 654 See if we can save several registers with a single instruction. 655 Work backwards to the single register case. */ 656 for (i = MOVE_MAX_WORDS; i > 0; i--) 657 { 658 int j, k; 659 int ok = 1; 660 if (regno_save_mem[regno][i] == 0) 661 continue; 662 663 for (j = 0; j < i; j++) 664 if (! TEST_HARD_REG_BIT (*to_save, regno + j)) 665 { 666 ok = 0; 667 break; 668 } 669 /* Must do this one save at a time */ 670 if (! ok) 671 continue; 672 673 pat = gen_rtx_SET (VOIDmode, regno_save_mem[regno][i], 674 gen_rtx_REG (GET_MODE (regno_save_mem[regno][i]), 675 regno)); 676 code = reg_save_code[regno][i]; 677 678 /* Set hard_regs_saved for all the registers we saved. */ 679 for (k = 0; k < i; k++) 680 { 681 SET_HARD_REG_BIT (hard_regs_saved, regno + k); 682 n_regs_saved++; 683 } 684 685 numregs = i; 686 break; 687 } 688 689 insert_one_insn (chain, before_p, code, pat); 690 691 /* Tell our callers how many extra registers we saved/restored */ 692 return numregs - 1; 693} 694 695/* Emit a new caller-save insn and set the code. */ 696static void 697insert_one_insn (chain, before_p, code, pat) 698 struct insn_chain *chain; 699 int before_p; 700 enum insn_code code; 701 rtx pat; 702{ 703 rtx insn = chain->insn; 704 struct insn_chain *new; 705 706#ifdef HAVE_cc0 707 /* If INSN references CC0, put our insns in front of the insn that sets 708 CC0. This is always safe, since the only way we could be passed an 709 insn that references CC0 is for a restore, and doing a restore earlier 710 isn't a problem. We do, however, assume here that CALL_INSNs don't 711 reference CC0. Guard against non-INSN's like CODE_LABEL. */ 712 713 if ((GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN) 714 && before_p 715 && reg_referenced_p (cc0_rtx, PATTERN (insn))) 716 chain = chain->prev, insn = chain->insn; 717#endif 718 719 new = new_insn_chain (); 720 if (before_p) 721 { 722 new->prev = chain->prev; 723 if (new->prev != 0) 724 new->prev->next = new; 725 else 726 reload_insn_chain = new; 727 728 chain->prev = new; 729 new->next = chain; 730 new->insn = emit_insn_before (pat, insn); 731 /* ??? It would be nice if we could exclude the already / still saved 732 registers from the live sets. */ 733 COPY_REG_SET (new->live_before, chain->live_before); 734 COPY_REG_SET (new->live_after, chain->live_before); 735 if (chain->insn == BLOCK_HEAD (chain->block)) 736 BLOCK_HEAD (chain->block) = new->insn; 737 } 738 else 739 { 740 new->next = chain->next; 741 if (new->next != 0) 742 new->next->prev = new; 743 chain->next = new; 744 new->prev = chain; 745 new->insn = emit_insn_after (pat, insn); 746 /* ??? It would be nice if we could exclude the already / still saved 747 registers from the live sets, and observe REG_UNUSED notes. */ 748 COPY_REG_SET (new->live_before, chain->live_after); 749 COPY_REG_SET (new->live_after, chain->live_after); 750 if (chain->insn == BLOCK_END (chain->block)) 751 BLOCK_END (chain->block) = new->insn; 752 } 753 new->block = chain->block; 754 new->is_caller_save_insn = 1; 755 756 INSN_CODE (new->insn) = code; 757} 758