1/* tc-arc.c -- Assembler for the ARC 2 Copyright 1994, 1995, 1997, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 3 2006 Free Software Foundation, Inc. 4 Contributed by Doug Evans (dje@cygnus.com). 5 6 This file is part of GAS, the GNU Assembler. 7 8 GAS is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 2, or (at your option) 11 any later version. 12 13 GAS is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with GAS; see the file COPYING. If not, write to the Free 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 21 02110-1301, USA. */ 22 23#include <stdio.h> 24#include "libiberty.h" 25#include "as.h" 26#include "struc-symbol.h" 27#include "safe-ctype.h" 28#include "subsegs.h" 29#include "opcode/arc.h" 30#include "../opcodes/arc-ext.h" 31#include "elf/arc.h" 32#include "dwarf2dbg.h" 33 34const struct suffix_classes 35{ 36 char *name; 37 int len; 38} suffixclass[] = 39{ 40 { "SUFFIX_COND|SUFFIX_FLAG",23 }, 41 { "SUFFIX_FLAG", 11 }, 42 { "SUFFIX_COND", 11 }, 43 { "SUFFIX_NONE", 11 } 44}; 45 46#define MAXSUFFIXCLASS (sizeof (suffixclass) / sizeof (struct suffix_classes)) 47 48const struct syntax_classes 49{ 50 char *name; 51 int len; 52 int class; 53} syntaxclass[] = 54{ 55 { "SYNTAX_3OP|OP1_MUST_BE_IMM", 26, SYNTAX_3OP|OP1_MUST_BE_IMM|SYNTAX_VALID }, 56 { "OP1_MUST_BE_IMM|SYNTAX_3OP", 26, OP1_MUST_BE_IMM|SYNTAX_3OP|SYNTAX_VALID }, 57 { "SYNTAX_2OP|OP1_IMM_IMPLIED", 26, SYNTAX_2OP|OP1_IMM_IMPLIED|SYNTAX_VALID }, 58 { "OP1_IMM_IMPLIED|SYNTAX_2OP", 26, OP1_IMM_IMPLIED|SYNTAX_2OP|SYNTAX_VALID }, 59 { "SYNTAX_3OP", 10, SYNTAX_3OP|SYNTAX_VALID }, 60 { "SYNTAX_2OP", 10, SYNTAX_2OP|SYNTAX_VALID } 61}; 62 63#define MAXSYNTAXCLASS (sizeof (syntaxclass) / sizeof (struct syntax_classes)) 64 65/* This array holds the chars that always start a comment. If the 66 pre-processor is disabled, these aren't very useful. */ 67const char comment_chars[] = "#;"; 68 69/* This array holds the chars that only start a comment at the beginning of 70 a line. If the line seems to have the form '# 123 filename' 71 .line and .file directives will appear in the pre-processed output */ 72/* Note that input_file.c hand checks for '#' at the beginning of the 73 first line of the input file. This is because the compiler outputs 74 #NO_APP at the beginning of its output. */ 75/* Also note that comments started like this one will always 76 work if '/' isn't otherwise defined. */ 77const char line_comment_chars[] = "#"; 78 79const char line_separator_chars[] = ""; 80 81/* Chars that can be used to separate mant from exp in floating point nums. */ 82const char EXP_CHARS[] = "eE"; 83 84/* Chars that mean this number is a floating point constant 85 As in 0f12.456 or 0d1.2345e12. */ 86const char FLT_CHARS[] = "rRsSfFdD"; 87 88/* Byte order. */ 89extern int target_big_endian; 90const char *arc_target_format = DEFAULT_TARGET_FORMAT; 91static int byte_order = DEFAULT_BYTE_ORDER; 92 93static segT arcext_section; 94 95/* One of bfd_mach_arc_n. */ 96static int arc_mach_type = bfd_mach_arc_6; 97 98/* Non-zero if the cpu type has been explicitly specified. */ 99static int mach_type_specified_p = 0; 100 101/* Non-zero if opcode tables have been initialized. 102 A .option command must appear before any instructions. */ 103static int cpu_tables_init_p = 0; 104 105static struct hash_control *arc_suffix_hash = NULL; 106 107const char *md_shortopts = ""; 108 109enum options 110{ 111 OPTION_EB = OPTION_MD_BASE, 112 OPTION_EL, 113 OPTION_ARC5, 114 OPTION_ARC6, 115 OPTION_ARC7, 116 OPTION_ARC8, 117 OPTION_ARC 118}; 119 120struct option md_longopts[] = 121{ 122 { "EB", no_argument, NULL, OPTION_EB }, 123 { "EL", no_argument, NULL, OPTION_EL }, 124 { "marc5", no_argument, NULL, OPTION_ARC5 }, 125 { "pre-v6", no_argument, NULL, OPTION_ARC5 }, 126 { "marc6", no_argument, NULL, OPTION_ARC6 }, 127 { "marc7", no_argument, NULL, OPTION_ARC7 }, 128 { "marc8", no_argument, NULL, OPTION_ARC8 }, 129 { "marc", no_argument, NULL, OPTION_ARC }, 130 { NULL, no_argument, NULL, 0 } 131}; 132size_t md_longopts_size = sizeof (md_longopts); 133 134#define IS_SYMBOL_OPERAND(o) \ 135 ((o) == 'b' || (o) == 'c' || (o) == 's' || (o) == 'o' || (o) == 'O') 136 137struct arc_operand_value *get_ext_suffix (char *s); 138 139/* Invocation line includes a switch not recognized by the base assembler. 140 See if it's a processor-specific option. */ 141 142int 143md_parse_option (int c, char *arg ATTRIBUTE_UNUSED) 144{ 145 switch (c) 146 { 147 case OPTION_ARC5: 148 arc_mach_type = bfd_mach_arc_5; 149 break; 150 case OPTION_ARC: 151 case OPTION_ARC6: 152 arc_mach_type = bfd_mach_arc_6; 153 break; 154 case OPTION_ARC7: 155 arc_mach_type = bfd_mach_arc_7; 156 break; 157 case OPTION_ARC8: 158 arc_mach_type = bfd_mach_arc_8; 159 break; 160 case OPTION_EB: 161 byte_order = BIG_ENDIAN; 162 arc_target_format = "elf32-bigarc"; 163 break; 164 case OPTION_EL: 165 byte_order = LITTLE_ENDIAN; 166 arc_target_format = "elf32-littlearc"; 167 break; 168 default: 169 return 0; 170 } 171 return 1; 172} 173 174void 175md_show_usage (FILE *stream) 176{ 177 fprintf (stream, "\ 178ARC Options:\n\ 179 -marc[5|6|7|8] select processor variant (default arc%d)\n\ 180 -EB assemble code for a big endian cpu\n\ 181 -EL assemble code for a little endian cpu\n", arc_mach_type + 5); 182} 183 184/* This function is called once, at assembler startup time. It should 185 set up all the tables, etc. that the MD part of the assembler will need. 186 Opcode selection is deferred until later because we might see a .option 187 command. */ 188 189void 190md_begin (void) 191{ 192 /* The endianness can be chosen "at the factory". */ 193 target_big_endian = byte_order == BIG_ENDIAN; 194 195 if (!bfd_set_arch_mach (stdoutput, bfd_arch_arc, arc_mach_type)) 196 as_warn ("could not set architecture and machine"); 197 198 /* This call is necessary because we need to initialize `arc_operand_map' 199 which may be needed before we see the first insn. */ 200 arc_opcode_init_tables (arc_get_opcode_mach (arc_mach_type, 201 target_big_endian)); 202} 203 204/* Initialize the various opcode and operand tables. 205 MACH is one of bfd_mach_arc_xxx. */ 206 207static void 208init_opcode_tables (int mach) 209{ 210 int i; 211 char *last; 212 213 if ((arc_suffix_hash = hash_new ()) == NULL) 214 as_fatal ("virtual memory exhausted"); 215 216 if (!bfd_set_arch_mach (stdoutput, bfd_arch_arc, mach)) 217 as_warn ("could not set architecture and machine"); 218 219 /* This initializes a few things in arc-opc.c that we need. 220 This must be called before the various arc_xxx_supported fns. */ 221 arc_opcode_init_tables (arc_get_opcode_mach (mach, target_big_endian)); 222 223 /* Only put the first entry of each equivalently named suffix in the 224 table. */ 225 last = ""; 226 for (i = 0; i < arc_suffixes_count; i++) 227 { 228 if (strcmp (arc_suffixes[i].name, last) != 0) 229 hash_insert (arc_suffix_hash, arc_suffixes[i].name, (void *) (arc_suffixes + i)); 230 last = arc_suffixes[i].name; 231 } 232 233 /* Since registers don't have a prefix, we put them in the symbol table so 234 they can't be used as symbols. This also simplifies argument parsing as 235 we can let gas parse registers for us. The recorded register number is 236 the address of the register's entry in arc_reg_names. 237 238 If the register name is already in the table, then the existing 239 definition is assumed to be from an .ExtCoreRegister pseudo-op. */ 240 241 for (i = 0; i < arc_reg_names_count; i++) 242 { 243 if (symbol_find (arc_reg_names[i].name)) 244 continue; 245 /* Use symbol_create here instead of symbol_new so we don't try to 246 output registers into the object file's symbol table. */ 247 symbol_table_insert (symbol_create (arc_reg_names[i].name, 248 reg_section, 249 (valueT) &arc_reg_names[i], 250 &zero_address_frag)); 251 } 252 253 /* Tell `.option' it's too late. */ 254 cpu_tables_init_p = 1; 255} 256 257/* Insert an operand value into an instruction. 258 If REG is non-NULL, it is a register number and ignore VAL. */ 259 260static arc_insn 261arc_insert_operand (arc_insn insn, 262 const struct arc_operand *operand, 263 int mods, 264 const struct arc_operand_value *reg, 265 offsetT val, 266 char *file, 267 unsigned int line) 268{ 269 if (operand->bits != 32) 270 { 271 long min, max; 272 offsetT test; 273 274 if ((operand->flags & ARC_OPERAND_SIGNED) != 0) 275 { 276 if ((operand->flags & ARC_OPERAND_SIGNOPT) != 0) 277 max = (1 << operand->bits) - 1; 278 else 279 max = (1 << (operand->bits - 1)) - 1; 280 min = - (1 << (operand->bits - 1)); 281 } 282 else 283 { 284 max = (1 << operand->bits) - 1; 285 min = 0; 286 } 287 288 if ((operand->flags & ARC_OPERAND_NEGATIVE) != 0) 289 test = - val; 290 else 291 test = val; 292 293 if (test < (offsetT) min || test > (offsetT) max) 294 as_warn_value_out_of_range (_("operand"), test, (offsetT) min, (offsetT) max, file, line); 295 } 296 297 if (operand->insert) 298 { 299 const char *errmsg; 300 301 errmsg = NULL; 302 insn = (*operand->insert) (insn, operand, mods, reg, (long) val, &errmsg); 303 if (errmsg != (const char *) NULL) 304 as_warn (errmsg); 305 } 306 else 307 insn |= (((long) val & ((1 << operand->bits) - 1)) 308 << operand->shift); 309 310 return insn; 311} 312 313/* We need to keep a list of fixups. We can't simply generate them as 314 we go, because that would require us to first create the frag, and 315 that would screw up references to ``.''. */ 316 317struct arc_fixup 318{ 319 /* index into `arc_operands' */ 320 int opindex; 321 expressionS exp; 322}; 323 324#define MAX_FIXUPS 5 325 326#define MAX_SUFFIXES 5 327 328/* Compute the reloc type of an expression. 329 The possibly modified expression is stored in EXPNEW. 330 331 This is used to convert the expressions generated by the %-op's into 332 the appropriate operand type. It is called for both data in instructions 333 (operands) and data outside instructions (variables, debugging info, etc.). 334 335 Currently supported %-ops: 336 337 %st(symbol): represented as "symbol >> 2" 338 "st" is short for STatus as in the status register (pc) 339 340 DEFAULT_TYPE is the type to use if no special processing is required. 341 342 DATA_P is non-zero for data or limm values, zero for insn operands. 343 Remember that the opcode "insertion fns" cannot be used on data, they're 344 only for inserting operands into insns. They also can't be used for limm 345 values as the insertion routines don't handle limm values. When called for 346 insns we return fudged reloc types (real_value - BFD_RELOC_UNUSED). When 347 called for data or limm values we use real reloc types. */ 348 349static int 350get_arc_exp_reloc_type (int data_p, 351 int default_type, 352 expressionS *exp, 353 expressionS *expnew) 354{ 355 /* If the expression is "symbol >> 2" we must change it to just "symbol", 356 as fix_new_exp can't handle it. Similarly for (symbol - symbol) >> 2. 357 That's ok though. What's really going on here is that we're using 358 ">> 2" as a special syntax for specifying BFD_RELOC_ARC_B26. */ 359 360 if (exp->X_op == O_right_shift 361 && exp->X_op_symbol != NULL 362 && exp->X_op_symbol->sy_value.X_op == O_constant 363 && exp->X_op_symbol->sy_value.X_add_number == 2 364 && exp->X_add_number == 0) 365 { 366 if (exp->X_add_symbol != NULL 367 && (exp->X_add_symbol->sy_value.X_op == O_constant 368 || exp->X_add_symbol->sy_value.X_op == O_symbol)) 369 { 370 *expnew = *exp; 371 expnew->X_op = O_symbol; 372 expnew->X_op_symbol = NULL; 373 return data_p ? BFD_RELOC_ARC_B26 : arc_operand_map['J']; 374 } 375 else if (exp->X_add_symbol != NULL 376 && exp->X_add_symbol->sy_value.X_op == O_subtract) 377 { 378 *expnew = exp->X_add_symbol->sy_value; 379 return data_p ? BFD_RELOC_ARC_B26 : arc_operand_map['J']; 380 } 381 } 382 383 *expnew = *exp; 384 return default_type; 385} 386 387static int 388arc_set_ext_seg (void) 389{ 390 if (!arcext_section) 391 { 392 arcext_section = subseg_new (".arcextmap", 0); 393 bfd_set_section_flags (stdoutput, arcext_section, 394 SEC_READONLY | SEC_HAS_CONTENTS); 395 } 396 else 397 subseg_set (arcext_section, 0); 398 return 1; 399} 400 401static void 402arc_extoper (int opertype) 403{ 404 char *name; 405 char *mode; 406 char c; 407 char *p; 408 int imode = 0; 409 int number; 410 struct arc_ext_operand_value *ext_oper; 411 symbolS *symbolP; 412 413 segT old_sec; 414 int old_subsec; 415 416 name = input_line_pointer; 417 c = get_symbol_end (); 418 name = xstrdup (name); 419 420 p = name; 421 while (*p) 422 { 423 *p = TOLOWER (*p); 424 p++; 425 } 426 427 /* just after name is now '\0' */ 428 p = input_line_pointer; 429 *p = c; 430 SKIP_WHITESPACE (); 431 432 if (*input_line_pointer != ',') 433 { 434 as_bad ("expected comma after operand name"); 435 ignore_rest_of_line (); 436 free (name); 437 return; 438 } 439 440 input_line_pointer++; /* skip ',' */ 441 number = get_absolute_expression (); 442 443 if (number < 0) 444 { 445 as_bad ("negative operand number %d", number); 446 ignore_rest_of_line (); 447 free (name); 448 return; 449 } 450 451 if (opertype) 452 { 453 SKIP_WHITESPACE (); 454 455 if (*input_line_pointer != ',') 456 { 457 as_bad ("expected comma after register-number"); 458 ignore_rest_of_line (); 459 free (name); 460 return; 461 } 462 463 input_line_pointer++; /* skip ',' */ 464 mode = input_line_pointer; 465 466 if (!strncmp (mode, "r|w", 3)) 467 { 468 imode = 0; 469 input_line_pointer += 3; 470 } 471 else 472 { 473 if (!strncmp (mode, "r", 1)) 474 { 475 imode = ARC_REGISTER_READONLY; 476 input_line_pointer += 1; 477 } 478 else 479 { 480 if (strncmp (mode, "w", 1)) 481 { 482 as_bad ("invalid mode"); 483 ignore_rest_of_line (); 484 free (name); 485 return; 486 } 487 else 488 { 489 imode = ARC_REGISTER_WRITEONLY; 490 input_line_pointer += 1; 491 } 492 } 493 } 494 SKIP_WHITESPACE (); 495 if (1 == opertype) 496 { 497 if (*input_line_pointer != ',') 498 { 499 as_bad ("expected comma after register-mode"); 500 ignore_rest_of_line (); 501 free (name); 502 return; 503 } 504 505 input_line_pointer++; /* skip ',' */ 506 507 if (!strncmp (input_line_pointer, "cannot_shortcut", 15)) 508 { 509 imode |= arc_get_noshortcut_flag (); 510 input_line_pointer += 15; 511 } 512 else 513 { 514 if (strncmp (input_line_pointer, "can_shortcut", 12)) 515 { 516 as_bad ("shortcut designator invalid"); 517 ignore_rest_of_line (); 518 free (name); 519 return; 520 } 521 else 522 { 523 input_line_pointer += 12; 524 } 525 } 526 } 527 } 528 529 if ((opertype == 1) && number > 60) 530 { 531 as_bad ("core register value (%d) too large", number); 532 ignore_rest_of_line (); 533 free (name); 534 return; 535 } 536 537 if ((opertype == 0) && number > 31) 538 { 539 as_bad ("condition code value (%d) too large", number); 540 ignore_rest_of_line (); 541 free (name); 542 return; 543 } 544 545 ext_oper = xmalloc (sizeof (struct arc_ext_operand_value)); 546 547 if (opertype) 548 { 549 /* If the symbol already exists, point it at the new definition. */ 550 if ((symbolP = symbol_find (name))) 551 { 552 if (S_GET_SEGMENT (symbolP) == reg_section) 553 S_SET_VALUE (symbolP, (valueT) &ext_oper->operand); 554 else 555 { 556 as_bad ("attempt to override symbol: %s", name); 557 ignore_rest_of_line (); 558 free (name); 559 free (ext_oper); 560 return; 561 } 562 } 563 else 564 { 565 /* If its not there, add it. */ 566 symbol_table_insert (symbol_create (name, reg_section, 567 (valueT) &ext_oper->operand, 568 &zero_address_frag)); 569 } 570 } 571 572 ext_oper->operand.name = name; 573 ext_oper->operand.value = number; 574 ext_oper->operand.type = arc_operand_type (opertype); 575 ext_oper->operand.flags = imode; 576 577 ext_oper->next = arc_ext_operands; 578 arc_ext_operands = ext_oper; 579 580 /* OK, now that we know what this operand is, put a description in 581 the arc extension section of the output file. */ 582 583 old_sec = now_seg; 584 old_subsec = now_subseg; 585 586 arc_set_ext_seg (); 587 588 switch (opertype) 589 { 590 case 0: 591 p = frag_more (1); 592 *p = 3 + strlen (name) + 1; 593 p = frag_more (1); 594 *p = EXT_COND_CODE; 595 p = frag_more (1); 596 *p = number; 597 p = frag_more (strlen (name) + 1); 598 strcpy (p, name); 599 break; 600 case 1: 601 p = frag_more (1); 602 *p = 3 + strlen (name) + 1; 603 p = frag_more (1); 604 *p = EXT_CORE_REGISTER; 605 p = frag_more (1); 606 *p = number; 607 p = frag_more (strlen (name) + 1); 608 strcpy (p, name); 609 break; 610 case 2: 611 p = frag_more (1); 612 *p = 6 + strlen (name) + 1; 613 p = frag_more (1); 614 *p = EXT_AUX_REGISTER; 615 p = frag_more (1); 616 *p = number >> 24 & 0xff; 617 p = frag_more (1); 618 *p = number >> 16 & 0xff; 619 p = frag_more (1); 620 *p = number >> 8 & 0xff; 621 p = frag_more (1); 622 *p = number & 0xff; 623 p = frag_more (strlen (name) + 1); 624 strcpy (p, name); 625 break; 626 default: 627 as_bad ("invalid opertype"); 628 ignore_rest_of_line (); 629 free (name); 630 return; 631 break; 632 } 633 634 subseg_set (old_sec, old_subsec); 635 636 /* Enter all registers into the symbol table. */ 637 638 demand_empty_rest_of_line (); 639} 640 641static void 642arc_extinst (int ignore ATTRIBUTE_UNUSED) 643{ 644 char syntax[129]; 645 char *name; 646 char *p; 647 char c; 648 int suffixcode = -1; 649 int opcode, subopcode; 650 int i; 651 int class = 0; 652 int name_len; 653 struct arc_opcode *ext_op; 654 655 segT old_sec; 656 int old_subsec; 657 658 name = input_line_pointer; 659 c = get_symbol_end (); 660 name = xstrdup (name); 661 strcpy (syntax, name); 662 name_len = strlen (name); 663 664 /* just after name is now '\0' */ 665 p = input_line_pointer; 666 *p = c; 667 668 SKIP_WHITESPACE (); 669 670 if (*input_line_pointer != ',') 671 { 672 as_bad ("expected comma after operand name"); 673 ignore_rest_of_line (); 674 return; 675 } 676 677 input_line_pointer++; /* skip ',' */ 678 opcode = get_absolute_expression (); 679 680 SKIP_WHITESPACE (); 681 682 if (*input_line_pointer != ',') 683 { 684 as_bad ("expected comma after opcode"); 685 ignore_rest_of_line (); 686 return; 687 } 688 689 input_line_pointer++; /* skip ',' */ 690 subopcode = get_absolute_expression (); 691 692 if (subopcode < 0) 693 { 694 as_bad ("negative subopcode %d", subopcode); 695 ignore_rest_of_line (); 696 return; 697 } 698 699 if (subopcode) 700 { 701 if (3 != opcode) 702 { 703 as_bad ("subcode value found when opcode not equal 0x03"); 704 ignore_rest_of_line (); 705 return; 706 } 707 else 708 { 709 if (subopcode < 0x09 || subopcode == 0x3f) 710 { 711 as_bad ("invalid subopcode %d", subopcode); 712 ignore_rest_of_line (); 713 return; 714 } 715 } 716 } 717 718 SKIP_WHITESPACE (); 719 720 if (*input_line_pointer != ',') 721 { 722 as_bad ("expected comma after subopcode"); 723 ignore_rest_of_line (); 724 return; 725 } 726 727 input_line_pointer++; /* skip ',' */ 728 729 for (i = 0; i < (int) MAXSUFFIXCLASS; i++) 730 { 731 if (!strncmp (suffixclass[i].name,input_line_pointer, suffixclass[i].len)) 732 { 733 suffixcode = i; 734 input_line_pointer += suffixclass[i].len; 735 break; 736 } 737 } 738 739 if (-1 == suffixcode) 740 { 741 as_bad ("invalid suffix class"); 742 ignore_rest_of_line (); 743 return; 744 } 745 746 SKIP_WHITESPACE (); 747 748 if (*input_line_pointer != ',') 749 { 750 as_bad ("expected comma after suffix class"); 751 ignore_rest_of_line (); 752 return; 753 } 754 755 input_line_pointer++; /* skip ',' */ 756 757 for (i = 0; i < (int) MAXSYNTAXCLASS; i++) 758 { 759 if (!strncmp (syntaxclass[i].name,input_line_pointer, syntaxclass[i].len)) 760 { 761 class = syntaxclass[i].class; 762 input_line_pointer += syntaxclass[i].len; 763 break; 764 } 765 } 766 767 if (0 == (SYNTAX_VALID & class)) 768 { 769 as_bad ("invalid syntax class"); 770 ignore_rest_of_line (); 771 return; 772 } 773 774 if ((0x3 == opcode) & (class & SYNTAX_3OP)) 775 { 776 as_bad ("opcode 0x3 and SYNTAX_3OP invalid"); 777 ignore_rest_of_line (); 778 return; 779 } 780 781 switch (suffixcode) 782 { 783 case 0: 784 strcat (syntax, "%.q%.f "); 785 break; 786 case 1: 787 strcat (syntax, "%.f "); 788 break; 789 case 2: 790 strcat (syntax, "%.q "); 791 break; 792 case 3: 793 strcat (syntax, " "); 794 break; 795 default: 796 as_bad ("unknown suffix class"); 797 ignore_rest_of_line (); 798 return; 799 break; 800 }; 801 802 strcat (syntax, ((opcode == 0x3) ? "%a,%b" : ((class & SYNTAX_3OP) ? "%a,%b,%c" : "%b,%c"))); 803 if (suffixcode < 2) 804 strcat (syntax, "%F"); 805 strcat (syntax, "%S%L"); 806 807 ext_op = xmalloc (sizeof (struct arc_opcode)); 808 ext_op->syntax = xstrdup (syntax); 809 810 ext_op->mask = I (-1) | ((0x3 == opcode) ? C (-1) : 0); 811 ext_op->value = I (opcode) | ((0x3 == opcode) ? C (subopcode) : 0); 812 ext_op->flags = class; 813 ext_op->next_asm = arc_ext_opcodes; 814 ext_op->next_dis = arc_ext_opcodes; 815 arc_ext_opcodes = ext_op; 816 817 /* OK, now that we know what this inst is, put a description in the 818 arc extension section of the output file. */ 819 820 old_sec = now_seg; 821 old_subsec = now_subseg; 822 823 arc_set_ext_seg (); 824 825 p = frag_more (1); 826 *p = 5 + name_len + 1; 827 p = frag_more (1); 828 *p = EXT_INSTRUCTION; 829 p = frag_more (1); 830 *p = opcode; 831 p = frag_more (1); 832 *p = subopcode; 833 p = frag_more (1); 834 *p = (class & (OP1_MUST_BE_IMM | OP1_IMM_IMPLIED) ? IGNORE_FIRST_OPD : 0); 835 p = frag_more (name_len); 836 strncpy (p, syntax, name_len); 837 p = frag_more (1); 838 *p = '\0'; 839 840 subseg_set (old_sec, old_subsec); 841 842 demand_empty_rest_of_line (); 843} 844 845static void 846arc_common (int localScope) 847{ 848 char *name; 849 char c; 850 char *p; 851 int align, size; 852 symbolS *symbolP; 853 854 name = input_line_pointer; 855 c = get_symbol_end (); 856 /* just after name is now '\0' */ 857 p = input_line_pointer; 858 *p = c; 859 SKIP_WHITESPACE (); 860 861 if (*input_line_pointer != ',') 862 { 863 as_bad ("expected comma after symbol name"); 864 ignore_rest_of_line (); 865 return; 866 } 867 868 input_line_pointer++; /* skip ',' */ 869 size = get_absolute_expression (); 870 871 if (size < 0) 872 { 873 as_bad ("negative symbol length"); 874 ignore_rest_of_line (); 875 return; 876 } 877 878 *p = 0; 879 symbolP = symbol_find_or_make (name); 880 *p = c; 881 882 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) 883 { 884 as_bad ("ignoring attempt to re-define symbol"); 885 ignore_rest_of_line (); 886 return; 887 } 888 if (((int) S_GET_VALUE (symbolP) != 0) \ 889 && ((int) S_GET_VALUE (symbolP) != size)) 890 { 891 as_warn ("length of symbol \"%s\" already %ld, ignoring %d", 892 S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size); 893 } 894 assert (symbolP->sy_frag == &zero_address_frag); 895 896 /* Now parse the alignment field. This field is optional for 897 local and global symbols. Default alignment is zero. */ 898 if (*input_line_pointer == ',') 899 { 900 input_line_pointer++; 901 align = get_absolute_expression (); 902 if (align < 0) 903 { 904 align = 0; 905 as_warn ("assuming symbol alignment of zero"); 906 } 907 } 908 else 909 align = 0; 910 911 if (localScope != 0) 912 { 913 segT old_sec; 914 int old_subsec; 915 char *pfrag; 916 917 old_sec = now_seg; 918 old_subsec = now_subseg; 919 record_alignment (bss_section, align); 920 subseg_set (bss_section, 0); /* ??? subseg_set (bss_section, 1); ??? */ 921 922 if (align) 923 /* Do alignment. */ 924 frag_align (align, 0, 0); 925 926 /* Detach from old frag. */ 927 if (S_GET_SEGMENT (symbolP) == bss_section) 928 symbolP->sy_frag->fr_symbol = NULL; 929 930 symbolP->sy_frag = frag_now; 931 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, 932 (offsetT) size, (char *) 0); 933 *pfrag = 0; 934 935 S_SET_SIZE (symbolP, size); 936 S_SET_SEGMENT (symbolP, bss_section); 937 S_CLEAR_EXTERNAL (symbolP); 938 symbolP->local = 1; 939 subseg_set (old_sec, old_subsec); 940 } 941 else 942 { 943 S_SET_VALUE (symbolP, (valueT) size); 944 S_SET_ALIGN (symbolP, align); 945 S_SET_EXTERNAL (symbolP); 946 S_SET_SEGMENT (symbolP, bfd_com_section_ptr); 947 } 948 949 symbolP->bsym->flags |= BSF_OBJECT; 950 951 demand_empty_rest_of_line (); 952} 953 954/* Select the cpu we're assembling for. */ 955 956static void 957arc_option (int ignore ATTRIBUTE_UNUSED) 958{ 959 extern int arc_get_mach (char *); 960 int mach; 961 char c; 962 char *cpu; 963 964 cpu = input_line_pointer; 965 c = get_symbol_end (); 966 mach = arc_get_mach (cpu); 967 *input_line_pointer = c; 968 969 /* If an instruction has already been seen, it's too late. */ 970 if (cpu_tables_init_p) 971 { 972 as_bad ("\".option\" directive must appear before any instructions"); 973 ignore_rest_of_line (); 974 return; 975 } 976 977 if (mach == -1) 978 goto bad_cpu; 979 980 if (mach_type_specified_p && mach != arc_mach_type) 981 { 982 as_bad ("\".option\" directive conflicts with initial definition"); 983 ignore_rest_of_line (); 984 return; 985 } 986 else 987 { 988 /* The cpu may have been selected on the command line. */ 989 if (mach != arc_mach_type) 990 as_warn ("\".option\" directive overrides command-line (default) value"); 991 arc_mach_type = mach; 992 if (!bfd_set_arch_mach (stdoutput, bfd_arch_arc, mach)) 993 as_fatal ("could not set architecture and machine"); 994 mach_type_specified_p = 1; 995 } 996 demand_empty_rest_of_line (); 997 return; 998 999 bad_cpu: 1000 as_bad ("invalid identifier for \".option\""); 1001 ignore_rest_of_line (); 1002} 1003 1004/* Turn a string in input_line_pointer into a floating point constant 1005 of type TYPE, and store the appropriate bytes in *LITP. The number 1006 of LITTLENUMS emitted is stored in *SIZEP. An error message is 1007 returned, or NULL on OK. */ 1008 1009/* Equal to MAX_PRECISION in atof-ieee.c */ 1010#define MAX_LITTLENUMS 6 1011 1012char * 1013md_atof (int type, char *litP, int *sizeP) 1014{ 1015 int prec; 1016 LITTLENUM_TYPE words[MAX_LITTLENUMS]; 1017 LITTLENUM_TYPE *wordP; 1018 char *t; 1019 1020 switch (type) 1021 { 1022 case 'f': 1023 case 'F': 1024 prec = 2; 1025 break; 1026 1027 case 'd': 1028 case 'D': 1029 prec = 4; 1030 break; 1031 1032 default: 1033 *sizeP = 0; 1034 return "bad call to md_atof"; 1035 } 1036 1037 t = atof_ieee (input_line_pointer, type, words); 1038 if (t) 1039 input_line_pointer = t; 1040 *sizeP = prec * sizeof (LITTLENUM_TYPE); 1041 for (wordP = words; prec--;) 1042 { 1043 md_number_to_chars (litP, (valueT) (*wordP++), sizeof (LITTLENUM_TYPE)); 1044 litP += sizeof (LITTLENUM_TYPE); 1045 } 1046 1047 return NULL; 1048} 1049 1050/* Write a value out to the object file, using the appropriate 1051 endianness. */ 1052 1053void 1054md_number_to_chars (char *buf, valueT val, int n) 1055{ 1056 if (target_big_endian) 1057 number_to_chars_bigendian (buf, val, n); 1058 else 1059 number_to_chars_littleendian (buf, val, n); 1060} 1061 1062/* Round up a section size to the appropriate boundary. */ 1063 1064valueT 1065md_section_align (segT segment, valueT size) 1066{ 1067 int align = bfd_get_section_alignment (stdoutput, segment); 1068 1069 return ((size + (1 << align) - 1) & (-1 << align)); 1070} 1071 1072/* We don't have any form of relaxing. */ 1073 1074int 1075md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED, 1076 asection *seg ATTRIBUTE_UNUSED) 1077{ 1078 as_fatal (_("md_estimate_size_before_relax\n")); 1079 return 1; 1080} 1081 1082/* Convert a machine dependent frag. We never generate these. */ 1083 1084void 1085md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, 1086 asection *sec ATTRIBUTE_UNUSED, 1087 fragS *fragp ATTRIBUTE_UNUSED) 1088{ 1089 as_fatal (_("md_convert_frag\n")); 1090} 1091 1092static void 1093arc_code_symbol (expressionS *expressionP) 1094{ 1095 if (expressionP->X_op == O_symbol && expressionP->X_add_number == 0) 1096 { 1097 expressionS two; 1098 1099 expressionP->X_op = O_right_shift; 1100 expressionP->X_add_symbol->sy_value.X_op = O_constant; 1101 two.X_op = O_constant; 1102 two.X_add_symbol = two.X_op_symbol = NULL; 1103 two.X_add_number = 2; 1104 expressionP->X_op_symbol = make_expr_symbol (&two); 1105 } 1106 /* Allow %st(sym1-sym2) */ 1107 else if (expressionP->X_op == O_subtract 1108 && expressionP->X_add_symbol != NULL 1109 && expressionP->X_op_symbol != NULL 1110 && expressionP->X_add_number == 0) 1111 { 1112 expressionS two; 1113 1114 expressionP->X_add_symbol = make_expr_symbol (expressionP); 1115 expressionP->X_op = O_right_shift; 1116 two.X_op = O_constant; 1117 two.X_add_symbol = two.X_op_symbol = NULL; 1118 two.X_add_number = 2; 1119 expressionP->X_op_symbol = make_expr_symbol (&two); 1120 } 1121 else 1122 as_bad ("expression too complex code symbol"); 1123} 1124 1125/* Parse an operand that is machine-specific. 1126 1127 The ARC has a special %-op to adjust addresses so they're usable in 1128 branches. The "st" is short for the STatus register. 1129 ??? Later expand this to take a flags value too. 1130 1131 ??? We can't create new expression types so we map the %-op's onto the 1132 existing syntax. This means that the user could use the chosen syntax 1133 to achieve the same effect. */ 1134 1135void 1136md_operand (expressionS *expressionP) 1137{ 1138 char *p = input_line_pointer; 1139 1140 if (*p != '%') 1141 return; 1142 1143 if (strncmp (p, "%st(", 4) == 0) 1144 { 1145 input_line_pointer += 4; 1146 expression (expressionP); 1147 if (*input_line_pointer != ')') 1148 { 1149 as_bad ("missing ')' in %%-op"); 1150 return; 1151 } 1152 ++input_line_pointer; 1153 arc_code_symbol (expressionP); 1154 } 1155 else 1156 { 1157 /* It could be a register. */ 1158 int i, l; 1159 struct arc_ext_operand_value *ext_oper = arc_ext_operands; 1160 p++; 1161 1162 while (ext_oper) 1163 { 1164 l = strlen (ext_oper->operand.name); 1165 if (!strncmp (p, ext_oper->operand.name, l) && !ISALNUM (*(p + l))) 1166 { 1167 input_line_pointer += l + 1; 1168 expressionP->X_op = O_register; 1169 expressionP->X_add_number = (offsetT) &ext_oper->operand; 1170 return; 1171 } 1172 ext_oper = ext_oper->next; 1173 } 1174 for (i = 0; i < arc_reg_names_count; i++) 1175 { 1176 l = strlen (arc_reg_names[i].name); 1177 if (!strncmp (p, arc_reg_names[i].name, l) && !ISALNUM (*(p + l))) 1178 { 1179 input_line_pointer += l + 1; 1180 expressionP->X_op = O_register; 1181 expressionP->X_add_number = (offsetT) &arc_reg_names[i]; 1182 break; 1183 } 1184 } 1185 } 1186} 1187 1188/* We have no need to default values of symbols. 1189 We could catch register names here, but that is handled by inserting 1190 them all in the symbol table to begin with. */ 1191 1192symbolS * 1193md_undefined_symbol (char *name ATTRIBUTE_UNUSED) 1194{ 1195 return 0; 1196} 1197 1198/* Functions concerning expressions. */ 1199 1200/* Parse a .byte, .word, etc. expression. 1201 1202 Values for the status register are specified with %st(label). 1203 `label' will be right shifted by 2. */ 1204 1205void 1206arc_parse_cons_expression (expressionS *exp, 1207 unsigned int nbytes ATTRIBUTE_UNUSED) 1208{ 1209 char *p = input_line_pointer; 1210 int code_symbol_fix = 0; 1211 1212 for (; ! is_end_of_line[(unsigned char) *p]; p++) 1213 if (*p == '@' && !strncmp (p, "@h30", 4)) 1214 { 1215 code_symbol_fix = 1; 1216 strcpy (p, "; "); 1217 } 1218 expression_and_evaluate (exp); 1219 if (code_symbol_fix) 1220 { 1221 arc_code_symbol (exp); 1222 input_line_pointer = p; 1223 } 1224} 1225 1226/* Record a fixup for a cons expression. */ 1227 1228void 1229arc_cons_fix_new (fragS *frag, 1230 int where, 1231 int nbytes, 1232 expressionS *exp) 1233{ 1234 if (nbytes == 4) 1235 { 1236 int reloc_type; 1237 expressionS exptmp; 1238 1239 /* This may be a special ARC reloc (eg: %st()). */ 1240 reloc_type = get_arc_exp_reloc_type (1, BFD_RELOC_32, exp, &exptmp); 1241 fix_new_exp (frag, where, nbytes, &exptmp, 0, reloc_type); 1242 } 1243 else 1244 { 1245 fix_new_exp (frag, where, nbytes, exp, 0, 1246 nbytes == 2 ? BFD_RELOC_16 1247 : nbytes == 8 ? BFD_RELOC_64 1248 : BFD_RELOC_32); 1249 } 1250} 1251 1252/* Functions concerning relocs. */ 1253 1254/* The location from which a PC relative jump should be calculated, 1255 given a PC relative reloc. */ 1256 1257long 1258md_pcrel_from (fixS *fixP) 1259{ 1260 /* Return the address of the delay slot. */ 1261 return fixP->fx_frag->fr_address + fixP->fx_where + fixP->fx_size; 1262} 1263 1264/* Apply a fixup to the object code. This is called for all the 1265 fixups we generated by the call to fix_new_exp, above. In the call 1266 above we used a reloc code which was the largest legal reloc code 1267 plus the operand index. Here we undo that to recover the operand 1268 index. At this point all symbol values should be fully resolved, 1269 and we attempt to completely resolve the reloc. If we can not do 1270 that, we determine the correct reloc code and put it back in the fixup. */ 1271 1272void 1273md_apply_fix (fixS *fixP, valueT * valP, segT seg) 1274{ 1275 valueT value = * valP; 1276 1277 if (fixP->fx_addsy == (symbolS *) NULL) 1278 fixP->fx_done = 1; 1279 1280 else if (fixP->fx_pcrel) 1281 { 1282 /* Hack around bfd_install_relocation brain damage. */ 1283 if (S_GET_SEGMENT (fixP->fx_addsy) != seg) 1284 value += md_pcrel_from (fixP); 1285 } 1286 1287 /* We can't actually support subtracting a symbol. */ 1288 if (fixP->fx_subsy != NULL) 1289 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex")); 1290 1291 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED) 1292 { 1293 int opindex; 1294 const struct arc_operand *operand; 1295 char *where; 1296 arc_insn insn; 1297 1298 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED; 1299 1300 operand = &arc_operands[opindex]; 1301 1302 /* Fetch the instruction, insert the fully resolved operand 1303 value, and stuff the instruction back again. */ 1304 where = fixP->fx_frag->fr_literal + fixP->fx_where; 1305 if (target_big_endian) 1306 insn = bfd_getb32 ((unsigned char *) where); 1307 else 1308 insn = bfd_getl32 ((unsigned char *) where); 1309 insn = arc_insert_operand (insn, operand, -1, NULL, (offsetT) value, 1310 fixP->fx_file, fixP->fx_line); 1311 if (target_big_endian) 1312 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where); 1313 else 1314 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where); 1315 1316 if (fixP->fx_done) 1317 /* Nothing else to do here. */ 1318 return; 1319 1320 /* Determine a BFD reloc value based on the operand information. 1321 We are only prepared to turn a few of the operands into relocs. 1322 !!! Note that we can't handle limm values here. Since we're using 1323 implicit addends the addend must be inserted into the instruction, 1324 however, the opcode insertion routines currently do nothing with 1325 limm values. */ 1326 if (operand->fmt == 'B') 1327 { 1328 assert ((operand->flags & ARC_OPERAND_RELATIVE_BRANCH) != 0 1329 && operand->bits == 20 1330 && operand->shift == 7); 1331 fixP->fx_r_type = BFD_RELOC_ARC_B22_PCREL; 1332 } 1333 else if (operand->fmt == 'J') 1334 { 1335 assert ((operand->flags & ARC_OPERAND_ABSOLUTE_BRANCH) != 0 1336 && operand->bits == 24 1337 && operand->shift == 32); 1338 fixP->fx_r_type = BFD_RELOC_ARC_B26; 1339 } 1340 else if (operand->fmt == 'L') 1341 { 1342 assert ((operand->flags & ARC_OPERAND_LIMM) != 0 1343 && operand->bits == 32 1344 && operand->shift == 32); 1345 fixP->fx_r_type = BFD_RELOC_32; 1346 } 1347 else 1348 { 1349 as_bad_where (fixP->fx_file, fixP->fx_line, 1350 "unresolved expression that must be resolved"); 1351 fixP->fx_done = 1; 1352 return; 1353 } 1354 } 1355 else 1356 { 1357 switch (fixP->fx_r_type) 1358 { 1359 case BFD_RELOC_8: 1360 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, 1361 value, 1); 1362 break; 1363 case BFD_RELOC_16: 1364 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, 1365 value, 2); 1366 break; 1367 case BFD_RELOC_32: 1368 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, 1369 value, 4); 1370 break; 1371 case BFD_RELOC_ARC_B26: 1372 /* If !fixP->fx_done then `value' is an implicit addend. 1373 We must shift it right by 2 in this case as well because the 1374 linker performs the relocation and then adds this in (as opposed 1375 to adding this in and then shifting right by 2). */ 1376 value >>= 2; 1377 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, 1378 value, 4); 1379 break; 1380 default: 1381 abort (); 1382 } 1383 } 1384} 1385 1386/* Translate internal representation of relocation info to BFD target 1387 format. */ 1388 1389arelent * 1390tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, 1391 fixS *fixP) 1392{ 1393 arelent *reloc; 1394 1395 reloc = xmalloc (sizeof (arelent)); 1396 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *)); 1397 1398 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixP->fx_addsy); 1399 reloc->address = fixP->fx_frag->fr_address + fixP->fx_where; 1400 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type); 1401 if (reloc->howto == (reloc_howto_type *) NULL) 1402 { 1403 as_bad_where (fixP->fx_file, fixP->fx_line, 1404 "internal error: can't export reloc type %d (`%s')", 1405 fixP->fx_r_type, 1406 bfd_get_reloc_code_name (fixP->fx_r_type)); 1407 return NULL; 1408 } 1409 1410 assert (!fixP->fx_pcrel == !reloc->howto->pc_relative); 1411 1412 /* Set addend to account for PC being advanced one insn before the 1413 target address is computed. */ 1414 1415 reloc->addend = (fixP->fx_pcrel ? -4 : 0); 1416 1417 return reloc; 1418} 1419 1420const pseudo_typeS md_pseudo_table[] = 1421{ 1422 { "align", s_align_bytes, 0 }, /* Defaulting is invalid (0). */ 1423 { "comm", arc_common, 0 }, 1424 { "common", arc_common, 0 }, 1425 { "lcomm", arc_common, 1 }, 1426 { "lcommon", arc_common, 1 }, 1427 { "2byte", cons, 2 }, 1428 { "half", cons, 2 }, 1429 { "short", cons, 2 }, 1430 { "3byte", cons, 3 }, 1431 { "4byte", cons, 4 }, 1432 { "word", cons, 4 }, 1433 { "option", arc_option, 0 }, 1434 { "cpu", arc_option, 0 }, 1435 { "block", s_space, 0 }, 1436 { "extcondcode", arc_extoper, 0 }, 1437 { "extcoreregister", arc_extoper, 1 }, 1438 { "extauxregister", arc_extoper, 2 }, 1439 { "extinstruction", arc_extinst, 0 }, 1440 { NULL, 0, 0 }, 1441}; 1442 1443/* This routine is called for each instruction to be assembled. */ 1444 1445void 1446md_assemble (char *str) 1447{ 1448 const struct arc_opcode *opcode; 1449 const struct arc_opcode *std_opcode; 1450 struct arc_opcode *ext_opcode; 1451 char *start; 1452 const char *last_errmsg = 0; 1453 arc_insn insn; 1454 static int init_tables_p = 0; 1455 1456 /* Opcode table initialization is deferred until here because we have to 1457 wait for a possible .option command. */ 1458 if (!init_tables_p) 1459 { 1460 init_opcode_tables (arc_mach_type); 1461 init_tables_p = 1; 1462 } 1463 1464 /* Skip leading white space. */ 1465 while (ISSPACE (*str)) 1466 str++; 1467 1468 /* The instructions are stored in lists hashed by the first letter (though 1469 we needn't care how they're hashed). Get the first in the list. */ 1470 1471 ext_opcode = arc_ext_opcodes; 1472 std_opcode = arc_opcode_lookup_asm (str); 1473 1474 /* Keep looking until we find a match. */ 1475 start = str; 1476 for (opcode = (ext_opcode ? ext_opcode : std_opcode); 1477 opcode != NULL; 1478 opcode = (ARC_OPCODE_NEXT_ASM (opcode) 1479 ? ARC_OPCODE_NEXT_ASM (opcode) 1480 : (ext_opcode ? ext_opcode = NULL, std_opcode : NULL))) 1481 { 1482 int past_opcode_p, fc, num_suffixes; 1483 int fix_up_at = 0; 1484 char *syn; 1485 struct arc_fixup fixups[MAX_FIXUPS]; 1486 /* Used as a sanity check. If we need a limm reloc, make sure we ask 1487 for an extra 4 bytes from frag_more. */ 1488 int limm_reloc_p; 1489 int ext_suffix_p; 1490 const struct arc_operand_value *insn_suffixes[MAX_SUFFIXES]; 1491 1492 /* Is this opcode supported by the selected cpu? */ 1493 if (! arc_opcode_supported (opcode)) 1494 continue; 1495 1496 /* Scan the syntax string. If it doesn't match, try the next one. */ 1497 arc_opcode_init_insert (); 1498 insn = opcode->value; 1499 fc = 0; 1500 past_opcode_p = 0; 1501 num_suffixes = 0; 1502 limm_reloc_p = 0; 1503 ext_suffix_p = 0; 1504 1505 /* We don't check for (*str != '\0') here because we want to parse 1506 any trailing fake arguments in the syntax string. */ 1507 for (str = start, syn = opcode->syntax; *syn != '\0';) 1508 { 1509 int mods; 1510 const struct arc_operand *operand; 1511 1512 /* Non operand chars must match exactly. */ 1513 if (*syn != '%' || *++syn == '%') 1514 { 1515 if (*str == *syn) 1516 { 1517 if (*syn == ' ') 1518 past_opcode_p = 1; 1519 ++syn; 1520 ++str; 1521 } 1522 else 1523 break; 1524 continue; 1525 } 1526 1527 /* We have an operand. Pick out any modifiers. */ 1528 mods = 0; 1529 while (ARC_MOD_P (arc_operands[arc_operand_map[(int) *syn]].flags)) 1530 { 1531 mods |= arc_operands[arc_operand_map[(int) *syn]].flags & ARC_MOD_BITS; 1532 ++syn; 1533 } 1534 operand = arc_operands + arc_operand_map[(int) *syn]; 1535 if (operand->fmt == 0) 1536 as_fatal ("unknown syntax format character `%c'", *syn); 1537 1538 if (operand->flags & ARC_OPERAND_FAKE) 1539 { 1540 const char *errmsg = NULL; 1541 if (operand->insert) 1542 { 1543 insn = (*operand->insert) (insn, operand, mods, NULL, 0, &errmsg); 1544 if (errmsg != (const char *) NULL) 1545 { 1546 last_errmsg = errmsg; 1547 if (operand->flags & ARC_OPERAND_ERROR) 1548 { 1549 as_bad (errmsg); 1550 return; 1551 } 1552 else if (operand->flags & ARC_OPERAND_WARN) 1553 as_warn (errmsg); 1554 break; 1555 } 1556 if (limm_reloc_p 1557 && (operand->flags && operand->flags & ARC_OPERAND_LIMM) 1558 && (operand->flags & 1559 (ARC_OPERAND_ABSOLUTE_BRANCH | ARC_OPERAND_ADDRESS))) 1560 { 1561 fixups[fix_up_at].opindex = arc_operand_map[operand->fmt]; 1562 } 1563 } 1564 ++syn; 1565 } 1566 /* Are we finished with suffixes? */ 1567 else if (!past_opcode_p) 1568 { 1569 int found; 1570 char c; 1571 char *s, *t; 1572 const struct arc_operand_value *suf, *suffix_end; 1573 const struct arc_operand_value *suffix = NULL; 1574 1575 if (!(operand->flags & ARC_OPERAND_SUFFIX)) 1576 abort (); 1577 1578 /* If we're at a space in the input string, we want to skip the 1579 remaining suffixes. There may be some fake ones though, so 1580 just go on to try the next one. */ 1581 if (*str == ' ') 1582 { 1583 ++syn; 1584 continue; 1585 } 1586 1587 s = str; 1588 if (mods & ARC_MOD_DOT) 1589 { 1590 if (*s != '.') 1591 break; 1592 ++s; 1593 } 1594 else 1595 { 1596 /* This can happen in "b.nd foo" and we're currently looking 1597 for "%q" (ie: a condition code suffix). */ 1598 if (*s == '.') 1599 { 1600 ++syn; 1601 continue; 1602 } 1603 } 1604 1605 /* Pick the suffix out and look it up via the hash table. */ 1606 for (t = s; *t && ISALNUM (*t); ++t) 1607 continue; 1608 c = *t; 1609 *t = '\0'; 1610 if ((suf = get_ext_suffix (s))) 1611 ext_suffix_p = 1; 1612 else 1613 suf = hash_find (arc_suffix_hash, s); 1614 if (!suf) 1615 { 1616 /* This can happen in "blle foo" and we're currently using 1617 the template "b%q%.n %j". The "bl" insn occurs later in 1618 the table so "lle" isn't an illegal suffix. */ 1619 *t = c; 1620 break; 1621 } 1622 1623 /* Is it the right type? Note that the same character is used 1624 several times, so we have to examine all of them. This is 1625 relatively efficient as equivalent entries are kept 1626 together. If it's not the right type, don't increment `str' 1627 so we try the next one in the series. */ 1628 found = 0; 1629 if (ext_suffix_p && arc_operands[suf->type].fmt == *syn) 1630 { 1631 /* Insert the suffix's value into the insn. */ 1632 *t = c; 1633 if (operand->insert) 1634 insn = (*operand->insert) (insn, operand, 1635 mods, NULL, suf->value, 1636 NULL); 1637 else 1638 insn |= suf->value << operand->shift; 1639 suffix = suf; 1640 str = t; 1641 found = 1; 1642 } 1643 else 1644 { 1645 *t = c; 1646 suffix_end = arc_suffixes + arc_suffixes_count; 1647 for (suffix = suf; 1648 suffix < suffix_end && strcmp (suffix->name, suf->name) == 0; 1649 ++suffix) 1650 { 1651 if (arc_operands[suffix->type].fmt == *syn) 1652 { 1653 /* Insert the suffix's value into the insn. */ 1654 if (operand->insert) 1655 insn = (*operand->insert) (insn, operand, 1656 mods, NULL, suffix->value, 1657 NULL); 1658 else 1659 insn |= suffix->value << operand->shift; 1660 1661 str = t; 1662 found = 1; 1663 break; 1664 } 1665 } 1666 } 1667 ++syn; 1668 if (!found) 1669 /* Wrong type. Just go on to try next insn entry. */ 1670 ; 1671 else 1672 { 1673 if (num_suffixes == MAX_SUFFIXES) 1674 as_bad ("too many suffixes"); 1675 else 1676 insn_suffixes[num_suffixes++] = suffix; 1677 } 1678 } 1679 else 1680 /* This is either a register or an expression of some kind. */ 1681 { 1682 char *hold; 1683 const struct arc_operand_value *reg = NULL; 1684 long value = 0; 1685 expressionS exp; 1686 1687 if (operand->flags & ARC_OPERAND_SUFFIX) 1688 abort (); 1689 1690 /* Is there anything left to parse? 1691 We don't check for this at the top because we want to parse 1692 any trailing fake arguments in the syntax string. */ 1693 if (is_end_of_line[(unsigned char) *str]) 1694 break; 1695 1696 /* Parse the operand. */ 1697 hold = input_line_pointer; 1698 input_line_pointer = str; 1699 expression (&exp); 1700 str = input_line_pointer; 1701 input_line_pointer = hold; 1702 1703 if (exp.X_op == O_illegal) 1704 as_bad ("illegal operand"); 1705 else if (exp.X_op == O_absent) 1706 as_bad ("missing operand"); 1707 else if (exp.X_op == O_constant) 1708 value = exp.X_add_number; 1709 else if (exp.X_op == O_register) 1710 reg = (struct arc_operand_value *) exp.X_add_number; 1711#define IS_REG_DEST_OPERAND(o) ((o) == 'a') 1712 else if (IS_REG_DEST_OPERAND (*syn)) 1713 as_bad ("symbol as destination register"); 1714 else 1715 { 1716 if (!strncmp (str, "@h30", 4)) 1717 { 1718 arc_code_symbol (&exp); 1719 str += 4; 1720 } 1721 /* We need to generate a fixup for this expression. */ 1722 if (fc >= MAX_FIXUPS) 1723 as_fatal ("too many fixups"); 1724 fixups[fc].exp = exp; 1725 /* We don't support shimm relocs. break here to force 1726 the assembler to output a limm. */ 1727#define IS_REG_SHIMM_OFFSET(o) ((o) == 'd') 1728 if (IS_REG_SHIMM_OFFSET (*syn)) 1729 break; 1730 /* If this is a register constant (IE: one whose 1731 register value gets stored as 61-63) then this 1732 must be a limm. */ 1733 /* ??? This bit could use some cleaning up. 1734 Referencing the format chars like this goes 1735 against style. */ 1736 if (IS_SYMBOL_OPERAND (*syn)) 1737 { 1738 const char *junk; 1739 limm_reloc_p = 1; 1740 /* Save this, we don't yet know what reloc to use. */ 1741 fix_up_at = fc; 1742 /* Tell insert_reg we need a limm. This is 1743 needed because the value at this point is 1744 zero, a shimm. */ 1745 /* ??? We need a cleaner interface than this. */ 1746 (*arc_operands[arc_operand_map['Q']].insert) 1747 (insn, operand, mods, reg, 0L, &junk); 1748 } 1749 else 1750 fixups[fc].opindex = arc_operand_map[(int) *syn]; 1751 ++fc; 1752 value = 0; 1753 } 1754 1755 /* Insert the register or expression into the instruction. */ 1756 if (operand->insert) 1757 { 1758 const char *errmsg = NULL; 1759 insn = (*operand->insert) (insn, operand, mods, 1760 reg, (long) value, &errmsg); 1761 if (errmsg != (const char *) NULL) 1762 { 1763 last_errmsg = errmsg; 1764 if (operand->flags & ARC_OPERAND_ERROR) 1765 { 1766 as_bad (errmsg); 1767 return; 1768 } 1769 else if (operand->flags & ARC_OPERAND_WARN) 1770 as_warn (errmsg); 1771 break; 1772 } 1773 } 1774 else 1775 insn |= (value & ((1 << operand->bits) - 1)) << operand->shift; 1776 1777 ++syn; 1778 } 1779 } 1780 1781 /* If we're at the end of the syntax string, we're done. */ 1782 /* FIXME: try to move this to a separate function. */ 1783 if (*syn == '\0') 1784 { 1785 int i; 1786 char *f; 1787 long limm, limm_p; 1788 1789 /* For the moment we assume a valid `str' can only contain blanks 1790 now. IE: We needn't try again with a longer version of the 1791 insn and it is assumed that longer versions of insns appear 1792 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */ 1793 1794 while (ISSPACE (*str)) 1795 ++str; 1796 1797 if (!is_end_of_line[(unsigned char) *str]) 1798 as_bad ("junk at end of line: `%s'", str); 1799 1800 /* Is there a limm value? */ 1801 limm_p = arc_opcode_limm_p (&limm); 1802 1803 /* Perform various error and warning tests. */ 1804 1805 { 1806 static int in_delay_slot_p = 0; 1807 static int prev_insn_needs_cc_nop_p = 0; 1808 /* delay slot type seen */ 1809 int delay_slot_type = ARC_DELAY_NONE; 1810 /* conditional execution flag seen */ 1811 int conditional = 0; 1812 /* 1 if condition codes are being set */ 1813 int cc_set_p = 0; 1814 /* 1 if conditional branch, including `b' "branch always" */ 1815 int cond_branch_p = opcode->flags & ARC_OPCODE_COND_BRANCH; 1816 1817 for (i = 0; i < num_suffixes; ++i) 1818 { 1819 switch (arc_operands[insn_suffixes[i]->type].fmt) 1820 { 1821 case 'n': 1822 delay_slot_type = insn_suffixes[i]->value; 1823 break; 1824 case 'q': 1825 conditional = insn_suffixes[i]->value; 1826 break; 1827 case 'f': 1828 cc_set_p = 1; 1829 break; 1830 } 1831 } 1832 1833 /* Putting an insn with a limm value in a delay slot is supposed to 1834 be legal, but let's warn the user anyway. Ditto for 8 byte 1835 jumps with delay slots. */ 1836 if (in_delay_slot_p && limm_p) 1837 as_warn ("8 byte instruction in delay slot"); 1838 if (delay_slot_type != ARC_DELAY_NONE 1839 && limm_p && arc_insn_not_jl (insn)) /* except for jl addr */ 1840 as_warn ("8 byte jump instruction with delay slot"); 1841 in_delay_slot_p = (delay_slot_type != ARC_DELAY_NONE) && !limm_p; 1842 1843 /* Warn when a conditional branch immediately follows a set of 1844 the condition codes. Note that this needn't be done if the 1845 insn that sets the condition codes uses a limm. */ 1846 if (cond_branch_p && conditional != 0 /* 0 = "always" */ 1847 && prev_insn_needs_cc_nop_p && arc_mach_type == bfd_mach_arc_5) 1848 as_warn ("conditional branch follows set of flags"); 1849 prev_insn_needs_cc_nop_p = 1850 /* FIXME: ??? not required: 1851 (delay_slot_type != ARC_DELAY_NONE) && */ 1852 cc_set_p && !limm_p; 1853 } 1854 1855 /* Write out the instruction. 1856 It is important to fetch enough space in one call to `frag_more'. 1857 We use (f - frag_now->fr_literal) to compute where we are and we 1858 don't want frag_now to change between calls. */ 1859 if (limm_p) 1860 { 1861 f = frag_more (8); 1862 md_number_to_chars (f, insn, 4); 1863 md_number_to_chars (f + 4, limm, 4); 1864 dwarf2_emit_insn (8); 1865 } 1866 else if (limm_reloc_p) 1867 /* We need a limm reloc, but the tables think we don't. */ 1868 abort (); 1869 else 1870 { 1871 f = frag_more (4); 1872 md_number_to_chars (f, insn, 4); 1873 dwarf2_emit_insn (4); 1874 } 1875 1876 /* Create any fixups. */ 1877 for (i = 0; i < fc; ++i) 1878 { 1879 int op_type, reloc_type; 1880 expressionS exptmp; 1881 const struct arc_operand *operand; 1882 1883 /* Create a fixup for this operand. 1884 At this point we do not use a bfd_reloc_code_real_type for 1885 operands residing in the insn, but instead just use the 1886 operand index. This lets us easily handle fixups for any 1887 operand type, although that is admittedly not a very exciting 1888 feature. We pick a BFD reloc type in md_apply_fix. 1889 1890 Limm values (4 byte immediate "constants") must be treated 1891 normally because they're not part of the actual insn word 1892 and thus the insertion routines don't handle them. */ 1893 1894 if (arc_operands[fixups[i].opindex].flags & ARC_OPERAND_LIMM) 1895 { 1896 /* Modify the fixup addend as required by the cpu. */ 1897 fixups[i].exp.X_add_number += arc_limm_fixup_adjust (insn); 1898 op_type = fixups[i].opindex; 1899 /* FIXME: can we add this data to the operand table? */ 1900 if (op_type == arc_operand_map['L'] 1901 || op_type == arc_operand_map['s'] 1902 || op_type == arc_operand_map['o'] 1903 || op_type == arc_operand_map['O']) 1904 reloc_type = BFD_RELOC_32; 1905 else if (op_type == arc_operand_map['J']) 1906 reloc_type = BFD_RELOC_ARC_B26; 1907 else 1908 abort (); 1909 reloc_type = get_arc_exp_reloc_type (1, reloc_type, 1910 &fixups[i].exp, 1911 &exptmp); 1912 } 1913 else 1914 { 1915 op_type = get_arc_exp_reloc_type (0, fixups[i].opindex, 1916 &fixups[i].exp, &exptmp); 1917 reloc_type = op_type + (int) BFD_RELOC_UNUSED; 1918 } 1919 operand = &arc_operands[op_type]; 1920 fix_new_exp (frag_now, 1921 ((f - frag_now->fr_literal) 1922 + (operand->flags & ARC_OPERAND_LIMM ? 4 : 0)), 4, 1923 &exptmp, 1924 (operand->flags & ARC_OPERAND_RELATIVE_BRANCH) != 0, 1925 (bfd_reloc_code_real_type) reloc_type); 1926 } 1927 return; 1928 } 1929 } 1930 1931 if (NULL == last_errmsg) 1932 as_bad ("bad instruction `%s'", start); 1933 else 1934 as_bad (last_errmsg); 1935} 1936