1dnl PowerPC-64 mpn_rshift -- rp[] = up[] >> cnt 2 3dnl Copyright 2003, 2005 Free Software Foundation, Inc. 4 5dnl This file is part of the GNU MP Library. 6 7dnl The GNU MP Library is free software; you can redistribute it and/or modify 8dnl it under the terms of the GNU Lesser General Public License as published 9dnl by the Free Software Foundation; either version 3 of the License, or (at 10dnl your option) any later version. 11 12dnl The GNU MP Library is distributed in the hope that it will be useful, but 13dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 14dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public 15dnl License for more details. 16 17dnl You should have received a copy of the GNU Lesser General Public License 18dnl along with the GNU MP Library. If not, see http://www.gnu.org/licenses/. 19 20include(`../config.m4') 21 22C cycles/limb 23C POWER3/PPC630: 1.5 24C POWER4/PPC970: 3.0 25 26C INPUT PARAMETERS 27define(`rp',`r3') 28define(`up',`r4') 29define(`n',`r5') 30define(`cnt',`r6') 31 32define(`tnc',`r5') 33define(`v0',`r0') 34define(`v1',`r7') 35define(`u0',`r8') 36define(`u1',`r9') 37define(`h0',`r10') 38define(`h1',`r11') 39 40 41ASM_START() 42PROLOGUE(mpn_rshift) 43ifdef(`HAVE_ABI_mode32', 44` rldicl n, n, 0, 32') C zero extend n 45 mtctr n C copy n to count register 46 addi rp, rp, -16 47 subfic tnc, cnt, 64 C reverse shift count 48 49 ld u0, 0(up) 50 srd h0, u0, cnt 51 sld r12, u0, tnc C return value 52 bdz L(1) C jump for n = 1 53 54 ld u1, 8(up) 55 bdz L(2) C jump for n = 2 56 57 ldu u0, 16(up) 58 bdz L(end) C jump for n = 3 59 60L(oop): sld v1, u1, tnc 61 srd h1, u1, cnt 62 ld u1, 8(up) 63 or h0, v1, h0 64 stdu h0, 16(rp) 65 66 bdz L(exit) 67 68 sld v0, u0, tnc 69 srd h0, u0, cnt 70 ldu u0, 16(up) 71 or h1, v0, h1 72 std h1, 8(rp) 73 74 bdnz L(oop) 75 76L(end): sld v1, u1, tnc 77 srd h1, u1, cnt 78 or h0, v1, h0 79 stdu h0, 16(rp) 80 sld v0, u0, tnc 81 srd h0, u0, cnt 82 or h1, v0, h1 83 std h1, 8(rp) 84L(1): std h0, 16(rp) 85ifdef(`HAVE_ABI_mode32', 86` srdi r3, r12, 32 87 mr r4, r12 88',` mr r3, r12 89') 90 blr 91 92L(exit): sld v0, u0, tnc 93 srd h0, u0, cnt 94 or h1, v0, h1 95 std h1, 8(rp) 96L(2): sld v1, u1, tnc 97 srd h1, u1, cnt 98 or h0, v1, h0 99 stdu h0, 16(rp) 100 std h1, 8(rp) 101ifdef(`HAVE_ABI_mode32', 102` srdi r3, r12, 32 103 mr r4, r12 104',` mr r3, r12 105') 106 blr 107EPILOGUE() 108