1/* Testcase to check generation of a SH2A specific instruction for
2   "BAND.B #imm3, @(disp12, Rn)".  */
3/* { dg-do assemble }  */
4/* { dg-options "-O1 -mbitops" }  */
5/* { dg-skip-if "" { "sh*-*-*" } "*" "-m2a -m2a-nofpu -m2a-single -m2a-single-only" }  */
6/* { dg-final { scan-assembler "band.b"} }  */
7
8volatile struct
9{
10  union
11  {
12    unsigned char BYTE;
13    struct
14    {
15      unsigned char BIT7:1;
16      unsigned char BIT6:1;
17      unsigned char BIT5:1;
18      unsigned char BIT4:1;
19      unsigned char BIT3:1;
20      unsigned char BIT2:1;
21      unsigned char BIT1:1;
22      unsigned char BIT0:1;
23    }
24    BIT;
25  }
26  ICR0;
27}
28USRSTR;
29
30volatile union t_IOR
31{
32  unsigned short WORD;
33  struct
34  {
35    unsigned char IOR15:1;
36    unsigned char IOR14:1;
37    unsigned char IOR13:1;
38    unsigned char IOR12:1;
39    unsigned char IOR11:1;
40    unsigned char IOR10:1;
41    unsigned char IOR9:1;
42    unsigned char IOR8:1;
43    unsigned char IOR7:1;
44    unsigned char IOR6:1;
45    unsigned char IOR5:1;
46    unsigned char IOR4:1;
47    unsigned char IOR3:1;
48    unsigned char IOR2:1;
49    unsigned char IOR1:1;
50    unsigned char IOR0:1;
51  }
52  BIT;
53}
54PORT;
55
56int
57main ()
58{
59  volatile unsigned char a;
60
61  /* Instruction generated is BAND.B #imm3, @(disp12, Rn)  */
62  USRSTR.ICR0.BIT.BIT3 = USRSTR.ICR0.BIT.BIT4 & USRSTR.ICR0.BIT.BIT1;
63  USRSTR.ICR0.BIT.BIT2 = USRSTR.ICR0.BIT.BIT6 & USRSTR.ICR0.BIT.BIT6;
64  USRSTR.ICR0.BIT.BIT4 = USRSTR.ICR0.BIT.BIT2 & USRSTR.ICR0.BIT.BIT4;
65  USRSTR.ICR0.BIT.BIT6 = USRSTR.ICR0.BIT.BIT1 & USRSTR.ICR0.BIT.BIT3;
66
67  a = USRSTR.ICR0.BIT.BIT0 & USRSTR.ICR0.BIT.BIT1;
68  a = USRSTR.ICR0.BIT.BIT5 & USRSTR.ICR0.BIT.BIT7;
69  a = USRSTR.ICR0.BIT.BIT2 & USRSTR.ICR0.BIT.BIT6;
70
71  PORT.BIT.IOR13 = PORT.BIT.IOR0  &  USRSTR.ICR0.BIT.BIT7;
72  PORT.BIT.IOR15 = PORT.BIT.IOR6  &  USRSTR.ICR0.BIT.BIT2;
73  PORT.BIT.IOR3  = PORT.BIT.IOR2  &  USRSTR.ICR0.BIT.BIT5;
74  PORT.BIT.IOR1  = PORT.BIT.IOR13 &  USRSTR.ICR0.BIT.BIT1;
75
76  PORT.BIT.IOR1  = PORT.BIT.IOR2  &  USRSTR.ICR0.BIT.BIT1;
77  PORT.BIT.IOR11 = PORT.BIT.IOR9  &  USRSTR.ICR0.BIT.BIT2;
78  PORT.BIT.IOR8  = PORT.BIT.IOR14 &  USRSTR.ICR0.BIT.BIT5;
79
80  PORT.BIT.IOR10 &= USRSTR.ICR0.BIT.BIT1;
81  PORT.BIT.IOR1  &= USRSTR.ICR0.BIT.BIT2;
82  PORT.BIT.IOR5  &= USRSTR.ICR0.BIT.BIT5;
83  PORT.BIT.IOR14 &= USRSTR.ICR0.BIT.BIT4;
84
85  /* Instruction generated on using size optimization option "-Os".  */
86  a = a & USRSTR.ICR0.BIT.BIT1;
87  a = a & USRSTR.ICR0.BIT.BIT4;
88  a = a & USRSTR.ICR0.BIT.BIT0;
89
90  return 0;
91}
92