1/* { dg-options "isa_rev<=5 -mgp64" } */
2/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
3/* { dg-final { scan-assembler-times "\tsdl\t" 1 } } */
4/* { dg-final { scan-assembler-times "\tsdr\t" 1 } } */
5/* { dg-final { scan-assembler-times "\tldl\t" 1 } } */
6/* { dg-final { scan-assembler-times "\tldr\t" 1 } } */
7/* { dg-final { scan-assembler-times "\tswl\t" 1 } } */
8/* { dg-final { scan-assembler-times "\tswr\t" 1 } } */
9/* { dg-final { scan-assembler-times "\tlwl\t" 1 } } */
10/* { dg-final { scan-assembler-times "\tlwr\t" 1 } } */
11/* { dg-final { scan-assembler-not "\tnop" } } */
12
13/* Test to make sure we produce the unaligned load/store for
14   both 64bit and 32bits sized accesses.  */
15
16struct s
17{
18  char c;
19  int i;
20  long long l;
21} __attribute__ ((packed)) s __attribute__((aligned(1) ));
22
23NOMIPS16 void
24sd (long long l)
25{
26  s.l = l;
27}
28
29NOMIPS16 long long
30ld ()
31{
32  return s.l;
33}
34
35NOMIPS16 void
36sw (int i)
37{
38  s.i = i;
39}
40
41NOMIPS16 int
42lw ()
43{
44  return s.i;
45}
46