1/* { dg-options "-fopenmp -fdump-tree-optimized -O" } */ 2 3#pragma omp declare simd inbranch uniform(c) linear(b:66) 4#pragma omp declare simd notinbranch aligned(c:32) 5int addit(int a, int b, int *c) 6{ 7 return a + b; 8} 9 10#pragma omp declare simd uniform(a) aligned(a:32) linear(k:1) notinbranch 11float setArray(float *a, float x, int k) 12{ 13 a[k] = a[k] + x; 14 return a[k]; 15} 16 17/* { dg-final { scan-tree-dump "_ZGVbN4ua32vl_setArray" "optimized" { target i?86-*-* x86_64-*-* } } } */ 18/* { dg-final { scan-tree-dump "_ZGVbN4vvva32_addit" "optimized" { target i?86-*-* x86_64-*-* } } } */ 19/* { dg-final { scan-tree-dump "_ZGVbM4vl66u_addit" "optimized" { target i?86-*-* x86_64-*-* } } } */ 20/* { dg-final { scan-tree-dump "_ZGVcN8ua32vl_setArray" "optimized" { target i?86-*-* x86_64-*-* } } } */ 21/* { dg-final { scan-tree-dump "_ZGVcN4vvva32_addit" "optimized" { target i?86-*-* x86_64-*-* } } } */ 22/* { dg-final { scan-tree-dump "_ZGVcM4vl66u_addit" "optimized" { target i?86-*-* x86_64-*-* } } } */ 23/* { dg-final { scan-tree-dump "_ZGVdN8ua32vl_setArray" "optimized" { target i?86-*-* x86_64-*-* } } } */ 24/* { dg-final { scan-tree-dump "_ZGVdN8vvva32_addit" "optimized" { target i?86-*-* x86_64-*-* } } } */ 25/* { dg-final { scan-tree-dump "_ZGVdM8vl66u_addit" "optimized" { target i?86-*-* x86_64-*-* } } } */ 26/* { dg-final { cleanup-tree-dump "optimized" } } */ 27