1/* PR target/13380.
2   On m32r, the condition code register, (reg:SI 17), was replaced with
3   a pseudo reg, which would cause an unrecognized insn.  */
4
5void
6foo (unsigned int a, unsigned int b)
7{
8  if (a > b)
9    {
10      while (a)
11	{
12	  switch (b)
13	    {
14	    default:
15	      a = 0;
16	    case 2:
17	      a = 0;
18	    case 1:
19	      a = 0;
20	    case 0:
21	      ;
22	    }
23	}
24    }
25}
26