1/* This was cut down from reload1.c in May 2001, was observed to cause
2   a bootstrap failure for powerpc-apple-darwin1.3.
3
4   Copyright (C) 2001  Free Software Foundation.  */
5
6enum insn_code
7{
8  CODE_FOR_extendqidi2 = 3,
9  CODE_FOR_nothing = 870
10};
11
12struct rtx_def;
13
14enum machine_mode
15{
16  VOIDmode,
17  MAX_MACHINE_MODE
18};
19
20typedef unsigned long long HARD_REG_ELT_TYPE;
21typedef HARD_REG_ELT_TYPE HARD_REG_SET[((77 + (8 * 8) - 1) / (8 * 8))];
22
23enum rtx_code
24{
25  UNKNOWN,
26  NIL,
27  REG,
28  LAST_AND_UNUSED_RTX_CODE = 256
29};
30
31typedef struct
32{
33  unsigned min_align:8;
34  unsigned base_after_vec:1;
35  unsigned min_after_vec:1;
36  unsigned max_after_vec:1;
37  unsigned min_after_base:1;
38  unsigned max_after_base:1;
39  unsigned offset_unsigned:1;
40  unsigned:2;
41  unsigned scale:8;
42}
43addr_diff_vec_flags;
44typedef union rtunion_def
45{
46  long long rtwint;
47  int rtint;
48  unsigned int rtuint;
49  const char *rtstr;
50  struct rtx_def *rtx;
51  struct rtvec_def *rtvec;
52  enum machine_mode rttype;
53  addr_diff_vec_flags rt_addr_diff_vec_flags;
54  struct cselib_val_struct *rt_cselib;
55  struct bitmap_head_def *rtbit;
56  union tree_node *rttree;
57  struct basic_block_def *bb;
58}
59rtunion;
60typedef struct rtx_def
61{
62  enum rtx_code code:16;
63  enum machine_mode mode:8;
64  unsigned int jump:1;
65  unsigned int call:1;
66  unsigned int unchanging:1;
67  unsigned int volatil:1;
68  unsigned int in_struct:1;
69  unsigned int used:1;
70  unsigned integrated:1;
71  unsigned frame_related:1;
72  rtunion fld[1];
73}
74 *rtx;
75
76enum reload_type
77{
78  RELOAD_FOR_INPUT, RELOAD_FOR_OUTPUT, RELOAD_FOR_INSN,
79  RELOAD_FOR_INPUT_ADDRESS, RELOAD_FOR_INPADDR_ADDRESS,
80  RELOAD_FOR_OUTPUT_ADDRESS, RELOAD_FOR_OUTADDR_ADDRESS,
81  RELOAD_FOR_OPERAND_ADDRESS, RELOAD_FOR_OPADDR_ADDR,
82  RELOAD_OTHER, RELOAD_FOR_OTHER_ADDRESS
83};
84
85struct reload
86{
87  rtx in;
88  rtx out;
89  //  enum reg_class class;
90  enum machine_mode inmode;
91  enum machine_mode outmode;
92  enum machine_mode mode;
93  unsigned int nregs;
94  int inc;
95  rtx in_reg;
96  rtx out_reg;
97  int regno;
98  rtx reg_rtx;
99  int opnum;
100  int secondary_in_reload;
101  int secondary_out_reload;
102  enum insn_code secondary_in_icode;
103  enum insn_code secondary_out_icode;
104  enum reload_type when_needed;
105  unsigned int optional:1;
106  unsigned int nocombine:1;
107  unsigned int secondary_p:1;
108  unsigned int nongroup:1;
109};
110
111struct insn_chain
112{
113  rtx insn;
114};
115
116extern int n_reloads;
117static short reload_order[(2 * 10 * (2 + 1))];
118int reload_spill_index[(2 * 10 * (2 + 1))];
119extern struct reload rld[(2 * 10 * (2 + 1))];
120static rtx *reg_last_reload_reg;
121static HARD_REG_SET reg_reloaded_valid;
122static HARD_REG_SET reg_reloaded_dead;
123static HARD_REG_SET reg_reloaded_died;
124static HARD_REG_SET reg_is_output_reload;
125extern const unsigned int mode_size[];
126extern int target_flags;
127
128static void
129emit_reload_insns (chain)
130     struct insn_chain *chain;
131{
132  rtx insn = chain->insn;
133  register int j;
134  rtx following_insn = (((insn)->fld[2]).rtx);
135  rtx before_insn = (((insn)->fld[1]).rtx);
136
137  for (j = 0; j < n_reloads; j++)
138    {
139      register int r = reload_order[j];
140      register int i = reload_spill_index[r];
141
142	{
143	  rtx out = (((enum rtx_code) (rld[r].out)->code) == REG ? rld[r].out : rld[r].out_reg);
144	  register int nregno = (((out)->fld[0]).rtuint);
145
146	  if (nregno >= 77)
147	    {
148	      rtx src_reg, store_insn = (rtx) 0;
149
150	      reg_last_reload_reg[nregno] = 0;
151	      if (src_reg && ((enum rtx_code) (src_reg)->code) == REG && (((src_reg)->fld[0]).rtuint) < 77)
152		{
153		  int src_regno = (((src_reg)->fld[0]).rtuint);
154		  int nr =
155		    (((src_regno) >= 32
156		      && (src_regno) <=
157		      63) ? (((mode_size[(int) (rld[r].mode)]) + 8 -
158			      1) / 8) : (((mode_size[(int) (rld[r].mode)]) +
159					  (!(target_flags & 0x00000020) ? 4 :
160					   8) - 1) / (!(target_flags & 0x00000020) ? 4 : 8)));
161		  rtx note = 0;
162
163		  while (nr-- > 0)
164		    {
165		      ((reg_reloaded_dead)
166		       [(src_regno + nr) / ((unsigned) (8 * 8))] &=
167		       ~(((HARD_REG_ELT_TYPE) (1)) << ((src_regno + nr) % ((unsigned) (8 * 8)))));
168		      ((reg_reloaded_valid)
169		       [(src_regno + nr) / ((unsigned) (8 * 8))] |=
170		       ((HARD_REG_ELT_TYPE) (1)) << ((src_regno + nr) % ((unsigned) (8 * 8))));
171		      ((reg_is_output_reload)
172		       [(src_regno + nr) / ((unsigned) (8 * 8))] |=
173		       ((HARD_REG_ELT_TYPE) (1)) << ((src_regno + nr) % ((unsigned) (8 * 8))));
174		      if (note)
175			((reg_reloaded_died)
176			 [(src_regno) / ((unsigned) (8 * 8))] |=
177			 ((HARD_REG_ELT_TYPE) (1)) << ((src_regno) % ((unsigned) (8 * 8))));
178		      else
179			((reg_reloaded_died)
180			 [(src_regno) / ((unsigned) (8 * 8))] &=
181			 ~(((HARD_REG_ELT_TYPE) (1)) << ((src_regno) % ((unsigned) (8 * 8)))));
182		    }
183		  reg_last_reload_reg[nregno] = src_reg;
184		}
185	    }
186	  else
187	    {
188	      int num_regs =
189		(((nregno) >= 32
190		  && (nregno) <=
191		  63)
192		 ? (((mode_size
193		      [(int) (((enum machine_mode) (rld[r].out)->mode))]) +
194		     8 -
195		     1) /
196		    8)
197		 : (((mode_size
198		      [(int) (((enum machine_mode) (rld[r].out)->mode))]) +
199		     (!(target_flags & 0x00000020) ? 4 : 8) - 1) / (!(target_flags & 0x00000020) ? 4 : 8)));
200	      while (num_regs-- > 0)
201		reg_last_reload_reg[nregno + num_regs] = 0;
202	    }
203	}
204    }
205}
206