1/* Code for RTL register eliminations. 2 Copyright (C) 2010-2015 Free Software Foundation, Inc. 3 Contributed by Vladimir Makarov <vmakarov@redhat.com>. 4 5This file is part of GCC. 6 7GCC is free software; you can redistribute it and/or modify it under 8the terms of the GNU General Public License as published by the Free 9Software Foundation; either version 3, or (at your option) any later 10version. 11 12GCC is distributed in the hope that it will be useful, but WITHOUT ANY 13WARRANTY; without even the implied warranty of MERCHANTABILITY or 14FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15for more details. 16 17You should have received a copy of the GNU General Public License 18along with GCC; see the file COPYING3. If not see 19<http://www.gnu.org/licenses/>. */ 20 21/* Eliminable registers (like a soft argument or frame pointer) are 22 widely used in RTL. These eliminable registers should be replaced 23 by real hard registers (like the stack pointer or hard frame 24 pointer) plus some offset. The offsets usually change whenever the 25 stack is expanded. We know the final offsets only at the very end 26 of LRA. 27 28 Within LRA, we usually keep the RTL in such a state that the 29 eliminable registers can be replaced by just the corresponding hard 30 register (without any offset). To achieve this we should add the 31 initial elimination offset at the beginning of LRA and update the 32 offsets whenever the stack is expanded. We need to do this before 33 every constraint pass because the choice of offset often affects 34 whether a particular address or memory constraint is satisfied. 35 36 We keep RTL code at most time in such state that the virtual 37 registers can be changed by just the corresponding hard registers 38 (with zero offsets) and we have the right RTL code. To achieve this 39 we should add initial offset at the beginning of LRA work and update 40 offsets after each stack expanding. But actually we update virtual 41 registers to the same virtual registers + corresponding offsets 42 before every constraint pass because it affects constraint 43 satisfaction (e.g. an address displacement became too big for some 44 target). 45 46 The final change of eliminable registers to the corresponding hard 47 registers are done at the very end of LRA when there were no change 48 in offsets anymore: 49 50 fp + 42 => sp + 42 51 52*/ 53 54#include "config.h" 55#include "system.h" 56#include "coretypes.h" 57#include "tm.h" 58#include "hard-reg-set.h" 59#include "rtl.h" 60#include "tm_p.h" 61#include "regs.h" 62#include "insn-config.h" 63#include "insn-codes.h" 64#include "recog.h" 65#include "output.h" 66#include "addresses.h" 67#include "target.h" 68#include "hashtab.h" 69#include "hash-set.h" 70#include "vec.h" 71#include "machmode.h" 72#include "input.h" 73#include "function.h" 74#include "symtab.h" 75#include "flags.h" 76#include "statistics.h" 77#include "double-int.h" 78#include "real.h" 79#include "fixed-value.h" 80#include "alias.h" 81#include "wide-int.h" 82#include "inchash.h" 83#include "tree.h" 84#include "expmed.h" 85#include "dojump.h" 86#include "explow.h" 87#include "calls.h" 88#include "emit-rtl.h" 89#include "varasm.h" 90#include "stmt.h" 91#include "expr.h" 92#include "predict.h" 93#include "dominance.h" 94#include "cfg.h" 95#include "basic-block.h" 96#include "except.h" 97#include "optabs.h" 98#include "df.h" 99#include "ira.h" 100#include "rtl-error.h" 101#include "lra-int.h" 102 103/* This structure is used to record information about hard register 104 eliminations. */ 105struct lra_elim_table 106{ 107 /* Hard register number to be eliminated. */ 108 int from; 109 /* Hard register number used as replacement. */ 110 int to; 111 /* Difference between values of the two hard registers above on 112 previous iteration. */ 113 HOST_WIDE_INT previous_offset; 114 /* Difference between the values on the current iteration. */ 115 HOST_WIDE_INT offset; 116 /* Nonzero if this elimination can be done. */ 117 bool can_eliminate; 118 /* CAN_ELIMINATE since the last check. */ 119 bool prev_can_eliminate; 120 /* REG rtx for the register to be eliminated. We cannot simply 121 compare the number since we might then spuriously replace a hard 122 register corresponding to a pseudo assigned to the reg to be 123 eliminated. */ 124 rtx from_rtx; 125 /* REG rtx for the replacement. */ 126 rtx to_rtx; 127}; 128 129/* The elimination table. Each array entry describes one possible way 130 of eliminating a register in favor of another. If there is more 131 than one way of eliminating a particular register, the most 132 preferred should be specified first. */ 133static struct lra_elim_table *reg_eliminate = 0; 134 135/* This is an intermediate structure to initialize the table. It has 136 exactly the members provided by ELIMINABLE_REGS. */ 137static const struct elim_table_1 138{ 139 const int from; 140 const int to; 141} reg_eliminate_1[] = 142 143/* If a set of eliminable hard registers was specified, define the 144 table from it. Otherwise, default to the normal case of the frame 145 pointer being replaced by the stack pointer. */ 146 147#ifdef ELIMINABLE_REGS 148 ELIMINABLE_REGS; 149#else 150 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}; 151#endif 152 153#define NUM_ELIMINABLE_REGS ARRAY_SIZE (reg_eliminate_1) 154 155/* Print info about elimination table to file F. */ 156static void 157print_elim_table (FILE *f) 158{ 159 struct lra_elim_table *ep; 160 161 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 162 fprintf (f, "%s eliminate %d to %d (offset=" HOST_WIDE_INT_PRINT_DEC 163 ", prev_offset=" HOST_WIDE_INT_PRINT_DEC ")\n", 164 ep->can_eliminate ? "Can" : "Can't", 165 ep->from, ep->to, ep->offset, ep->previous_offset); 166} 167 168/* Print info about elimination table to stderr. */ 169void 170lra_debug_elim_table (void) 171{ 172 print_elim_table (stderr); 173} 174 175/* Setup possibility of elimination in elimination table element EP to 176 VALUE. Setup FRAME_POINTER_NEEDED if elimination from frame 177 pointer to stack pointer is not possible anymore. */ 178static void 179setup_can_eliminate (struct lra_elim_table *ep, bool value) 180{ 181 ep->can_eliminate = ep->prev_can_eliminate = value; 182 if (! value 183 && ep->from == FRAME_POINTER_REGNUM && ep->to == STACK_POINTER_REGNUM) 184 frame_pointer_needed = 1; 185 if (!frame_pointer_needed) 186 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = 0; 187} 188 189/* Map: eliminable "from" register -> its current elimination, 190 or NULL if none. The elimination table may contain more than 191 one elimination for the same hard register, but this map specifies 192 the one that we are currently using. */ 193static struct lra_elim_table *elimination_map[FIRST_PSEUDO_REGISTER]; 194 195/* When an eliminable hard register becomes not eliminable, we use the 196 following special structure to restore original offsets for the 197 register. */ 198static struct lra_elim_table self_elim_table; 199 200/* Offsets should be used to restore original offsets for eliminable 201 hard register which just became not eliminable. Zero, 202 otherwise. */ 203static HOST_WIDE_INT self_elim_offsets[FIRST_PSEUDO_REGISTER]; 204 205/* Map: hard regno -> RTL presentation. RTL presentations of all 206 potentially eliminable hard registers are stored in the map. */ 207static rtx eliminable_reg_rtx[FIRST_PSEUDO_REGISTER]; 208 209/* Set up ELIMINATION_MAP of the currently used eliminations. */ 210static void 211setup_elimination_map (void) 212{ 213 int i; 214 struct lra_elim_table *ep; 215 216 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 217 elimination_map[i] = NULL; 218 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 219 if (ep->can_eliminate && elimination_map[ep->from] == NULL) 220 elimination_map[ep->from] = ep; 221} 222 223 224 225/* Compute the sum of X and Y, making canonicalizations assumed in an 226 address, namely: sum constant integers, surround the sum of two 227 constants with a CONST, put the constant as the second operand, and 228 group the constant on the outermost sum. 229 230 This routine assumes both inputs are already in canonical form. */ 231static rtx 232form_sum (rtx x, rtx y) 233{ 234 rtx tem; 235 machine_mode mode = GET_MODE (x); 236 237 if (mode == VOIDmode) 238 mode = GET_MODE (y); 239 240 if (mode == VOIDmode) 241 mode = Pmode; 242 243 if (CONST_INT_P (x)) 244 return plus_constant (mode, y, INTVAL (x)); 245 else if (CONST_INT_P (y)) 246 return plus_constant (mode, x, INTVAL (y)); 247 else if (CONSTANT_P (x)) 248 tem = x, x = y, y = tem; 249 250 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1))) 251 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y)); 252 253 /* Note that if the operands of Y are specified in the opposite 254 order in the recursive calls below, infinite recursion will 255 occur. */ 256 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1))) 257 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1)); 258 259 /* If both constant, encapsulate sum. Otherwise, just form sum. A 260 constant will have been placed second. */ 261 if (CONSTANT_P (x) && CONSTANT_P (y)) 262 { 263 if (GET_CODE (x) == CONST) 264 x = XEXP (x, 0); 265 if (GET_CODE (y) == CONST) 266 y = XEXP (y, 0); 267 268 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y)); 269 } 270 271 return gen_rtx_PLUS (mode, x, y); 272} 273 274/* Return the current substitution hard register of the elimination of 275 HARD_REGNO. If HARD_REGNO is not eliminable, return itself. */ 276int 277lra_get_elimination_hard_regno (int hard_regno) 278{ 279 struct lra_elim_table *ep; 280 281 if (hard_regno < 0 || hard_regno >= FIRST_PSEUDO_REGISTER) 282 return hard_regno; 283 if ((ep = elimination_map[hard_regno]) == NULL) 284 return hard_regno; 285 return ep->to; 286} 287 288/* Return elimination which will be used for hard reg REG, NULL 289 otherwise. */ 290static struct lra_elim_table * 291get_elimination (rtx reg) 292{ 293 int hard_regno; 294 struct lra_elim_table *ep; 295 HOST_WIDE_INT offset; 296 297 lra_assert (REG_P (reg)); 298 if ((hard_regno = REGNO (reg)) < 0 || hard_regno >= FIRST_PSEUDO_REGISTER) 299 return NULL; 300 if ((ep = elimination_map[hard_regno]) != NULL) 301 return ep->from_rtx != reg ? NULL : ep; 302 if ((offset = self_elim_offsets[hard_regno]) == 0) 303 return NULL; 304 /* This is an iteration to restore offsets just after HARD_REGNO 305 stopped to be eliminable. */ 306 self_elim_table.from = self_elim_table.to = hard_regno; 307 self_elim_table.from_rtx 308 = self_elim_table.to_rtx 309 = eliminable_reg_rtx[hard_regno]; 310 lra_assert (self_elim_table.from_rtx != NULL); 311 self_elim_table.offset = offset; 312 return &self_elim_table; 313} 314 315/* Scan X and replace any eliminable registers (such as fp) with a 316 replacement (such as sp) if SUBST_P, plus an offset. The offset is 317 a change in the offset between the eliminable register and its 318 substitution if UPDATE_P, or the full offset if FULL_P, or 319 otherwise zero. If FULL_P, we also use the SP offsets for 320 elimination to SP. If UPDATE_P, use UPDATE_SP_OFFSET for updating 321 offsets of register elimnable to SP. If UPDATE_SP_OFFSET is 322 non-zero, don't use difference of the offset and the previous 323 offset. 324 325 MEM_MODE is the mode of an enclosing MEM. We need this to know how 326 much to adjust a register for, e.g., PRE_DEC. Also, if we are 327 inside a MEM, we are allowed to replace a sum of a hard register 328 and the constant zero with the hard register, which we cannot do 329 outside a MEM. In addition, we need to record the fact that a 330 hard register is referenced outside a MEM. 331 332 If we make full substitution to SP for non-null INSN, add the insn 333 sp offset. */ 334rtx 335lra_eliminate_regs_1 (rtx_insn *insn, rtx x, machine_mode mem_mode, 336 bool subst_p, bool update_p, 337 HOST_WIDE_INT update_sp_offset, bool full_p) 338{ 339 enum rtx_code code = GET_CODE (x); 340 struct lra_elim_table *ep; 341 rtx new_rtx; 342 int i, j; 343 const char *fmt; 344 int copied = 0; 345 346 lra_assert (!update_p || !full_p); 347 lra_assert (update_sp_offset == 0 || (!subst_p && update_p && !full_p)); 348 if (! current_function_decl) 349 return x; 350 351 switch (code) 352 { 353 CASE_CONST_ANY: 354 case CONST: 355 case SYMBOL_REF: 356 case CODE_LABEL: 357 case PC: 358 case CC0: 359 case ASM_INPUT: 360 case ADDR_VEC: 361 case ADDR_DIFF_VEC: 362 case RETURN: 363 return x; 364 365 case REG: 366 /* First handle the case where we encounter a bare hard register 367 that is eliminable. Replace it with a PLUS. */ 368 if ((ep = get_elimination (x)) != NULL) 369 { 370 rtx to = subst_p ? ep->to_rtx : ep->from_rtx; 371 372 if (update_sp_offset != 0) 373 { 374 if (ep->to_rtx == stack_pointer_rtx) 375 return plus_constant (Pmode, to, update_sp_offset); 376 return to; 377 } 378 else if (update_p) 379 return plus_constant (Pmode, to, ep->offset - ep->previous_offset); 380 else if (full_p) 381 return plus_constant (Pmode, to, 382 ep->offset 383 - (insn != NULL_RTX 384 && ep->to_rtx == stack_pointer_rtx 385 ? lra_get_insn_recog_data (insn)->sp_offset 386 : 0)); 387 else 388 return to; 389 } 390 return x; 391 392 case PLUS: 393 /* If this is the sum of an eliminable register and a constant, rework 394 the sum. */ 395 if (REG_P (XEXP (x, 0)) && CONSTANT_P (XEXP (x, 1))) 396 { 397 if ((ep = get_elimination (XEXP (x, 0))) != NULL) 398 { 399 HOST_WIDE_INT offset; 400 rtx to = subst_p ? ep->to_rtx : ep->from_rtx; 401 402 if (! update_p && ! full_p) 403 return gen_rtx_PLUS (Pmode, to, XEXP (x, 1)); 404 405 if (update_sp_offset != 0) 406 offset = ep->to_rtx == stack_pointer_rtx ? update_sp_offset : 0; 407 else 408 offset = (update_p 409 ? ep->offset - ep->previous_offset : ep->offset); 410 if (full_p && insn != NULL_RTX && ep->to_rtx == stack_pointer_rtx) 411 offset -= lra_get_insn_recog_data (insn)->sp_offset; 412 if (CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) == -offset) 413 return to; 414 else 415 return gen_rtx_PLUS (Pmode, to, 416 plus_constant (Pmode, 417 XEXP (x, 1), offset)); 418 } 419 420 /* If the hard register is not eliminable, we are done since 421 the other operand is a constant. */ 422 return x; 423 } 424 425 /* If this is part of an address, we want to bring any constant 426 to the outermost PLUS. We will do this by doing hard 427 register replacement in our operands and seeing if a constant 428 shows up in one of them. 429 430 Note that there is no risk of modifying the structure of the 431 insn, since we only get called for its operands, thus we are 432 either modifying the address inside a MEM, or something like 433 an address operand of a load-address insn. */ 434 435 { 436 rtx new0 = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode, 437 subst_p, update_p, 438 update_sp_offset, full_p); 439 rtx new1 = lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode, 440 subst_p, update_p, 441 update_sp_offset, full_p); 442 443 if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1)) 444 return form_sum (new0, new1); 445 } 446 return x; 447 448 case MULT: 449 /* If this is the product of an eliminable hard register and a 450 constant, apply the distribute law and move the constant out 451 so that we have (plus (mult ..) ..). This is needed in order 452 to keep load-address insns valid. This case is pathological. 453 We ignore the possibility of overflow here. */ 454 if (REG_P (XEXP (x, 0)) && CONST_INT_P (XEXP (x, 1)) 455 && (ep = get_elimination (XEXP (x, 0))) != NULL) 456 { 457 rtx to = subst_p ? ep->to_rtx : ep->from_rtx; 458 459 if (update_sp_offset != 0) 460 { 461 if (ep->to_rtx == stack_pointer_rtx) 462 return plus_constant (Pmode, 463 gen_rtx_MULT (Pmode, to, XEXP (x, 1)), 464 update_sp_offset * INTVAL (XEXP (x, 1))); 465 return gen_rtx_MULT (Pmode, to, XEXP (x, 1)); 466 } 467 else if (update_p) 468 return plus_constant (Pmode, 469 gen_rtx_MULT (Pmode, to, XEXP (x, 1)), 470 (ep->offset - ep->previous_offset) 471 * INTVAL (XEXP (x, 1))); 472 else if (full_p) 473 { 474 HOST_WIDE_INT offset = ep->offset; 475 476 if (insn != NULL_RTX && ep->to_rtx == stack_pointer_rtx) 477 offset -= lra_get_insn_recog_data (insn)->sp_offset; 478 return 479 plus_constant (Pmode, 480 gen_rtx_MULT (Pmode, to, XEXP (x, 1)), 481 offset * INTVAL (XEXP (x, 1))); 482 } 483 else 484 return gen_rtx_MULT (Pmode, to, XEXP (x, 1)); 485 } 486 487 /* ... fall through ... */ 488 489 case CALL: 490 case COMPARE: 491 /* See comments before PLUS about handling MINUS. */ 492 case MINUS: 493 case DIV: case UDIV: 494 case MOD: case UMOD: 495 case AND: case IOR: case XOR: 496 case ROTATERT: case ROTATE: 497 case ASHIFTRT: case LSHIFTRT: case ASHIFT: 498 case NE: case EQ: 499 case GE: case GT: case GEU: case GTU: 500 case LE: case LT: case LEU: case LTU: 501 { 502 rtx new0 = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode, 503 subst_p, update_p, 504 update_sp_offset, full_p); 505 rtx new1 = XEXP (x, 1) 506 ? lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode, 507 subst_p, update_p, 508 update_sp_offset, full_p) : 0; 509 510 if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1)) 511 return gen_rtx_fmt_ee (code, GET_MODE (x), new0, new1); 512 } 513 return x; 514 515 case EXPR_LIST: 516 /* If we have something in XEXP (x, 0), the usual case, 517 eliminate it. */ 518 if (XEXP (x, 0)) 519 { 520 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode, 521 subst_p, update_p, 522 update_sp_offset, full_p); 523 if (new_rtx != XEXP (x, 0)) 524 { 525 /* If this is a REG_DEAD note, it is not valid anymore. 526 Using the eliminated version could result in creating a 527 REG_DEAD note for the stack or frame pointer. */ 528 if (REG_NOTE_KIND (x) == REG_DEAD) 529 return (XEXP (x, 1) 530 ? lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode, 531 subst_p, update_p, 532 update_sp_offset, full_p) 533 : NULL_RTX); 534 535 x = alloc_reg_note (REG_NOTE_KIND (x), new_rtx, XEXP (x, 1)); 536 } 537 } 538 539 /* ... fall through ... */ 540 541 case INSN_LIST: 542 case INT_LIST: 543 /* Now do eliminations in the rest of the chain. If this was 544 an EXPR_LIST, this might result in allocating more memory than is 545 strictly needed, but it simplifies the code. */ 546 if (XEXP (x, 1)) 547 { 548 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode, 549 subst_p, update_p, 550 update_sp_offset, full_p); 551 if (new_rtx != XEXP (x, 1)) 552 return 553 gen_rtx_fmt_ee (GET_CODE (x), GET_MODE (x), 554 XEXP (x, 0), new_rtx); 555 } 556 return x; 557 558 case PRE_INC: 559 case POST_INC: 560 case PRE_DEC: 561 case POST_DEC: 562 /* We do not support elimination of a register that is modified. 563 elimination_effects has already make sure that this does not 564 happen. */ 565 return x; 566 567 case PRE_MODIFY: 568 case POST_MODIFY: 569 /* We do not support elimination of a hard register that is 570 modified. LRA has already make sure that this does not 571 happen. The only remaining case we need to consider here is 572 that the increment value may be an eliminable register. */ 573 if (GET_CODE (XEXP (x, 1)) == PLUS 574 && XEXP (XEXP (x, 1), 0) == XEXP (x, 0)) 575 { 576 rtx new_rtx = lra_eliminate_regs_1 (insn, XEXP (XEXP (x, 1), 1), 577 mem_mode, subst_p, update_p, 578 update_sp_offset, full_p); 579 580 if (new_rtx != XEXP (XEXP (x, 1), 1)) 581 return gen_rtx_fmt_ee (code, GET_MODE (x), XEXP (x, 0), 582 gen_rtx_PLUS (GET_MODE (x), 583 XEXP (x, 0), new_rtx)); 584 } 585 return x; 586 587 case STRICT_LOW_PART: 588 case NEG: case NOT: 589 case SIGN_EXTEND: case ZERO_EXTEND: 590 case TRUNCATE: case FLOAT_EXTEND: case FLOAT_TRUNCATE: 591 case FLOAT: case FIX: 592 case UNSIGNED_FIX: case UNSIGNED_FLOAT: 593 case ABS: 594 case SQRT: 595 case FFS: 596 case CLZ: 597 case CTZ: 598 case POPCOUNT: 599 case PARITY: 600 case BSWAP: 601 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode, 602 subst_p, update_p, 603 update_sp_offset, full_p); 604 if (new_rtx != XEXP (x, 0)) 605 return gen_rtx_fmt_e (code, GET_MODE (x), new_rtx); 606 return x; 607 608 case SUBREG: 609 new_rtx = lra_eliminate_regs_1 (insn, SUBREG_REG (x), mem_mode, 610 subst_p, update_p, 611 update_sp_offset, full_p); 612 613 if (new_rtx != SUBREG_REG (x)) 614 { 615 int x_size = GET_MODE_SIZE (GET_MODE (x)); 616 int new_size = GET_MODE_SIZE (GET_MODE (new_rtx)); 617 618 if (MEM_P (new_rtx) && x_size <= new_size) 619 { 620 SUBREG_REG (x) = new_rtx; 621 alter_subreg (&x, false); 622 return x; 623 } 624 else if (! subst_p) 625 { 626 /* LRA can transform subregs itself. So don't call 627 simplify_gen_subreg until LRA transformations are 628 finished. Function simplify_gen_subreg can do 629 non-trivial transformations (like truncation) which 630 might make LRA work to fail. */ 631 SUBREG_REG (x) = new_rtx; 632 return x; 633 } 634 else 635 return simplify_gen_subreg (GET_MODE (x), new_rtx, 636 GET_MODE (new_rtx), SUBREG_BYTE (x)); 637 } 638 639 return x; 640 641 case MEM: 642 /* Our only special processing is to pass the mode of the MEM to our 643 recursive call and copy the flags. While we are here, handle this 644 case more efficiently. */ 645 return 646 replace_equiv_address_nv 647 (x, 648 lra_eliminate_regs_1 (insn, XEXP (x, 0), GET_MODE (x), 649 subst_p, update_p, update_sp_offset, full_p)); 650 651 case USE: 652 /* Handle insn_list USE that a call to a pure function may generate. */ 653 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), VOIDmode, 654 subst_p, update_p, update_sp_offset, full_p); 655 if (new_rtx != XEXP (x, 0)) 656 return gen_rtx_USE (GET_MODE (x), new_rtx); 657 return x; 658 659 case CLOBBER: 660 case SET: 661 gcc_unreachable (); 662 663 default: 664 break; 665 } 666 667 /* Process each of our operands recursively. If any have changed, make a 668 copy of the rtx. */ 669 fmt = GET_RTX_FORMAT (code); 670 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++) 671 { 672 if (*fmt == 'e') 673 { 674 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, i), mem_mode, 675 subst_p, update_p, 676 update_sp_offset, full_p); 677 if (new_rtx != XEXP (x, i) && ! copied) 678 { 679 x = shallow_copy_rtx (x); 680 copied = 1; 681 } 682 XEXP (x, i) = new_rtx; 683 } 684 else if (*fmt == 'E') 685 { 686 int copied_vec = 0; 687 for (j = 0; j < XVECLEN (x, i); j++) 688 { 689 new_rtx = lra_eliminate_regs_1 (insn, XVECEXP (x, i, j), mem_mode, 690 subst_p, update_p, 691 update_sp_offset, full_p); 692 if (new_rtx != XVECEXP (x, i, j) && ! copied_vec) 693 { 694 rtvec new_v = gen_rtvec_v (XVECLEN (x, i), 695 XVEC (x, i)->elem); 696 if (! copied) 697 { 698 x = shallow_copy_rtx (x); 699 copied = 1; 700 } 701 XVEC (x, i) = new_v; 702 copied_vec = 1; 703 } 704 XVECEXP (x, i, j) = new_rtx; 705 } 706 } 707 } 708 709 return x; 710} 711 712/* This function is used externally in subsequent passes of GCC. It 713 always does a full elimination of X. */ 714rtx 715lra_eliminate_regs (rtx x, machine_mode mem_mode, 716 rtx insn ATTRIBUTE_UNUSED) 717{ 718 return lra_eliminate_regs_1 (NULL, x, mem_mode, true, false, 0, true); 719} 720 721/* Stack pointer offset before the current insn relative to one at the 722 func start. RTL insns can change SP explicitly. We keep the 723 changes from one insn to another through this variable. */ 724static HOST_WIDE_INT curr_sp_change; 725 726/* Scan rtx X for references to elimination source or target registers 727 in contexts that would prevent the elimination from happening. 728 Update the table of eliminables to reflect the changed state. 729 MEM_MODE is the mode of an enclosing MEM rtx, or VOIDmode if not 730 within a MEM. */ 731static void 732mark_not_eliminable (rtx x, machine_mode mem_mode) 733{ 734 enum rtx_code code = GET_CODE (x); 735 struct lra_elim_table *ep; 736 int i, j; 737 const char *fmt; 738 739 switch (code) 740 { 741 case PRE_INC: 742 case POST_INC: 743 case PRE_DEC: 744 case POST_DEC: 745 case POST_MODIFY: 746 case PRE_MODIFY: 747 if (XEXP (x, 0) == stack_pointer_rtx 748 && ((code != PRE_MODIFY && code != POST_MODIFY) 749 || (GET_CODE (XEXP (x, 1)) == PLUS 750 && XEXP (x, 0) == XEXP (XEXP (x, 1), 0) 751 && CONST_INT_P (XEXP (XEXP (x, 1), 1))))) 752 { 753 int size = GET_MODE_SIZE (mem_mode); 754 755#ifdef PUSH_ROUNDING 756 /* If more bytes than MEM_MODE are pushed, account for 757 them. */ 758 size = PUSH_ROUNDING (size); 759#endif 760 if (code == PRE_DEC || code == POST_DEC) 761 curr_sp_change -= size; 762 else if (code == PRE_INC || code == POST_INC) 763 curr_sp_change += size; 764 else if (code == PRE_MODIFY || code == POST_MODIFY) 765 curr_sp_change += INTVAL (XEXP (XEXP (x, 1), 1)); 766 } 767 else if (REG_P (XEXP (x, 0)) 768 && REGNO (XEXP (x, 0)) >= FIRST_PSEUDO_REGISTER) 769 { 770 /* If we modify the source of an elimination rule, disable 771 it. Do the same if it is the destination and not the 772 hard frame register. */ 773 for (ep = reg_eliminate; 774 ep < ®_eliminate[NUM_ELIMINABLE_REGS]; 775 ep++) 776 if (ep->from_rtx == XEXP (x, 0) 777 || (ep->to_rtx == XEXP (x, 0) 778 && ep->to_rtx != hard_frame_pointer_rtx)) 779 setup_can_eliminate (ep, false); 780 } 781 return; 782 783 case USE: 784 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER) 785 /* If using a hard register that is the source of an eliminate 786 we still think can be performed, note it cannot be 787 performed since we don't know how this hard register is 788 used. */ 789 for (ep = reg_eliminate; 790 ep < ®_eliminate[NUM_ELIMINABLE_REGS]; 791 ep++) 792 if (ep->from_rtx == XEXP (x, 0) 793 && ep->to_rtx != hard_frame_pointer_rtx) 794 setup_can_eliminate (ep, false); 795 return; 796 797 case CLOBBER: 798 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER) 799 /* If clobbering a hard register that is the replacement 800 register for an elimination we still think can be 801 performed, note that it cannot be performed. Otherwise, we 802 need not be concerned about it. */ 803 for (ep = reg_eliminate; 804 ep < ®_eliminate[NUM_ELIMINABLE_REGS]; 805 ep++) 806 if (ep->to_rtx == XEXP (x, 0) 807 && ep->to_rtx != hard_frame_pointer_rtx) 808 setup_can_eliminate (ep, false); 809 return; 810 811 case SET: 812 if (SET_DEST (x) == stack_pointer_rtx 813 && GET_CODE (SET_SRC (x)) == PLUS 814 && XEXP (SET_SRC (x), 0) == SET_DEST (x) 815 && CONST_INT_P (XEXP (SET_SRC (x), 1))) 816 { 817 curr_sp_change += INTVAL (XEXP (SET_SRC (x), 1)); 818 return; 819 } 820 if (! REG_P (SET_DEST (x)) 821 || REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER) 822 mark_not_eliminable (SET_DEST (x), mem_mode); 823 else 824 { 825 /* See if this is setting the replacement hard register for 826 an elimination. 827 828 If DEST is the hard frame pointer, we do nothing because 829 we assume that all assignments to the frame pointer are 830 for non-local gotos and are being done at a time when 831 they are valid and do not disturb anything else. Some 832 machines want to eliminate a fake argument pointer (or 833 even a fake frame pointer) with either the real frame 834 pointer or the stack pointer. Assignments to the hard 835 frame pointer must not prevent this elimination. */ 836 for (ep = reg_eliminate; 837 ep < ®_eliminate[NUM_ELIMINABLE_REGS]; 838 ep++) 839 if (ep->to_rtx == SET_DEST (x) 840 && SET_DEST (x) != hard_frame_pointer_rtx) 841 setup_can_eliminate (ep, false); 842 } 843 844 mark_not_eliminable (SET_SRC (x), mem_mode); 845 return; 846 847 case MEM: 848 /* Our only special processing is to pass the mode of the MEM to 849 our recursive call. */ 850 mark_not_eliminable (XEXP (x, 0), GET_MODE (x)); 851 return; 852 853 default: 854 break; 855 } 856 857 fmt = GET_RTX_FORMAT (code); 858 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++) 859 { 860 if (*fmt == 'e') 861 mark_not_eliminable (XEXP (x, i), mem_mode); 862 else if (*fmt == 'E') 863 for (j = 0; j < XVECLEN (x, i); j++) 864 mark_not_eliminable (XVECEXP (x, i, j), mem_mode); 865 } 866} 867 868 869 870#ifdef HARD_FRAME_POINTER_REGNUM 871 872/* Find offset equivalence note for reg WHAT in INSN and return the 873 found elmination offset. If the note is not found, return NULL. 874 Remove the found note. */ 875static rtx 876remove_reg_equal_offset_note (rtx insn, rtx what) 877{ 878 rtx link, *link_loc; 879 880 for (link_loc = ®_NOTES (insn); 881 (link = *link_loc) != NULL_RTX; 882 link_loc = &XEXP (link, 1)) 883 if (REG_NOTE_KIND (link) == REG_EQUAL 884 && GET_CODE (XEXP (link, 0)) == PLUS 885 && XEXP (XEXP (link, 0), 0) == what 886 && CONST_INT_P (XEXP (XEXP (link, 0), 1))) 887 { 888 *link_loc = XEXP (link, 1); 889 return XEXP (XEXP (link, 0), 1); 890 } 891 return NULL_RTX; 892} 893 894#endif 895 896/* Scan INSN and eliminate all eliminable hard registers in it. 897 898 If REPLACE_P is true, do the replacement destructively. Also 899 delete the insn as dead it if it is setting an eliminable register. 900 901 If REPLACE_P is false, just update the offsets while keeping the 902 base register the same. If FIRST_P, use the sp offset for 903 elimination to sp. Otherwise, use UPDATE_SP_OFFSET for this. If 904 UPDATE_SP_OFFSET is non-zero, don't use difference of the offset 905 and the previous offset. Attach the note about used elimination 906 for insns setting frame pointer to update elimination easy (without 907 parsing already generated elimination insns to find offset 908 previously used) in future. */ 909 910void 911eliminate_regs_in_insn (rtx_insn *insn, bool replace_p, bool first_p, 912 HOST_WIDE_INT update_sp_offset) 913{ 914 int icode = recog_memoized (insn); 915 rtx old_set = single_set (insn); 916 bool validate_p; 917 int i; 918 rtx substed_operand[MAX_RECOG_OPERANDS]; 919 rtx orig_operand[MAX_RECOG_OPERANDS]; 920 struct lra_elim_table *ep; 921 rtx plus_src, plus_cst_src; 922 lra_insn_recog_data_t id; 923 struct lra_static_insn_data *static_id; 924 925 if (icode < 0 && asm_noperands (PATTERN (insn)) < 0 && ! DEBUG_INSN_P (insn)) 926 { 927 lra_assert (GET_CODE (PATTERN (insn)) == USE 928 || GET_CODE (PATTERN (insn)) == CLOBBER 929 || GET_CODE (PATTERN (insn)) == ASM_INPUT); 930 return; 931 } 932 933 /* Check for setting an eliminable register. */ 934 if (old_set != 0 && REG_P (SET_DEST (old_set)) 935 && (ep = get_elimination (SET_DEST (old_set))) != NULL) 936 { 937 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 938 if (ep->from_rtx == SET_DEST (old_set) && ep->can_eliminate) 939 { 940 bool delete_p = replace_p; 941 942#ifdef HARD_FRAME_POINTER_REGNUM 943 if (ep->from == FRAME_POINTER_REGNUM 944 && ep->to == HARD_FRAME_POINTER_REGNUM) 945 /* If this is setting the frame pointer register to the 946 hardware frame pointer register and this is an 947 elimination that will be done (tested above), this 948 insn is really adjusting the frame pointer downward 949 to compensate for the adjustment done before a 950 nonlocal goto. */ 951 { 952 rtx src = SET_SRC (old_set); 953 rtx off = remove_reg_equal_offset_note (insn, ep->to_rtx); 954 955 /* We should never process such insn with non-zero 956 UPDATE_SP_OFFSET. */ 957 lra_assert (update_sp_offset == 0); 958 959 if (off != NULL_RTX 960 || src == ep->to_rtx 961 || (GET_CODE (src) == PLUS 962 && XEXP (src, 0) == ep->to_rtx 963 && CONST_INT_P (XEXP (src, 1)))) 964 { 965 HOST_WIDE_INT offset; 966 967 if (replace_p) 968 { 969 SET_DEST (old_set) = ep->to_rtx; 970 lra_update_insn_recog_data (insn); 971 return; 972 } 973 offset = (off != NULL_RTX ? INTVAL (off) 974 : src == ep->to_rtx ? 0 : INTVAL (XEXP (src, 1))); 975 offset -= (ep->offset - ep->previous_offset); 976 src = plus_constant (Pmode, ep->to_rtx, offset); 977 978 /* First see if this insn remains valid when we 979 make the change. If not, keep the INSN_CODE 980 the same and let the constraint pass fit it 981 up. */ 982 validate_change (insn, &SET_SRC (old_set), src, 1); 983 validate_change (insn, &SET_DEST (old_set), 984 ep->from_rtx, 1); 985 if (! apply_change_group ()) 986 { 987 SET_SRC (old_set) = src; 988 SET_DEST (old_set) = ep->from_rtx; 989 } 990 lra_update_insn_recog_data (insn); 991 /* Add offset note for future updates. */ 992 add_reg_note (insn, REG_EQUAL, src); 993 return; 994 } 995 } 996#endif 997 998 /* This insn isn't serving a useful purpose. We delete it 999 when REPLACE is set. */ 1000 if (delete_p) 1001 lra_delete_dead_insn (insn); 1002 return; 1003 } 1004 } 1005 1006 /* We allow one special case which happens to work on all machines we 1007 currently support: a single set with the source or a REG_EQUAL 1008 note being a PLUS of an eliminable register and a constant. */ 1009 plus_src = plus_cst_src = 0; 1010 if (old_set && REG_P (SET_DEST (old_set))) 1011 { 1012 if (GET_CODE (SET_SRC (old_set)) == PLUS) 1013 plus_src = SET_SRC (old_set); 1014 /* First see if the source is of the form (plus (...) CST). */ 1015 if (plus_src 1016 && CONST_INT_P (XEXP (plus_src, 1))) 1017 plus_cst_src = plus_src; 1018 /* Check that the first operand of the PLUS is a hard reg or 1019 the lowpart subreg of one. */ 1020 if (plus_cst_src) 1021 { 1022 rtx reg = XEXP (plus_cst_src, 0); 1023 1024 if (GET_CODE (reg) == SUBREG && subreg_lowpart_p (reg)) 1025 reg = SUBREG_REG (reg); 1026 1027 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER) 1028 plus_cst_src = 0; 1029 } 1030 } 1031 if (plus_cst_src) 1032 { 1033 rtx reg = XEXP (plus_cst_src, 0); 1034 HOST_WIDE_INT offset = INTVAL (XEXP (plus_cst_src, 1)); 1035 1036 if (GET_CODE (reg) == SUBREG) 1037 reg = SUBREG_REG (reg); 1038 1039 if (REG_P (reg) && (ep = get_elimination (reg)) != NULL) 1040 { 1041 rtx to_rtx = replace_p ? ep->to_rtx : ep->from_rtx; 1042 1043 if (! replace_p) 1044 { 1045 if (update_sp_offset == 0) 1046 offset += (ep->offset - ep->previous_offset); 1047 if (ep->to_rtx == stack_pointer_rtx) 1048 { 1049 if (first_p) 1050 offset -= lra_get_insn_recog_data (insn)->sp_offset; 1051 else 1052 offset += update_sp_offset; 1053 } 1054 offset = trunc_int_for_mode (offset, GET_MODE (plus_cst_src)); 1055 } 1056 1057 if (GET_CODE (XEXP (plus_cst_src, 0)) == SUBREG) 1058 to_rtx = gen_lowpart (GET_MODE (XEXP (plus_cst_src, 0)), to_rtx); 1059 /* If we have a nonzero offset, and the source is already a 1060 simple REG, the following transformation would increase 1061 the cost of the insn by replacing a simple REG with (plus 1062 (reg sp) CST). So try only when we already had a PLUS 1063 before. */ 1064 if (offset == 0 || plus_src) 1065 { 1066 rtx new_src = plus_constant (GET_MODE (to_rtx), to_rtx, offset); 1067 1068 old_set = single_set (insn); 1069 1070 /* First see if this insn remains valid when we make the 1071 change. If not, try to replace the whole pattern 1072 with a simple set (this may help if the original insn 1073 was a PARALLEL that was only recognized as single_set 1074 due to REG_UNUSED notes). If this isn't valid 1075 either, keep the INSN_CODE the same and let the 1076 constraint pass fix it up. */ 1077 if (! validate_change (insn, &SET_SRC (old_set), new_src, 0)) 1078 { 1079 rtx new_pat = gen_rtx_SET (VOIDmode, 1080 SET_DEST (old_set), new_src); 1081 1082 if (! validate_change (insn, &PATTERN (insn), new_pat, 0)) 1083 SET_SRC (old_set) = new_src; 1084 } 1085 lra_update_insn_recog_data (insn); 1086 /* This can't have an effect on elimination offsets, so skip 1087 right to the end. */ 1088 return; 1089 } 1090 } 1091 } 1092 1093 /* Eliminate all eliminable registers occurring in operands that 1094 can be handled by the constraint pass. */ 1095 id = lra_get_insn_recog_data (insn); 1096 static_id = id->insn_static_data; 1097 validate_p = false; 1098 for (i = 0; i < static_id->n_operands; i++) 1099 { 1100 orig_operand[i] = *id->operand_loc[i]; 1101 substed_operand[i] = *id->operand_loc[i]; 1102 1103 /* For an asm statement, every operand is eliminable. */ 1104 if (icode < 0 || insn_data[icode].operand[i].eliminable) 1105 { 1106 /* Check for setting a hard register that we know about. */ 1107 if (static_id->operand[i].type != OP_IN 1108 && REG_P (orig_operand[i])) 1109 { 1110 /* If we are assigning to a hard register that can be 1111 eliminated, it must be as part of a PARALLEL, since 1112 the code above handles single SETs. This reg can not 1113 be longer eliminated -- it is forced by 1114 mark_not_eliminable. */ 1115 for (ep = reg_eliminate; 1116 ep < ®_eliminate[NUM_ELIMINABLE_REGS]; 1117 ep++) 1118 lra_assert (ep->from_rtx != orig_operand[i] 1119 || ! ep->can_eliminate); 1120 } 1121 1122 /* Companion to the above plus substitution, we can allow 1123 invariants as the source of a plain move. */ 1124 substed_operand[i] 1125 = lra_eliminate_regs_1 (insn, *id->operand_loc[i], VOIDmode, 1126 replace_p, ! replace_p && ! first_p, 1127 update_sp_offset, first_p); 1128 if (substed_operand[i] != orig_operand[i]) 1129 validate_p = true; 1130 } 1131 } 1132 1133 if (! validate_p) 1134 return; 1135 1136 /* Substitute the operands; the new values are in the substed_operand 1137 array. */ 1138 for (i = 0; i < static_id->n_operands; i++) 1139 *id->operand_loc[i] = substed_operand[i]; 1140 for (i = 0; i < static_id->n_dups; i++) 1141 *id->dup_loc[i] = substed_operand[(int) static_id->dup_num[i]]; 1142 1143 /* If we had a move insn but now we don't, re-recognize it. 1144 This will cause spurious re-recognition if the old move had a 1145 PARALLEL since the new one still will, but we can't call 1146 single_set without having put new body into the insn and the 1147 re-recognition won't hurt in this rare case. */ 1148 id = lra_update_insn_recog_data (insn); 1149 static_id = id->insn_static_data; 1150} 1151 1152/* Spill pseudos which are assigned to hard registers in SET. Add 1153 affected insns for processing in the subsequent constraint 1154 pass. */ 1155static void 1156spill_pseudos (HARD_REG_SET set) 1157{ 1158 int i; 1159 bitmap_head to_process; 1160 rtx_insn *insn; 1161 1162 if (hard_reg_set_empty_p (set)) 1163 return; 1164 if (lra_dump_file != NULL) 1165 { 1166 fprintf (lra_dump_file, " Spilling non-eliminable hard regs:"); 1167 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 1168 if (TEST_HARD_REG_BIT (set, i)) 1169 fprintf (lra_dump_file, " %d", i); 1170 fprintf (lra_dump_file, "\n"); 1171 } 1172 bitmap_initialize (&to_process, ®_obstack); 1173 for (i = FIRST_PSEUDO_REGISTER; i < max_reg_num (); i++) 1174 if (lra_reg_info[i].nrefs != 0 && reg_renumber[i] >= 0 1175 && overlaps_hard_reg_set_p (set, 1176 PSEUDO_REGNO_MODE (i), reg_renumber[i])) 1177 { 1178 if (lra_dump_file != NULL) 1179 fprintf (lra_dump_file, " Spilling r%d(%d)\n", 1180 i, reg_renumber[i]); 1181 reg_renumber[i] = -1; 1182 bitmap_ior_into (&to_process, &lra_reg_info[i].insn_bitmap); 1183 } 1184 IOR_HARD_REG_SET (lra_no_alloc_regs, set); 1185 for (insn = get_insns (); insn != NULL_RTX; insn = NEXT_INSN (insn)) 1186 if (bitmap_bit_p (&to_process, INSN_UID (insn))) 1187 { 1188 lra_push_insn (insn); 1189 lra_set_used_insn_alternative (insn, -1); 1190 } 1191 bitmap_clear (&to_process); 1192} 1193 1194/* Update all offsets and possibility for elimination on eliminable 1195 registers. Spill pseudos assigned to registers which are 1196 uneliminable, update LRA_NO_ALLOC_REGS and ELIMINABLE_REG_SET. Add 1197 insns to INSNS_WITH_CHANGED_OFFSETS containing eliminable hard 1198 registers whose offsets should be changed. Return true if any 1199 elimination offset changed. */ 1200static bool 1201update_reg_eliminate (bitmap insns_with_changed_offsets) 1202{ 1203 bool prev, result; 1204 struct lra_elim_table *ep, *ep1; 1205 HARD_REG_SET temp_hard_reg_set; 1206 1207 /* Clear self elimination offsets. */ 1208 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 1209 self_elim_offsets[ep->from] = 0; 1210 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 1211 { 1212 /* If it is a currently used elimination: update the previous 1213 offset. */ 1214 if (elimination_map[ep->from] == ep) 1215 ep->previous_offset = ep->offset; 1216 1217 prev = ep->prev_can_eliminate; 1218 setup_can_eliminate (ep, targetm.can_eliminate (ep->from, ep->to)); 1219 if (ep->can_eliminate && ! prev) 1220 { 1221 /* It is possible that not eliminable register becomes 1222 eliminable because we took other reasons into account to 1223 set up eliminable regs in the initial set up. Just 1224 ignore new eliminable registers. */ 1225 setup_can_eliminate (ep, false); 1226 continue; 1227 } 1228 if (ep->can_eliminate != prev && elimination_map[ep->from] == ep) 1229 { 1230 /* We cannot use this elimination anymore -- find another 1231 one. */ 1232 if (lra_dump_file != NULL) 1233 fprintf (lra_dump_file, 1234 " Elimination %d to %d is not possible anymore\n", 1235 ep->from, ep->to); 1236 /* If after processing RTL we decides that SP can be used as 1237 a result of elimination, it can not be changed. */ 1238 gcc_assert ((ep->to_rtx != stack_pointer_rtx) 1239 || (ep->from < FIRST_PSEUDO_REGISTER 1240 && fixed_regs [ep->from])); 1241 /* Mark that is not eliminable anymore. */ 1242 elimination_map[ep->from] = NULL; 1243 for (ep1 = ep + 1; ep1 < ®_eliminate[NUM_ELIMINABLE_REGS]; ep1++) 1244 if (ep1->can_eliminate && ep1->from == ep->from) 1245 break; 1246 if (ep1 < ®_eliminate[NUM_ELIMINABLE_REGS]) 1247 { 1248 if (lra_dump_file != NULL) 1249 fprintf (lra_dump_file, " Using elimination %d to %d now\n", 1250 ep1->from, ep1->to); 1251 lra_assert (ep1->previous_offset == 0); 1252 ep1->previous_offset = ep->offset; 1253 } 1254 else 1255 { 1256 /* There is no elimination anymore just use the hard 1257 register `from' itself. Setup self elimination 1258 offset to restore the original offset values. */ 1259 if (lra_dump_file != NULL) 1260 fprintf (lra_dump_file, " %d is not eliminable at all\n", 1261 ep->from); 1262 self_elim_offsets[ep->from] = -ep->offset; 1263 if (ep->offset != 0) 1264 bitmap_ior_into (insns_with_changed_offsets, 1265 &lra_reg_info[ep->from].insn_bitmap); 1266 } 1267 } 1268 1269#ifdef ELIMINABLE_REGS 1270 INITIAL_ELIMINATION_OFFSET (ep->from, ep->to, ep->offset); 1271#else 1272 INITIAL_FRAME_POINTER_OFFSET (ep->offset); 1273#endif 1274 } 1275 setup_elimination_map (); 1276 result = false; 1277 CLEAR_HARD_REG_SET (temp_hard_reg_set); 1278 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 1279 if (elimination_map[ep->from] == NULL) 1280 SET_HARD_REG_BIT (temp_hard_reg_set, ep->from); 1281 else if (elimination_map[ep->from] == ep) 1282 { 1283 /* Prevent the hard register into which we eliminate from 1284 the usage for pseudos. */ 1285 if (ep->from != ep->to) 1286 SET_HARD_REG_BIT (temp_hard_reg_set, ep->to); 1287 if (ep->previous_offset != ep->offset) 1288 { 1289 bitmap_ior_into (insns_with_changed_offsets, 1290 &lra_reg_info[ep->from].insn_bitmap); 1291 1292 /* Update offset when the eliminate offset have been 1293 changed. */ 1294 lra_update_reg_val_offset (lra_reg_info[ep->from].val, 1295 ep->offset - ep->previous_offset); 1296 result = true; 1297 } 1298 } 1299 IOR_HARD_REG_SET (lra_no_alloc_regs, temp_hard_reg_set); 1300 AND_COMPL_HARD_REG_SET (eliminable_regset, temp_hard_reg_set); 1301 spill_pseudos (temp_hard_reg_set); 1302 return result; 1303} 1304 1305/* Initialize the table of hard registers to eliminate. 1306 Pre-condition: global flag frame_pointer_needed has been set before 1307 calling this function. */ 1308static void 1309init_elim_table (void) 1310{ 1311 struct lra_elim_table *ep; 1312#ifdef ELIMINABLE_REGS 1313 bool value_p; 1314 const struct elim_table_1 *ep1; 1315#endif 1316 1317 if (!reg_eliminate) 1318 reg_eliminate = XCNEWVEC (struct lra_elim_table, NUM_ELIMINABLE_REGS); 1319 1320 memset (self_elim_offsets, 0, sizeof (self_elim_offsets)); 1321 /* Initiate member values which will be never changed. */ 1322 self_elim_table.can_eliminate = self_elim_table.prev_can_eliminate = true; 1323 self_elim_table.previous_offset = 0; 1324#ifdef ELIMINABLE_REGS 1325 for (ep = reg_eliminate, ep1 = reg_eliminate_1; 1326 ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++, ep1++) 1327 { 1328 ep->offset = ep->previous_offset = 0; 1329 ep->from = ep1->from; 1330 ep->to = ep1->to; 1331 value_p = (targetm.can_eliminate (ep->from, ep->to) 1332 && ! (ep->to == STACK_POINTER_REGNUM 1333 && frame_pointer_needed 1334 && (! SUPPORTS_STACK_ALIGNMENT 1335 || ! stack_realign_fp))); 1336 setup_can_eliminate (ep, value_p); 1337 } 1338#else 1339 reg_eliminate[0].offset = reg_eliminate[0].previous_offset = 0; 1340 reg_eliminate[0].from = reg_eliminate_1[0].from; 1341 reg_eliminate[0].to = reg_eliminate_1[0].to; 1342 setup_can_eliminate (®_eliminate[0], ! frame_pointer_needed); 1343#endif 1344 1345 /* Build the FROM and TO REG rtx's. Note that code in gen_rtx_REG 1346 will cause, e.g., gen_rtx_REG (Pmode, STACK_POINTER_REGNUM) to 1347 equal stack_pointer_rtx. We depend on this. Threfore we switch 1348 off that we are in LRA temporarily. */ 1349 lra_in_progress = 0; 1350 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 1351 { 1352 ep->from_rtx = gen_rtx_REG (Pmode, ep->from); 1353 ep->to_rtx = gen_rtx_REG (Pmode, ep->to); 1354 eliminable_reg_rtx[ep->from] = ep->from_rtx; 1355 } 1356 lra_in_progress = 1; 1357} 1358 1359/* Function for initialization of elimination once per function. It 1360 sets up sp offset for each insn. */ 1361static void 1362init_elimination (void) 1363{ 1364 bool stop_to_sp_elimination_p; 1365 basic_block bb; 1366 rtx_insn *insn; 1367 struct lra_elim_table *ep; 1368 1369 init_elim_table (); 1370 FOR_EACH_BB_FN (bb, cfun) 1371 { 1372 curr_sp_change = 0; 1373 stop_to_sp_elimination_p = false; 1374 FOR_BB_INSNS (bb, insn) 1375 if (INSN_P (insn)) 1376 { 1377 lra_get_insn_recog_data (insn)->sp_offset = curr_sp_change; 1378 if (NONDEBUG_INSN_P (insn)) 1379 { 1380 mark_not_eliminable (PATTERN (insn), VOIDmode); 1381 if (curr_sp_change != 0 1382 && find_reg_note (insn, REG_LABEL_OPERAND, NULL_RTX)) 1383 stop_to_sp_elimination_p = true; 1384 } 1385 } 1386 if (! frame_pointer_needed 1387 && (curr_sp_change != 0 || stop_to_sp_elimination_p) 1388 && bb->succs && bb->succs->length () != 0) 1389 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 1390 if (ep->to == STACK_POINTER_REGNUM) 1391 setup_can_eliminate (ep, false); 1392 } 1393 setup_elimination_map (); 1394} 1395 1396/* Eliminate hard reg given by its location LOC. */ 1397void 1398lra_eliminate_reg_if_possible (rtx *loc) 1399{ 1400 int regno; 1401 struct lra_elim_table *ep; 1402 1403 lra_assert (REG_P (*loc)); 1404 if ((regno = REGNO (*loc)) >= FIRST_PSEUDO_REGISTER 1405 || ! TEST_HARD_REG_BIT (lra_no_alloc_regs, regno)) 1406 return; 1407 if ((ep = get_elimination (*loc)) != NULL) 1408 *loc = ep->to_rtx; 1409} 1410 1411/* Do (final if FINAL_P or first if FIRST_P) elimination in INSN. Add 1412 the insn for subsequent processing in the constraint pass, update 1413 the insn info. */ 1414static void 1415process_insn_for_elimination (rtx_insn *insn, bool final_p, bool first_p) 1416{ 1417 eliminate_regs_in_insn (insn, final_p, first_p, 0); 1418 if (! final_p) 1419 { 1420 /* Check that insn changed its code. This is a case when a move 1421 insn becomes an add insn and we do not want to process the 1422 insn as a move anymore. */ 1423 int icode = recog (PATTERN (insn), insn, 0); 1424 1425 if (icode >= 0 && icode != INSN_CODE (insn)) 1426 { 1427 INSN_CODE (insn) = icode; 1428 lra_update_insn_recog_data (insn); 1429 } 1430 lra_update_insn_regno_info (insn); 1431 lra_push_insn (insn); 1432 lra_set_used_insn_alternative (insn, -1); 1433 } 1434} 1435 1436/* Entry function to do final elimination if FINAL_P or to update 1437 elimination register offsets (FIRST_P if we are doing it the first 1438 time). */ 1439void 1440lra_eliminate (bool final_p, bool first_p) 1441{ 1442 unsigned int uid; 1443 bitmap_head insns_with_changed_offsets; 1444 bitmap_iterator bi; 1445 struct lra_elim_table *ep; 1446 1447 gcc_assert (! final_p || ! first_p); 1448 1449 timevar_push (TV_LRA_ELIMINATE); 1450 1451 if (first_p) 1452 init_elimination (); 1453 1454 bitmap_initialize (&insns_with_changed_offsets, ®_obstack); 1455 if (final_p) 1456 { 1457#ifdef ENABLE_CHECKING 1458 update_reg_eliminate (&insns_with_changed_offsets); 1459 if (! bitmap_empty_p (&insns_with_changed_offsets)) 1460 gcc_unreachable (); 1461#endif 1462 /* We change eliminable hard registers in insns so we should do 1463 this for all insns containing any eliminable hard 1464 register. */ 1465 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++) 1466 if (elimination_map[ep->from] != NULL) 1467 bitmap_ior_into (&insns_with_changed_offsets, 1468 &lra_reg_info[ep->from].insn_bitmap); 1469 } 1470 else if (! update_reg_eliminate (&insns_with_changed_offsets)) 1471 goto lra_eliminate_done; 1472 if (lra_dump_file != NULL) 1473 { 1474 fprintf (lra_dump_file, "New elimination table:\n"); 1475 print_elim_table (lra_dump_file); 1476 } 1477 EXECUTE_IF_SET_IN_BITMAP (&insns_with_changed_offsets, 0, uid, bi) 1478 /* A dead insn can be deleted in process_insn_for_elimination. */ 1479 if (lra_insn_recog_data[uid] != NULL) 1480 process_insn_for_elimination (lra_insn_recog_data[uid]->insn, 1481 final_p, first_p); 1482 bitmap_clear (&insns_with_changed_offsets); 1483 1484lra_eliminate_done: 1485 timevar_pop (TV_LRA_ELIMINATE); 1486} 1487