1;; VR5000 pipeline description.
2;;   Copyright (C) 2004-2015 Free Software Foundation, Inc.
3;;
4;; This file is part of GCC.
5
6;; GCC is free software; you can redistribute it and/or modify it
7;; under the terms of the GNU General Public License as published
8;; by the Free Software Foundation; either version 3, or (at your
9;; option) any later version.
10
11;; GCC is distributed in the hope that it will be useful, but WITHOUT
12;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
14;; License for more details.
15
16;; You should have received a copy of the GNU General Public License
17;; along with GCC; see the file COPYING3.  If not see
18;; <http://www.gnu.org/licenses/>.
19
20
21;; This file overrides parts of generic.md.  It is derived from the
22;; old define_function_unit description.
23
24(define_insn_reservation "r5k_load" 2
25  (and (eq_attr "cpu" "r5000")
26       (eq_attr "type" "load,fpload,fpidxload,mfc,mtc"))
27  "alu")
28
29(define_insn_reservation "r5k_imul_si" 5
30  (and (eq_attr "cpu" "r5000")
31       (and (eq_attr "type" "imul,imul3,imadd")
32	    (eq_attr "mode" "SI")))
33  "imuldiv*5")
34
35(define_insn_reservation "r5k_imul_di" 9
36  (and (eq_attr "cpu" "r5000")
37       (and (eq_attr "type" "imul,imul3,imadd")
38	    (eq_attr "mode" "DI")))
39  "imuldiv*9")
40
41(define_insn_reservation "r5k_idiv_si" 36
42  (and (eq_attr "cpu" "r5000")
43       (and (eq_attr "type" "idiv")
44	    (eq_attr "mode" "SI")))
45  "imuldiv*36")
46
47(define_insn_reservation "r5k_idiv_di" 68
48  (and (eq_attr "cpu" "r5000")
49       (and (eq_attr "type" "idiv")
50	    (eq_attr "mode" "DI")))
51  "imuldiv*68")
52
53(define_insn_reservation "r5k_fmove" 1
54  (and (eq_attr "cpu" "r5000")
55       (eq_attr "type" "fcmp,fabs,fneg,fmove"))
56  "alu")
57
58(define_insn_reservation "r5k_fmul_single" 4
59  (and (eq_attr "cpu" "r5000")
60       (and (eq_attr "type" "fmul,fmadd")
61	    (eq_attr "mode" "SF")))
62  "alu")
63
64(define_insn_reservation "r5k_fmul_double" 5
65  (and (eq_attr "cpu" "r5000")
66       (and (eq_attr "type" "fmul,fmadd")
67	    (eq_attr "mode" "DF")))
68  "alu")
69
70(define_insn_reservation "r5k_fdiv_single" 21
71  (and (eq_attr "cpu" "r5000")
72       (and (eq_attr "type" "fdiv,frdiv,fsqrt,frsqrt")
73	    (eq_attr "mode" "SF")))
74  "alu")
75
76(define_insn_reservation "r5k_fsqrt_double" 36
77  (and (eq_attr "cpu" "r5000")
78       (and (eq_attr "type" "fsqrt,frsqrt")
79	    (eq_attr "mode" "DF")))
80  "alu")
81