1;; Machine Description for shared bits common to IWMMXT and Neon.
2;; Copyright (C) 2006-2015 Free Software Foundation, Inc.
3;; Written by CodeSourcery.
4;;
5;; This file is part of GCC.
6;;
7;; GCC is free software; you can redistribute it and/or modify it
8;; under the terms of the GNU General Public License as published by
9;; the Free Software Foundation; either version 3, or (at your option)
10;; any later version.
11;;
12;; GCC is distributed in the hope that it will be useful, but
13;; WITHOUT ANY WARRANTY; without even the implied warranty of
14;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15;; General Public License for more details.
16;;
17;; You should have received a copy of the GNU General Public License
18;; along with GCC; see the file COPYING3.  If not see
19;; <http://www.gnu.org/licenses/>.
20
21;; Vector Moves
22
23(define_expand "mov<mode>"
24  [(set (match_operand:VALL 0 "nonimmediate_operand" "")
25	(match_operand:VALL 1 "general_operand" ""))]
26  "TARGET_NEON
27   || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
28{
29  if (can_create_pseudo_p ())
30    {
31      if (!REG_P (operands[0]))
32	operands[1] = force_reg (<MODE>mode, operands[1]);
33      else if (TARGET_NEON && CONSTANT_P (operands[1]))
34	{
35	  operands[1] = neon_make_constant (operands[1]);
36	  gcc_assert (operands[1] != NULL_RTX);
37	}
38    }
39})
40
41;; Vector arithmetic. Expanders are blank, then unnamed insns implement
42;; patterns separately for IWMMXT and Neon.
43
44(define_expand "add<mode>3"
45  [(set (match_operand:VALL 0 "s_register_operand" "")
46        (plus:VALL (match_operand:VALL 1 "s_register_operand" "")
47                   (match_operand:VALL 2 "s_register_operand" "")))]
48  "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode)
49		    || flag_unsafe_math_optimizations))
50   || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
51{
52})
53
54(define_expand "sub<mode>3"
55  [(set (match_operand:VALL 0 "s_register_operand" "")
56        (minus:VALL (match_operand:VALL 1 "s_register_operand" "")
57                    (match_operand:VALL 2 "s_register_operand" "")))]
58  "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode)
59		    || flag_unsafe_math_optimizations))
60   || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
61{
62})
63
64(define_expand "mul<mode>3"
65  [(set (match_operand:VALLW 0 "s_register_operand" "")
66        (mult:VALLW (match_operand:VALLW 1 "s_register_operand" "")
67		    (match_operand:VALLW 2 "s_register_operand" "")))]
68  "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode)
69		    || flag_unsafe_math_optimizations))
70   || (<MODE>mode == V4HImode && TARGET_REALLY_IWMMXT)"
71{
72})
73
74(define_expand "smin<mode>3"
75  [(set (match_operand:VALLW 0 "s_register_operand" "")
76	(smin:VALLW (match_operand:VALLW 1 "s_register_operand" "")
77		    (match_operand:VALLW 2 "s_register_operand" "")))]
78  "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode)
79		    || flag_unsafe_math_optimizations))
80   || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
81{
82})
83
84(define_expand "umin<mode>3"
85  [(set (match_operand:VINTW 0 "s_register_operand" "")
86	(umin:VINTW (match_operand:VINTW 1 "s_register_operand" "")
87		    (match_operand:VINTW 2 "s_register_operand" "")))]
88  "TARGET_NEON
89   || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
90{
91})
92
93(define_expand "smax<mode>3"
94  [(set (match_operand:VALLW 0 "s_register_operand" "")
95	(smax:VALLW (match_operand:VALLW 1 "s_register_operand" "")
96		    (match_operand:VALLW 2 "s_register_operand" "")))]
97  "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode)
98		    || flag_unsafe_math_optimizations))
99   || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
100{
101})
102
103(define_expand "umax<mode>3"
104  [(set (match_operand:VINTW 0 "s_register_operand" "")
105	(umax:VINTW (match_operand:VINTW 1 "s_register_operand" "")
106		    (match_operand:VINTW 2 "s_register_operand" "")))]
107  "TARGET_NEON
108   || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
109{
110})
111
112(define_expand "vec_perm_const<mode>"
113  [(match_operand:VALL 0 "s_register_operand" "")
114   (match_operand:VALL 1 "s_register_operand" "")
115   (match_operand:VALL 2 "s_register_operand" "")
116   (match_operand:<V_cmp_result> 3 "" "")]
117  "TARGET_NEON
118   || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
119{
120  if (arm_expand_vec_perm_const (operands[0], operands[1],
121				 operands[2], operands[3]))
122    DONE;
123  else
124    FAIL;
125})
126
127(define_expand "vec_perm<mode>"
128  [(match_operand:VE 0 "s_register_operand" "")
129   (match_operand:VE 1 "s_register_operand" "")
130   (match_operand:VE 2 "s_register_operand" "")
131   (match_operand:VE 3 "s_register_operand" "")]
132  "TARGET_NEON && !BYTES_BIG_ENDIAN"
133{
134  arm_expand_vec_perm (operands[0], operands[1], operands[2], operands[3]);
135  DONE;
136})
137