1#objdump: -dr --prefix-addresses --show-raw-insn 2#name: MIPS PREF instruction 3#as: -32 --defsym micromips=1 --defsym tpref=1 4#source: cache.s 5 6# Check MIPS PREF instruction assembly (microMIPS). 7 8.*: +file format .*mips.* 9 10Disassembly of section \.text: 11[0-9a-f]+ <[^>]*> 60a2 27ff pref 0x5,2047\(v0\) 12[0-9a-f]+ <[^>]*> 60a3 2800 pref 0x5,-2048\(v1\) 13[0-9a-f]+ <[^>]*> 3024 0800 addiu at,a0,2048 14[0-9a-f]+ <[^>]*> 60a1 2000 pref 0x5,0\(at\) 15[0-9a-f]+ <[^>]*> 3025 f7ff addiu at,a1,-2049 16[0-9a-f]+ <[^>]*> 60a1 2000 pref 0x5,0\(at\) 17[0-9a-f]+ <[^>]*> 3026 7fff addiu at,a2,32767 18[0-9a-f]+ <[^>]*> 60a1 2000 pref 0x5,0\(at\) 19[0-9a-f]+ <[^>]*> 3027 8000 addiu at,a3,-32768 20[0-9a-f]+ <[^>]*> 60a1 2000 pref 0x5,0\(at\) 21[0-9a-f]+ <[^>]*> 5020 8000 li at,0x8000 22[0-9a-f]+ <[^>]*> 0101 0950 addu at,at,t0 23[0-9a-f]+ <[^>]*> 60a1 2000 pref 0x5,0\(at\) 24[0-9a-f]+ <[^>]*> 3020 8000 li at,-32768 25[0-9a-f]+ <[^>]*> 0121 0950 addu at,at,t1 26[0-9a-f]+ <[^>]*> 60a1 2fff pref 0x5,-1\(at\) 27[0-9a-f]+ <[^>]*> 5020 9000 li at,0x9000 28[0-9a-f]+ <[^>]*> 0141 0950 addu at,at,t2 29[0-9a-f]+ <[^>]*> 60a1 2000 pref 0x5,0\(at\) 30[0-9a-f]+ <[^>]*> 41a1 ffff lui at,0xffff 31[0-9a-f]+ <[^>]*> 5021 7000 ori at,at,0x7000 32[0-9a-f]+ <[^>]*> 0161 0950 addu at,at,t3 33[0-9a-f]+ <[^>]*> 60a1 2fff pref 0x5,-1\(at\) 34 \.\.\. 35