1#objdump: -dr --prefix-addresses --show-raw-insn
2#name: MIPS DSP ASE for MIPS32
3#as: -mdsp -32
4#source: mips32-dsp.s
5
6# Check MIPS DSP ASE for MIPS32 Instruction Assembly (microMIPS)
7
8.*: +file format .*mips.*
9
10Disassembly of section \.text:
110+0000 <[^>]*> 0041 000d 	addq\.ph	zero,at,v0
120+0004 <[^>]*> 0062 0c0d 	addq_s\.ph	at,v0,v1
130+0008 <[^>]*> 0083 1305 	addq_s\.w	v0,v1,a0
140+000c <[^>]*> 00a4 18cd 	addu\.qb	v1,a0,a1
150+0010 <[^>]*> 00c5 24cd 	addu_s\.qb	a0,a1,a2
160+0014 <[^>]*> 00e6 2a0d 	subq\.ph	a1,a2,a3
170+0018 <[^>]*> 0107 360d 	subq_s\.ph	a2,a3,t0
180+001c <[^>]*> 0128 3b45 	subq_s\.w	a3,t0,t1
190+0020 <[^>]*> 0149 42cd 	subu\.qb	t0,t1,t2
200+0024 <[^>]*> 016a 4ecd 	subu_s\.qb	t1,t2,t3
210+0028 <[^>]*> 018b 5385 	addsc	t2,t3,t4
220+002c <[^>]*> 01ac 5bc5 	addwc	t3,t4,t5
230+0030 <[^>]*> 01cd 6295 	modsub	t4,t5,t6
240+0034 <[^>]*> 01ae f13c 	raddu\.w\.qb	t5,t6
250+0038 <[^>]*> 01cf 113c 	absq_s\.ph	t6,t7
260+003c <[^>]*> 01f0 213c 	absq_s\.w	t7,s0
270+0040 <[^>]*> 0251 80ad 	precrq\.qb\.ph	s0,s1,s2
280+0044 <[^>]*> 0272 88ed 	precrq\.ph\.w	s1,s2,s3
290+0048 <[^>]*> 0293 912d 	precrq_rs\.ph\.w	s2,s3,s4
300+004c <[^>]*> 02b4 996d 	precrqu_s\.qb\.ph	s3,s4,s5
310+0050 <[^>]*> 0295 513c 	preceq\.w\.phl	s4,s5
320+0054 <[^>]*> 02b6 613c 	preceq\.w\.phr	s5,s6
330+0058 <[^>]*> 02d7 713c 	precequ\.ph\.qbl	s6,s7
340+005c <[^>]*> 02f8 913c 	precequ\.ph\.qbr	s7,t8
350+0060 <[^>]*> 0319 733c 	precequ\.ph\.qbla	t8,t9
360+0064 <[^>]*> 033a 933c 	precequ\.ph\.qbra	t9,k0
370+0068 <[^>]*> 035b b13c 	preceu\.ph\.qbl	k0,k1
380+006c <[^>]*> 037c d13c 	preceu\.ph\.qbr	k1,gp
390+0070 <[^>]*> 039d b33c 	preceu\.ph\.qbla	gp,sp
400+0074 <[^>]*> 03be d33c 	preceu\.ph\.qbra	sp,s8
410+0078 <[^>]*> 03df 087c 	shll\.qb	s8,ra,0x0
420+007c <[^>]*> 03df e87c 	shll\.qb	s8,ra,0x7
430+0080 <[^>]*> 0001 fb95 	shllv\.qb	ra,zero,at
440+0084 <[^>]*> 0001 03b5 	shll\.ph	zero,at,0x0
450+0088 <[^>]*> 0001 f3b5 	shll\.ph	zero,at,0xf
460+008c <[^>]*> 0043 0b8d 	shllv\.ph	at,v0,v1
470+0090 <[^>]*> 0043 0bb5 	shll_s\.ph	v0,v1,0x0
480+0094 <[^>]*> 0043 fbb5 	shll_s\.ph	v0,v1,0xf
490+0098 <[^>]*> 0085 1f8d 	shllv_s\.ph	v1,a0,a1
500+009c <[^>]*> 0085 03f5 	shll_s\.w	a0,a1,0x0
510+00a0 <[^>]*> 0085 fbf5 	shll_s\.w	a0,a1,0x1f
520+00a4 <[^>]*> 00c7 2bd5 	shllv_s\.w	a1,a2,a3
530+00a8 <[^>]*> 00c7 187c 	shrl\.qb	a2,a3,0x0
540+00ac <[^>]*> 00c7 f87c 	shrl\.qb	a2,a3,0x7
550+00b0 <[^>]*> 0109 3b55 	shrlv\.qb	a3,t0,t1
560+00b4 <[^>]*> 0109 0335 	shra\.ph	t0,t1,0x0
570+00b8 <[^>]*> 0109 f335 	shra\.ph	t0,t1,0xf
580+00bc <[^>]*> 014b 498d 	shrav\.ph	t1,t2,t3
590+00c0 <[^>]*> 014b 0735 	shra_r\.ph	t2,t3,0x0
600+00c4 <[^>]*> 014b f735 	shra_r\.ph	t2,t3,0xf
610+00c8 <[^>]*> 018d 5d8d 	shrav_r\.ph	t3,t4,t5
620+00cc <[^>]*> 018d 02f5 	shra_r\.w	t4,t5,0x0
630+00d0 <[^>]*> 018d faf5 	shra_r\.w	t4,t5,0x1f
640+00d4 <[^>]*> 01cf 6ad5 	shrav_r\.w	t5,t6,t7
650+00d8 <[^>]*> 020f 7095 	muleu_s\.ph\.qbl	t6,t7,s0
660+00dc <[^>]*> 0230 78d5 	muleu_s\.ph\.qbr	t7,s0,s1
670+00e0 <[^>]*> 0251 8115 	mulq_rs\.ph	s0,s1,s2
680+00e4 <[^>]*> 0272 8825 	muleq_s\.w\.phl	s1,s2,s3
690+00e8 <[^>]*> 0293 9065 	muleq_s\.w\.phr	s2,s3,s4
700+00ec <[^>]*> 0293 20bc 	dpau\.h\.qbl	\$ac0,s3,s4
710+00f0 <[^>]*> 02b4 70bc 	dpau\.h\.qbr	\$ac1,s4,s5
720+00f4 <[^>]*> 02d5 a4bc 	dpsu\.h\.qbl	\$ac2,s5,s6
730+00f8 <[^>]*> 02f6 f4bc 	dpsu\.h\.qbr	\$ac3,s6,s7
740+00fc <[^>]*> 0317 02bc 	dpaq_s\.w\.ph	\$ac0,s7,t8
750+0100 <[^>]*> 0338 46bc 	dpsq_s\.w\.ph	\$ac1,t8,t9
760+0104 <[^>]*> 0359 bcbc 	mulsaq_s\.w\.ph	\$ac2,t9,k0
770+0108 <[^>]*> 037a d2bc 	dpaq_sa.l\.w	\$ac3,k0,k1
780+010c <[^>]*> 039b 16bc 	dpsq_sa.l\.w	\$ac0,k1,gp
790+0110 <[^>]*> 03bc 5a7c 	maq_s\.w\.phl	\$ac1,gp,sp
800+0114 <[^>]*> 03dd 8a7c 	maq_s\.w\.phr	\$ac2,sp,s8
810+0118 <[^>]*> 03fe fa7c 	maq_sa\.w\.phl	\$ac3,s8,ra
820+011c <[^>]*> 001f 2a7c 	maq_sa\.w\.phr	\$ac0,ra,zero
830+0120 <[^>]*> 0001 313c 	bitrev	zero,at
840+0124 <[^>]*> 0022 413c 	insv	at,v0
850+0128 <[^>]*> 0040 05fc 	repl\.qb	v0,0x0
860+012c <[^>]*> 005f e5fc 	repl\.qb	v0,0xff
870+0130 <[^>]*> 0064 133c 	replv\.qb	v1,a0
880+0134 <[^>]*> 0200 203d 	repl\.ph	a0,-512
890+0138 <[^>]*> 01ff 203d 	repl\.ph	a0,511
900+013c <[^>]*> 00a6 033c 	replv\.ph	a1,a2
910+0140 <[^>]*> 00e6 0245 	cmpu\.eq\.qb	a2,a3
920+0144 <[^>]*> 0107 0285 	cmpu\.lt\.qb	a3,t0
930+0148 <[^>]*> 0128 02c5 	cmpu\.le\.qb	t0,t1
940+014c <[^>]*> 016a 48c5 	cmpgu\.eq\.qb	t1,t2,t3
950+0150 <[^>]*> 018b 5105 	cmpgu\.lt\.qb	t2,t3,t4
960+0154 <[^>]*> 01ac 5945 	cmpgu\.le\.qb	t3,t4,t5
970+0158 <[^>]*> 01ac 0005 	cmp\.eq\.ph	t4,t5
980+015c <[^>]*> 01cd 0045 	cmp\.lt\.ph	t5,t6
990+0160 <[^>]*> 01ee 0085 	cmp\.le\.ph	t6,t7
1000+0164 <[^>]*> 0230 79ed 	pick\.qb	t7,s0,s1
1010+0168 <[^>]*> 0251 822d 	pick\.ph	s0,s1,s2
1020+016c <[^>]*> 0272 89ad 	packrl\.ph	s1,s2,s3
1030+0170 <[^>]*> 0240 4e7c 	extr\.w	s2,\$ac1,0x0
1040+0174 <[^>]*> 025f 4e7c 	extr\.w	s2,\$ac1,0x1f
1050+0178 <[^>]*> 0260 9e7c 	extr_r\.w	s3,\$ac2,0x0
1060+017c <[^>]*> 027f 9e7c 	extr_r\.w	s3,\$ac2,0x1f
1070+0180 <[^>]*> 0280 ee7c 	extr_rs\.w	s4,\$ac3,0x0
1080+0184 <[^>]*> 029f ee7c 	extr_rs\.w	s4,\$ac3,0x1f
1090+0188 <[^>]*> 02a0 3e7c 	extr_s\.h	s5,\$ac0,0x0
1100+018c <[^>]*> 02bf 3e7c 	extr_s\.h	s5,\$ac0,0x1f
1110+0190 <[^>]*> 02d7 7ebc 	extrv_s\.h	s6,\$ac1,s7
1120+0194 <[^>]*> 02f8 8ebc 	extrv\.w	s7,\$ac2,t8
1130+0198 <[^>]*> 0319 debc 	extrv_r\.w	t8,\$ac3,t9
1140+019c <[^>]*> 033a 2ebc 	extrv_rs\.w	t9,\$ac0,k0
1150+01a0 <[^>]*> 0340 667c 	extp	k0,\$ac1,0x0
1160+01a4 <[^>]*> 035f 667c 	extp	k0,\$ac1,0x1f
1170+01a8 <[^>]*> 037c a8bc 	extpv	k1,\$ac2,gp
1180+01ac <[^>]*> 0380 f67c 	extpdp	gp,\$ac3,0x0
1190+01b0 <[^>]*> 039f f67c 	extpdp	gp,\$ac3,0x1f
1200+01b4 <[^>]*> 03be 38bc 	extpdpv	sp,\$ac0,s8
1210+01b8 <[^>]*> 0020 401d 	shilo	\$ac1,-32
1220+01bc <[^>]*> 001f 401d 	shilo	\$ac1,31
1230+01c0 <[^>]*> 001e 927c 	shilov	\$ac2,s8
1240+01c4 <[^>]*> 001f c27c 	mthlip	ra,\$ac3
1250+01c8 <[^>]*> 0000 007c 	mfhi	zero,\$ac0
1260+01cc <[^>]*> 0001 507c 	mflo	at,\$ac1
1270+01d0 <[^>]*> 0002 a07c 	mthi	v0,\$ac2
1280+01d4 <[^>]*> 0003 f07c 	mtlo	v1,\$ac3
1290+01d8 <[^>]*> 0080 167c 	wrdsp	a0,0x0
1300+01dc <[^>]*> 008f d67c 	wrdsp	a0
1310+01e0 <[^>]*> 00af d67c 	wrdsp	a1
1320+01e4 <[^>]*> 00c0 067c 	rddsp	a2,0x0
1330+01e8 <[^>]*> 00cf c67c 	rddsp	a2
1340+01ec <[^>]*> 00ef c67c 	rddsp	a3
1350+01f0 <[^>]*> 012a 4225 	lbux	t0,t1\(t2\)
1360+01f4 <[^>]*> 014b 4965 	lhx	t1,t2\(t3\)
1370+01f8 <[^>]*> 016c 51a5 	lwx	t2,t3\(t4\)
1380+01fc <[^>]*> 4360 fffe 	bposge32	000001fc <text_label\+0x1fc>
139			1fc: R_MICROMIPS_PC16_S1	text_label
1400+0200 <[^>]*> 0c00      	nop
1410+0202 <[^>]*> 018b 8abc 	madd	\$ac2,t3,t4
1420+0206 <[^>]*> 01ac dabc 	maddu	\$ac3,t4,t5
1430+020a <[^>]*> 01cd 2abc 	msub	\$ac0,t5,t6
1440+020e <[^>]*> 01ee 7abc 	msubu	\$ac1,t6,t7
1450+0212 <[^>]*> 02d5 ccbc 	mult	\$ac3,s5,s6
1460+0216 <[^>]*> 02f6 1cbc 	multu	\$ac0,s6,s7
1470+021a <[^>]*> 0c00      	nop
148	\.\.\.
149