1#objdump: -dr --prefix-addresses --show-raw-insn 2#name: MIPS MIPS32 cop2 instructions 3#source: micromips@mips32-cp2.s 4#as: -32 5 6# Check MIPS32 cop2 instruction assembly (microMIPS). 7 8.*: +file format .*mips.* 9 10Disassembly of section \.text: 11[0-9a-f]+ <[^>]*> 4280 fffe bc2f 0+0000 <text_label> 12 0: R_MICROMIPS_PC16_S1 text_label 13[0-9a-f]+ <[^>]*> 0c00 nop 14[0-9a-f]+ <[^>]*> 42a0 fffe bc2t 0+0006 <text_label\+0x6> 15 6: R_MICROMIPS_PC16_S1 .* 16[0-9a-f]+ <[^>]*> 0c00 nop 17[0-9a-f]+ <[^>]*> 9400 fffe b 0+000c <text_label\+0xc> 18 c: R_MICROMIPS_PC16_S1 text_label 19[0-9a-f]+ <[^>]*> 0c00 nop 20[0-9a-f]+ <[^>]*> 42a0 fffe bc2t 0+0012 <.*> 21 12: R_MICROMIPS_PC16_S1 text_label 22[0-9a-f]+ <[^>]*> 0c00 nop 23[0-9a-f]+ <[^>]*> 4280 fffe bc2f 0+0018 <.*\+0x6> 24 18: R_MICROMIPS_PC16_S1 .* 25[0-9a-f]+ <[^>]*> 0c00 nop 26[0-9a-f]+ <[^>]*> 9400 fffe b 0+001e <.*\+0xc> 27 1e: R_MICROMIPS_PC16_S1 text_label 28[0-9a-f]+ <[^>]*> 0c00 nop 29[0-9a-f]+ <[^>]*> 0022 cd3c cfc2 at,\$2 30[0-9a-f]+ <[^>]*> 0009 1a2a cop2 0x12345 31[0-9a-f]+ <[^>]*> 0043 dd3c ctc2 v0,\$3 32[0-9a-f]+ <[^>]*> 0064 4d3c mfc2 v1,\$4 33[0-9a-f]+ <[^>]*> 00c7 5d3c mtc2 a2,\$7 34[0-9a-f]+ <[^>]*> 4280 fffe bc2f 0+0038 <.*\+0x14> 35 38: R_MICROMIPS_PC16_S1 text_label 36[0-9a-f]+ <[^>]*> 0c00 nop 37[0-9a-f]+ <[^>]*> 42a4 fffe bc2t \$cc1,0+003e <.*\+0x1a> 38 3e: R_MICROMIPS_PC16_S1 .* 39[0-9a-f]+ <[^>]*> 0c00 nop 40[0-9a-f]+ <[^>]*> 9400 fffe b 0+0044 <.*\+0x20> 41 44: R_MICROMIPS_PC16_S1 text_label 42[0-9a-f]+ <[^>]*> 0c00 nop 43[0-9a-f]+ <[^>]*> 42b8 fffe bc2t \$cc6,0+004a <.*> 44 4a: R_MICROMIPS_PC16_S1 text_label 45[0-9a-f]+ <[^>]*> 0c00 nop 46[0-9a-f]+ <[^>]*> 429c fffe bc2f \$cc7,0+0050 <.*\+0x6> 47 50: R_MICROMIPS_PC16_S1 .* 48[0-9a-f]+ <[^>]*> 0c00 nop 49[0-9a-f]+ <[^>]*> 9400 fffe b 0+0056 <.*\+0xc> 50 56: R_MICROMIPS_PC16_S1 text_label 51[0-9a-f]+ <[^>]*> 0c00 nop 52 \.\.\. 53