1	.text
2
3	// All available modes: FU, IS, IU, T, TFU, S2RND, ISS2, IH, W32
4
5	// Accumulator to Half D-register Moves
6
7	R0.L = A0 (W32);
8
9	// Accumulator to D-register Moves
10
11	R0 = A0 (T);
12	R0 = A0 (TFU);
13	R0 = A0 (IH);
14	R0 = A0 (W32);
15
16	// Multiply 16-Bit Operands to Half Dreg
17
18	R0.H = R1.L * R2.H (W32);
19
20	// Multiply 16-Bit Operands to Dreg
21
22	R0 = R1.L * R2.H (IU);
23	R0 = R1.L * R2.H (T);
24	R0 = R1.L * R2.H (TFU);
25	R0 = R1.L * R2.H (IH);
26	R0 = R1.L * R2.H (W32);
27
28	// Multiply and Multiply-Accumulate to Accumulator
29
30	A0 = R1.L * R2.H (IU);
31	A0 = R1.L * R2.H (T);
32	A0 = R1.L * R2.H (TFU);
33	A0 = R1.L * R2.H (S2RND);
34	A0 = R1.L * R2.H (ISS2);
35	A0 = R1.L * R2.H (IH);
36
37	// Multiply and Multiply-Accumulate to Half-Register
38
39	R0.L = (A0 = R1.L * R2.H) (W32);
40
41	// Multiply and Multiply-Accumulate to Data Register
42
43	R0 = (A0 = R1.L * R2.H) (T);
44	R0 = (A0 = R1.L * R2.H) (TFU);
45	R0 = (A0 = R1.L * R2.H) (IH);
46	R0 = (A0 = R1.L * R2.H) (W32);
47