1#as: -mcpu=arc700 2#objdump: -dr --show-raw-insn 3 4.*: +file format .*arc.* 5 6Disassembly of section .text: 7 8[0-9a-f]+ <text_label>: 9 0: 0802 0000 bl 0 <text_label> 10 4: 0ffc ffc0 bl 0 <text_label> 11 8: 0ff8 ffc0 bl 0 <text_label> 12 c: 0ff4 ffc1 bleq 0 <text_label> 13 10: 0ff0 ffc1 bleq 0 <text_label> 14 14: 0fec ffc2 blne 0 <text_label> 15 18: 0fe8 ffc2 blne 0 <text_label> 16 1c: 0fe4 ffc3 blp 0 <text_label> 17 20: 0fe0 ffc3 blp 0 <text_label> 18 24: 0fdc ffc4 bln 0 <text_label> 19 28: 0fd8 ffc4 bln 0 <text_label> 20 2c: 0fd4 ffc5 blc 0 <text_label> 21 30: 0fd0 ffc5 blc 0 <text_label> 22 34: 0fcc ffc5 blc 0 <text_label> 23 38: 0fc8 ffc6 blnc 0 <text_label> 24 3c: 0fc4 ffc6 blnc 0 <text_label> 25 40: 0fc0 ffc6 blnc 0 <text_label> 26 44: 0fbc ffc7 blv 0 <text_label> 27 48: 0fb8 ffc7 blv 0 <text_label> 28 4c: 0fb4 ffc8 blnv 0 <text_label> 29 50: 0fb0 ffc8 blnv 0 <text_label> 30 54: 0fac ffc9 blgt 0 <text_label> 31 58: 0fa8 ffca blge 0 <text_label> 32 5c: 0fa4 ffcb bllt 0 <text_label> 33 60: 0fa0 ffcc blle 0 <text_label> 34 64: 0f9c ffcd blhi 0 <text_label> 35 68: 0f98 ffce blls 0 <text_label> 36 6c: 0f94 ffcf blpnz 0 <text_label> 37 70: 0f92 ffef bl.d 0 <text_label> 38 74: 78e0 nop_s 39 76: 0f8e ffcf bl 0 <text_label> 40 7a: 78e0 nop_s 41 7c: 0f84 ffe1 bleq.d 0 <text_label> 42 80: 78e0 nop_s 43 82: 0f80 ffc2 blne 0 <text_label> 44 86: 78e0 nop_s 45 88: 0f78 ffe6 blnc.d 0 <text_label> 46 8c: 78e0 nop_s 47