1/* tc-sh.c -- Assemble code for the Renesas / SuperH SH 2 Copyright (C) 1993-2017 Free Software Foundation, Inc. 3 4 This file is part of GAS, the GNU Assembler. 5 6 GAS is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3, or (at your option) 9 any later version. 10 11 GAS is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GAS; see the file COPYING. If not, write to 18 the Free Software Foundation, 51 Franklin Street - Fifth Floor, 19 Boston, MA 02110-1301, USA. */ 20 21/* Written By Steve Chamberlain <sac@cygnus.com> */ 22 23#include "as.h" 24#include "subsegs.h" 25#define DEFINE_TABLE 26#include "opcodes/sh-opc.h" 27#include "safe-ctype.h" 28#include "struc-symbol.h" 29 30#ifdef OBJ_ELF 31#include "elf/sh.h" 32#endif 33 34#include "dwarf2dbg.h" 35#include "dw2gencfi.h" 36 37typedef struct 38 { 39 sh_arg_type type; 40 int reg; 41 expressionS immediate; 42 } 43sh_operand_info; 44 45const char comment_chars[] = "!"; 46const char line_separator_chars[] = ";"; 47const char line_comment_chars[] = "!#"; 48 49static void s_uses (int); 50static void s_uacons (int); 51 52#ifdef OBJ_ELF 53static void sh_elf_cons (int); 54 55symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */ 56#endif 57 58static void 59big (int ignore ATTRIBUTE_UNUSED) 60{ 61 if (! target_big_endian) 62 as_bad (_("directive .big encountered when option -big required")); 63 64 /* Stop further messages. */ 65 target_big_endian = 1; 66} 67 68static void 69little (int ignore ATTRIBUTE_UNUSED) 70{ 71 if (target_big_endian) 72 as_bad (_("directive .little encountered when option -little required")); 73 74 /* Stop further messages. */ 75 target_big_endian = 0; 76} 77 78/* This table describes all the machine specific pseudo-ops the assembler 79 has to support. The fields are: 80 pseudo-op name without dot 81 function to call to execute this pseudo-op 82 Integer arg to pass to the function. */ 83 84const pseudo_typeS md_pseudo_table[] = 85{ 86#ifdef OBJ_ELF 87 {"long", sh_elf_cons, 4}, 88 {"int", sh_elf_cons, 4}, 89 {"word", sh_elf_cons, 2}, 90 {"short", sh_elf_cons, 2}, 91#else 92 {"int", cons, 4}, 93 {"word", cons, 2}, 94#endif /* OBJ_ELF */ 95 {"big", big, 0}, 96 {"form", listing_psize, 0}, 97 {"little", little, 0}, 98 {"heading", listing_title, 0}, 99 {"import", s_ignore, 0}, 100 {"page", listing_eject, 0}, 101 {"program", s_ignore, 0}, 102 {"uses", s_uses, 0}, 103 {"uaword", s_uacons, 2}, 104 {"ualong", s_uacons, 4}, 105 {"uaquad", s_uacons, 8}, 106 {"2byte", s_uacons, 2}, 107 {"4byte", s_uacons, 4}, 108 {"8byte", s_uacons, 8}, 109#ifdef HAVE_SH64 110 {"mode", s_sh64_mode, 0 }, 111 112 /* Have the old name too. */ 113 {"isa", s_sh64_mode, 0 }, 114 115 /* Assert that the right ABI is used. */ 116 {"abi", s_sh64_abi, 0 }, 117 118 { "vtable_inherit", sh64_vtable_inherit, 0 }, 119 { "vtable_entry", sh64_vtable_entry, 0 }, 120#endif /* HAVE_SH64 */ 121 {0, 0, 0} 122}; 123 124int sh_relax; /* set if -relax seen */ 125 126/* Whether -small was seen. */ 127 128int sh_small; 129 130/* Flag to generate relocations against symbol values for local symbols. */ 131 132static int dont_adjust_reloc_32; 133 134/* Flag to indicate that '$' is allowed as a register prefix. */ 135 136static int allow_dollar_register_prefix; 137 138/* Preset architecture set, if given; zero otherwise. */ 139 140static unsigned int preset_target_arch; 141 142/* The bit mask of architectures that could 143 accommodate the insns seen so far. */ 144static unsigned int valid_arch; 145 146#ifdef OBJ_ELF 147/* Whether --fdpic was given. */ 148static int sh_fdpic; 149#endif 150 151const char EXP_CHARS[] = "eE"; 152 153/* Chars that mean this number is a floating point constant. */ 154/* As in 0f12.456 */ 155/* or 0d1.2345e12 */ 156const char FLT_CHARS[] = "rRsSfFdDxXpP"; 157 158#define C(a,b) ENCODE_RELAX(a,b) 159 160#define ENCODE_RELAX(what,length) (((what) << 4) + (length)) 161#define GET_WHAT(x) ((x>>4)) 162 163/* These are the three types of relaxable instruction. */ 164/* These are the types of relaxable instructions; except for END which is 165 a marker. */ 166#define COND_JUMP 1 167#define COND_JUMP_DELAY 2 168#define UNCOND_JUMP 3 169 170#ifdef HAVE_SH64 171 172/* A 16-bit (times four) pc-relative operand, at most expanded to 32 bits. */ 173#define SH64PCREL16_32 4 174/* A 16-bit (times four) pc-relative operand, at most expanded to 64 bits. */ 175#define SH64PCREL16_64 5 176 177/* Variants of the above for adjusting the insn to PTA or PTB according to 178 the label. */ 179#define SH64PCREL16PT_32 6 180#define SH64PCREL16PT_64 7 181 182/* A MOVI expansion, expanding to at most 32 or 64 bits. */ 183#define MOVI_IMM_32 8 184#define MOVI_IMM_32_PCREL 9 185#define MOVI_IMM_64 10 186#define MOVI_IMM_64_PCREL 11 187#define END 12 188 189#else /* HAVE_SH64 */ 190 191#define END 4 192 193#endif /* HAVE_SH64 */ 194 195#define UNDEF_DISP 0 196#define COND8 1 197#define COND12 2 198#define COND32 3 199#define UNDEF_WORD_DISP 4 200 201#define UNCOND12 1 202#define UNCOND32 2 203 204#ifdef HAVE_SH64 205#define UNDEF_SH64PCREL 0 206#define SH64PCREL16 1 207#define SH64PCREL32 2 208#define SH64PCREL48 3 209#define SH64PCREL64 4 210#define SH64PCRELPLT 5 211 212#define UNDEF_MOVI 0 213#define MOVI_16 1 214#define MOVI_32 2 215#define MOVI_48 3 216#define MOVI_64 4 217#define MOVI_PLT 5 218#define MOVI_GOTOFF 6 219#define MOVI_GOTPC 7 220#endif /* HAVE_SH64 */ 221 222/* Branch displacements are from the address of the branch plus 223 four, thus all minimum and maximum values have 4 added to them. */ 224#define COND8_F 258 225#define COND8_M -252 226#define COND8_LENGTH 2 227 228/* There is one extra instruction before the branch, so we must add 229 two more bytes to account for it. */ 230#define COND12_F 4100 231#define COND12_M -4090 232#define COND12_LENGTH 6 233 234#define COND12_DELAY_LENGTH 4 235 236/* ??? The minimum and maximum values are wrong, but this does not matter 237 since this relocation type is not supported yet. */ 238#define COND32_F (1<<30) 239#define COND32_M -(1<<30) 240#define COND32_LENGTH 14 241 242#define UNCOND12_F 4098 243#define UNCOND12_M -4092 244#define UNCOND12_LENGTH 2 245 246/* ??? The minimum and maximum values are wrong, but this does not matter 247 since this relocation type is not supported yet. */ 248#define UNCOND32_F (1<<30) 249#define UNCOND32_M -(1<<30) 250#define UNCOND32_LENGTH 14 251 252#ifdef HAVE_SH64 253/* The trivial expansion of a SH64PCREL16 relaxation is just a "PT label, 254 TRd" as is the current insn, so no extra length. Note that the "reach" 255 is calculated from the address *after* that insn, but the offset in the 256 insn is calculated from the beginning of the insn. We also need to 257 take into account the implicit 1 coded as the "A" in PTA when counting 258 forward. If PTB reaches an odd address, we trap that as an error 259 elsewhere, so we don't have to have different relaxation entries. We 260 don't add a one to the negative range, since PTB would then have the 261 farthest backward-reaching value skipped, not generated at relaxation. */ 262#define SH64PCREL16_F (32767 * 4 - 4 + 1) 263#define SH64PCREL16_M (-32768 * 4 - 4) 264#define SH64PCREL16_LENGTH 0 265 266/* The next step is to change that PT insn into 267 MOVI ((label - datalabel Ln) >> 16) & 65535, R25 268 SHORI (label - datalabel Ln) & 65535, R25 269 Ln: 270 PTREL R25,TRd 271 which means two extra insns, 8 extra bytes. This is the limit for the 272 32-bit ABI. 273 274 The expressions look a bit bad since we have to adjust this to avoid overflow on a 275 32-bit host. */ 276#define SH64PCREL32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4) 277#define SH64PCREL32_LENGTH (2 * 4) 278 279/* Similarly, we just change the MOVI and add a SHORI for the 48-bit 280 expansion. */ 281#if BFD_HOST_64BIT_LONG 282/* The "reach" type is long, so we can only do this for a 64-bit-long 283 host. */ 284#define SH64PCREL32_M ((-((long) 1 << 30)) * 2 - 4) 285#define SH64PCREL48_F ((((long) 1 << 47) - 1) - 4) 286#define SH64PCREL48_M ((-((long) 1 << 47)) - 4) 287#define SH64PCREL48_LENGTH (3 * 4) 288#else 289/* If the host does not have 64-bit longs, just make this state identical 290 in reach to the 32-bit state. Note that we have a slightly incorrect 291 reach, but the correct one above will overflow a 32-bit number. */ 292#define SH64PCREL32_M ((-((long) 1 << 30)) * 2) 293#define SH64PCREL48_F SH64PCREL32_F 294#define SH64PCREL48_M SH64PCREL32_M 295#define SH64PCREL48_LENGTH (3 * 4) 296#endif /* BFD_HOST_64BIT_LONG */ 297 298/* And similarly for the 64-bit expansion; a MOVI + SHORI + SHORI + SHORI 299 + PTREL sequence. */ 300#define SH64PCREL64_LENGTH (4 * 4) 301 302/* For MOVI, we make the MOVI + SHORI... expansion you can see in the 303 SH64PCREL expansions. The PCREL one is similar, but the other has no 304 pc-relative reach; it must be fully expanded in 305 shmedia_md_estimate_size_before_relax. */ 306#define MOVI_16_LENGTH 0 307#define MOVI_16_F (32767 - 4) 308#define MOVI_16_M (-32768 - 4) 309#define MOVI_32_LENGTH 4 310#define MOVI_32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4) 311#define MOVI_48_LENGTH 8 312 313#if BFD_HOST_64BIT_LONG 314/* The "reach" type is long, so we can only do this for a 64-bit-long 315 host. */ 316#define MOVI_32_M ((-((long) 1 << 30)) * 2 - 4) 317#define MOVI_48_F ((((long) 1 << 47) - 1) - 4) 318#define MOVI_48_M ((-((long) 1 << 47)) - 4) 319#else 320/* If the host does not have 64-bit longs, just make this state identical 321 in reach to the 32-bit state. Note that we have a slightly incorrect 322 reach, but the correct one above will overflow a 32-bit number. */ 323#define MOVI_32_M ((-((long) 1 << 30)) * 2) 324#define MOVI_48_F MOVI_32_F 325#define MOVI_48_M MOVI_32_M 326#endif /* BFD_HOST_64BIT_LONG */ 327 328#define MOVI_64_LENGTH 12 329#endif /* HAVE_SH64 */ 330 331#define EMPTY { 0, 0, 0, 0 } 332 333const relax_typeS md_relax_table[C (END, 0)] = { 334 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 335 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 336 337 EMPTY, 338 /* C (COND_JUMP, COND8) */ 339 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) }, 340 /* C (COND_JUMP, COND12) */ 341 { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), }, 342 /* C (COND_JUMP, COND32) */ 343 { COND32_F, COND32_M, COND32_LENGTH, 0, }, 344 /* C (COND_JUMP, UNDEF_WORD_DISP) */ 345 { 0, 0, COND32_LENGTH, 0, }, 346 EMPTY, EMPTY, EMPTY, 347 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 348 349 EMPTY, 350 /* C (COND_JUMP_DELAY, COND8) */ 351 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) }, 352 /* C (COND_JUMP_DELAY, COND12) */ 353 { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), }, 354 /* C (COND_JUMP_DELAY, COND32) */ 355 { COND32_F, COND32_M, COND32_LENGTH, 0, }, 356 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */ 357 { 0, 0, COND32_LENGTH, 0, }, 358 EMPTY, EMPTY, EMPTY, 359 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 360 361 EMPTY, 362 /* C (UNCOND_JUMP, UNCOND12) */ 363 { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), }, 364 /* C (UNCOND_JUMP, UNCOND32) */ 365 { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, }, 366 EMPTY, 367 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */ 368 { 0, 0, UNCOND32_LENGTH, 0, }, 369 EMPTY, EMPTY, EMPTY, 370 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 371 372#ifdef HAVE_SH64 373 /* C (SH64PCREL16_32, SH64PCREL16) */ 374 EMPTY, 375 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_32, SH64PCREL32) }, 376 /* C (SH64PCREL16_32, SH64PCREL32) */ 377 { 0, 0, SH64PCREL32_LENGTH, 0 }, 378 EMPTY, EMPTY, 379 /* C (SH64PCREL16_32, SH64PCRELPLT) */ 380 { 0, 0, SH64PCREL32_LENGTH, 0 }, 381 EMPTY, EMPTY, 382 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 383 384 /* C (SH64PCREL16_64, SH64PCREL16) */ 385 EMPTY, 386 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_64, SH64PCREL32) }, 387 /* C (SH64PCREL16_64, SH64PCREL32) */ 388 { SH64PCREL32_F, SH64PCREL32_M, SH64PCREL32_LENGTH, C (SH64PCREL16_64, SH64PCREL48) }, 389 /* C (SH64PCREL16_64, SH64PCREL48) */ 390 { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16_64, SH64PCREL64) }, 391 /* C (SH64PCREL16_64, SH64PCREL64) */ 392 { 0, 0, SH64PCREL64_LENGTH, 0 }, 393 /* C (SH64PCREL16_64, SH64PCRELPLT) */ 394 { 0, 0, SH64PCREL64_LENGTH, 0 }, 395 EMPTY, EMPTY, 396 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 397 398 /* C (SH64PCREL16PT_32, SH64PCREL16) */ 399 EMPTY, 400 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_32, SH64PCREL32) }, 401 /* C (SH64PCREL16PT_32, SH64PCREL32) */ 402 { 0, 0, SH64PCREL32_LENGTH, 0 }, 403 EMPTY, EMPTY, 404 /* C (SH64PCREL16PT_32, SH64PCRELPLT) */ 405 { 0, 0, SH64PCREL32_LENGTH, 0 }, 406 EMPTY, EMPTY, 407 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 408 409 /* C (SH64PCREL16PT_64, SH64PCREL16) */ 410 EMPTY, 411 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_64, SH64PCREL32) }, 412 /* C (SH64PCREL16PT_64, SH64PCREL32) */ 413 { SH64PCREL32_F, 414 SH64PCREL32_M, 415 SH64PCREL32_LENGTH, 416 C (SH64PCREL16PT_64, SH64PCREL48) }, 417 /* C (SH64PCREL16PT_64, SH64PCREL48) */ 418 { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16PT_64, SH64PCREL64) }, 419 /* C (SH64PCREL16PT_64, SH64PCREL64) */ 420 { 0, 0, SH64PCREL64_LENGTH, 0 }, 421 /* C (SH64PCREL16PT_64, SH64PCRELPLT) */ 422 { 0, 0, SH64PCREL64_LENGTH, 0}, 423 EMPTY, EMPTY, 424 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 425 426 /* C (MOVI_IMM_32, UNDEF_MOVI) */ 427 { 0, 0, MOVI_32_LENGTH, 0 }, 428 /* C (MOVI_IMM_32, MOVI_16) */ 429 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32, MOVI_32) }, 430 /* C (MOVI_IMM_32, MOVI_32) */ 431 { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, 0 }, 432 EMPTY, EMPTY, EMPTY, 433 /* C (MOVI_IMM_32, MOVI_GOTOFF) */ 434 { 0, 0, MOVI_32_LENGTH, 0 }, 435 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 436 437 /* C (MOVI_IMM_32_PCREL, MOVI_16) */ 438 EMPTY, 439 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32_PCREL, MOVI_32) }, 440 /* C (MOVI_IMM_32_PCREL, MOVI_32) */ 441 { 0, 0, MOVI_32_LENGTH, 0 }, 442 EMPTY, EMPTY, 443 /* C (MOVI_IMM_32_PCREL, MOVI_PLT) */ 444 { 0, 0, MOVI_32_LENGTH, 0 }, 445 EMPTY, 446 /* C (MOVI_IMM_32_PCREL, MOVI_GOTPC) */ 447 { 0, 0, MOVI_32_LENGTH, 0 }, 448 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 449 450 /* C (MOVI_IMM_64, UNDEF_MOVI) */ 451 { 0, 0, MOVI_64_LENGTH, 0 }, 452 /* C (MOVI_IMM_64, MOVI_16) */ 453 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64, MOVI_32) }, 454 /* C (MOVI_IMM_64, MOVI_32) */ 455 { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64, MOVI_48) }, 456 /* C (MOVI_IMM_64, MOVI_48) */ 457 { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64, MOVI_64) }, 458 /* C (MOVI_IMM_64, MOVI_64) */ 459 { 0, 0, MOVI_64_LENGTH, 0 }, 460 EMPTY, 461 /* C (MOVI_IMM_64, MOVI_GOTOFF) */ 462 { 0, 0, MOVI_64_LENGTH, 0 }, 463 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 464 465 /* C (MOVI_IMM_64_PCREL, MOVI_16) */ 466 EMPTY, 467 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_32) }, 468 /* C (MOVI_IMM_64_PCREL, MOVI_32) */ 469 { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_48) }, 470 /* C (MOVI_IMM_64_PCREL, MOVI_48) */ 471 { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_64) }, 472 /* C (MOVI_IMM_64_PCREL, MOVI_64) */ 473 { 0, 0, MOVI_64_LENGTH, 0 }, 474 /* C (MOVI_IMM_64_PCREL, MOVI_PLT) */ 475 { 0, 0, MOVI_64_LENGTH, 0 }, 476 EMPTY, 477 /* C (MOVI_IMM_64_PCREL, MOVI_GOTPC) */ 478 { 0, 0, MOVI_64_LENGTH, 0 }, 479 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 480 481#endif /* HAVE_SH64 */ 482 483}; 484 485#undef EMPTY 486 487static struct hash_control *opcode_hash_control; /* Opcode mnemonics */ 488 489 490#ifdef OBJ_ELF 491/* Determinet whether the symbol needs any kind of PIC relocation. */ 492 493inline static int 494sh_PIC_related_p (symbolS *sym) 495{ 496 expressionS *exp; 497 498 if (! sym) 499 return 0; 500 501 if (sym == GOT_symbol) 502 return 1; 503 504#ifdef HAVE_SH64 505 if (sh_PIC_related_p (*symbol_get_tc (sym))) 506 return 1; 507#endif 508 509 exp = symbol_get_value_expression (sym); 510 511 return (exp->X_op == O_PIC_reloc 512 || sh_PIC_related_p (exp->X_add_symbol) 513 || sh_PIC_related_p (exp->X_op_symbol)); 514} 515 516/* Determine the relocation type to be used to represent the 517 expression, that may be rearranged. */ 518 519static int 520sh_check_fixup (expressionS *main_exp, bfd_reloc_code_real_type *r_type_p) 521{ 522 expressionS *exp = main_exp; 523 524 /* This is here for backward-compatibility only. GCC used to generated: 525 526 f@PLT + . - (.LPCS# + 2) 527 528 but we'd rather be able to handle this as a PIC-related reference 529 plus/minus a symbol. However, gas' parser gives us: 530 531 O_subtract (O_add (f@PLT, .), .LPCS#+2) 532 533 so we attempt to transform this into: 534 535 O_subtract (f@PLT, O_subtract (.LPCS#+2, .)) 536 537 which we can handle simply below. */ 538 if (exp->X_op == O_subtract) 539 { 540 if (sh_PIC_related_p (exp->X_op_symbol)) 541 return 1; 542 543 exp = symbol_get_value_expression (exp->X_add_symbol); 544 545 if (exp && sh_PIC_related_p (exp->X_op_symbol)) 546 return 1; 547 548 if (exp && exp->X_op == O_add 549 && sh_PIC_related_p (exp->X_add_symbol)) 550 { 551 symbolS *sym = exp->X_add_symbol; 552 553 exp->X_op = O_subtract; 554 exp->X_add_symbol = main_exp->X_op_symbol; 555 556 main_exp->X_op_symbol = main_exp->X_add_symbol; 557 main_exp->X_add_symbol = sym; 558 559 main_exp->X_add_number += exp->X_add_number; 560 exp->X_add_number = 0; 561 } 562 563 exp = main_exp; 564 } 565 else if (exp->X_op == O_add && sh_PIC_related_p (exp->X_op_symbol)) 566 return 1; 567 568 if (exp->X_op == O_symbol || exp->X_op == O_add || exp->X_op == O_subtract) 569 { 570#ifdef HAVE_SH64 571 if (exp->X_add_symbol 572 && (exp->X_add_symbol == GOT_symbol 573 || (GOT_symbol 574 && *symbol_get_tc (exp->X_add_symbol) == GOT_symbol))) 575 { 576 switch (*r_type_p) 577 { 578 case BFD_RELOC_SH_IMM_LOW16: 579 *r_type_p = BFD_RELOC_SH_GOTPC_LOW16; 580 break; 581 582 case BFD_RELOC_SH_IMM_MEDLOW16: 583 *r_type_p = BFD_RELOC_SH_GOTPC_MEDLOW16; 584 break; 585 586 case BFD_RELOC_SH_IMM_MEDHI16: 587 *r_type_p = BFD_RELOC_SH_GOTPC_MEDHI16; 588 break; 589 590 case BFD_RELOC_SH_IMM_HI16: 591 *r_type_p = BFD_RELOC_SH_GOTPC_HI16; 592 break; 593 594 case BFD_RELOC_NONE: 595 case BFD_RELOC_UNUSED: 596 *r_type_p = BFD_RELOC_SH_GOTPC; 597 break; 598 599 default: 600 abort (); 601 } 602 return 0; 603 } 604#else 605 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol) 606 { 607 *r_type_p = BFD_RELOC_SH_GOTPC; 608 return 0; 609 } 610#endif 611 exp = symbol_get_value_expression (exp->X_add_symbol); 612 if (! exp) 613 return 0; 614 } 615 616 if (exp->X_op == O_PIC_reloc) 617 { 618 switch (*r_type_p) 619 { 620 case BFD_RELOC_NONE: 621 case BFD_RELOC_UNUSED: 622 *r_type_p = exp->X_md; 623 break; 624 625 case BFD_RELOC_SH_DISP20: 626 switch (exp->X_md) 627 { 628 case BFD_RELOC_32_GOT_PCREL: 629 *r_type_p = BFD_RELOC_SH_GOT20; 630 break; 631 632 case BFD_RELOC_32_GOTOFF: 633 *r_type_p = BFD_RELOC_SH_GOTOFF20; 634 break; 635 636 case BFD_RELOC_SH_GOTFUNCDESC: 637 *r_type_p = BFD_RELOC_SH_GOTFUNCDESC20; 638 break; 639 640 case BFD_RELOC_SH_GOTOFFFUNCDESC: 641 *r_type_p = BFD_RELOC_SH_GOTOFFFUNCDESC20; 642 break; 643 644 default: 645 abort (); 646 } 647 break; 648 649#ifdef HAVE_SH64 650 case BFD_RELOC_SH_IMM_LOW16: 651 switch (exp->X_md) 652 { 653 case BFD_RELOC_32_GOTOFF: 654 *r_type_p = BFD_RELOC_SH_GOTOFF_LOW16; 655 break; 656 657 case BFD_RELOC_SH_GOTPLT32: 658 *r_type_p = BFD_RELOC_SH_GOTPLT_LOW16; 659 break; 660 661 case BFD_RELOC_32_GOT_PCREL: 662 *r_type_p = BFD_RELOC_SH_GOT_LOW16; 663 break; 664 665 case BFD_RELOC_32_PLT_PCREL: 666 *r_type_p = BFD_RELOC_SH_PLT_LOW16; 667 break; 668 669 default: 670 abort (); 671 } 672 break; 673 674 case BFD_RELOC_SH_IMM_MEDLOW16: 675 switch (exp->X_md) 676 { 677 case BFD_RELOC_32_GOTOFF: 678 *r_type_p = BFD_RELOC_SH_GOTOFF_MEDLOW16; 679 break; 680 681 case BFD_RELOC_SH_GOTPLT32: 682 *r_type_p = BFD_RELOC_SH_GOTPLT_MEDLOW16; 683 break; 684 685 case BFD_RELOC_32_GOT_PCREL: 686 *r_type_p = BFD_RELOC_SH_GOT_MEDLOW16; 687 break; 688 689 case BFD_RELOC_32_PLT_PCREL: 690 *r_type_p = BFD_RELOC_SH_PLT_MEDLOW16; 691 break; 692 693 default: 694 abort (); 695 } 696 break; 697 698 case BFD_RELOC_SH_IMM_MEDHI16: 699 switch (exp->X_md) 700 { 701 case BFD_RELOC_32_GOTOFF: 702 *r_type_p = BFD_RELOC_SH_GOTOFF_MEDHI16; 703 break; 704 705 case BFD_RELOC_SH_GOTPLT32: 706 *r_type_p = BFD_RELOC_SH_GOTPLT_MEDHI16; 707 break; 708 709 case BFD_RELOC_32_GOT_PCREL: 710 *r_type_p = BFD_RELOC_SH_GOT_MEDHI16; 711 break; 712 713 case BFD_RELOC_32_PLT_PCREL: 714 *r_type_p = BFD_RELOC_SH_PLT_MEDHI16; 715 break; 716 717 default: 718 abort (); 719 } 720 break; 721 722 case BFD_RELOC_SH_IMM_HI16: 723 switch (exp->X_md) 724 { 725 case BFD_RELOC_32_GOTOFF: 726 *r_type_p = BFD_RELOC_SH_GOTOFF_HI16; 727 break; 728 729 case BFD_RELOC_SH_GOTPLT32: 730 *r_type_p = BFD_RELOC_SH_GOTPLT_HI16; 731 break; 732 733 case BFD_RELOC_32_GOT_PCREL: 734 *r_type_p = BFD_RELOC_SH_GOT_HI16; 735 break; 736 737 case BFD_RELOC_32_PLT_PCREL: 738 *r_type_p = BFD_RELOC_SH_PLT_HI16; 739 break; 740 741 default: 742 abort (); 743 } 744 break; 745#endif 746 747 default: 748 abort (); 749 } 750 if (exp == main_exp) 751 exp->X_op = O_symbol; 752 else 753 { 754 main_exp->X_add_symbol = exp->X_add_symbol; 755 main_exp->X_add_number += exp->X_add_number; 756 } 757 } 758 else 759 return (sh_PIC_related_p (exp->X_add_symbol) 760 || sh_PIC_related_p (exp->X_op_symbol)); 761 762 return 0; 763} 764 765/* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */ 766 767void 768sh_cons_fix_new (fragS *frag, int off, int size, expressionS *exp, 769 bfd_reloc_code_real_type r_type) 770{ 771 r_type = BFD_RELOC_UNUSED; 772 773 if (sh_check_fixup (exp, &r_type)) 774 as_bad (_("Invalid PIC expression.")); 775 776 if (r_type == BFD_RELOC_UNUSED) 777 switch (size) 778 { 779 case 1: 780 r_type = BFD_RELOC_8; 781 break; 782 783 case 2: 784 r_type = BFD_RELOC_16; 785 break; 786 787 case 4: 788 r_type = BFD_RELOC_32; 789 break; 790 791 case 8: 792 r_type = BFD_RELOC_64; 793 break; 794 795 default: 796 goto error; 797 } 798 else if (size != 4) 799 { 800 error: 801 as_bad (_("unsupported BFD relocation size %u"), size); 802 r_type = BFD_RELOC_UNUSED; 803 } 804 805 fix_new_exp (frag, off, size, exp, 0, r_type); 806} 807 808/* The regular cons() function, that reads constants, doesn't support 809 suffixes such as @GOT, @GOTOFF and @PLT, that generate 810 machine-specific relocation types. So we must define it here. */ 811/* Clobbers input_line_pointer, checks end-of-line. */ 812/* NBYTES 1=.byte, 2=.word, 4=.long */ 813static void 814sh_elf_cons (int nbytes) 815{ 816 expressionS exp; 817 818#ifdef HAVE_SH64 819 820 /* Update existing range to include a previous insn, if there was one. */ 821 sh64_update_contents_mark (TRUE); 822 823 /* We need to make sure the contents type is set to data. */ 824 sh64_flag_output (); 825 826#endif /* HAVE_SH64 */ 827 828 if (is_it_end_of_statement ()) 829 { 830 demand_empty_rest_of_line (); 831 return; 832 } 833 834#ifdef md_cons_align 835 md_cons_align (nbytes); 836#endif 837 838 do 839 { 840 expression (&exp); 841 emit_expr (&exp, (unsigned int) nbytes); 842 } 843 while (*input_line_pointer++ == ','); 844 845 input_line_pointer--; /* Put terminator back into stream. */ 846 if (*input_line_pointer == '#' || *input_line_pointer == '!') 847 { 848 while (! is_end_of_line[(unsigned char) *input_line_pointer++]); 849 } 850 else 851 demand_empty_rest_of_line (); 852} 853 854/* The regular frag_offset_fixed_p doesn't work for rs_align_test 855 frags. */ 856 857static bfd_boolean 858align_test_frag_offset_fixed_p (const fragS *frag1, const fragS *frag2, 859 bfd_vma *offset) 860{ 861 const fragS *frag; 862 bfd_vma off; 863 864 /* Start with offset initialised to difference between the two frags. 865 Prior to assigning frag addresses this will be zero. */ 866 off = frag1->fr_address - frag2->fr_address; 867 if (frag1 == frag2) 868 { 869 *offset = off; 870 return TRUE; 871 } 872 873 /* Maybe frag2 is after frag1. */ 874 frag = frag1; 875 while (frag->fr_type == rs_fill 876 || frag->fr_type == rs_align_test) 877 { 878 if (frag->fr_type == rs_fill) 879 off += frag->fr_fix + frag->fr_offset * frag->fr_var; 880 else 881 off += frag->fr_fix; 882 frag = frag->fr_next; 883 if (frag == NULL) 884 break; 885 if (frag == frag2) 886 { 887 *offset = off; 888 return TRUE; 889 } 890 } 891 892 /* Maybe frag1 is after frag2. */ 893 off = frag1->fr_address - frag2->fr_address; 894 frag = frag2; 895 while (frag->fr_type == rs_fill 896 || frag->fr_type == rs_align_test) 897 { 898 if (frag->fr_type == rs_fill) 899 off -= frag->fr_fix + frag->fr_offset * frag->fr_var; 900 else 901 off -= frag->fr_fix; 902 frag = frag->fr_next; 903 if (frag == NULL) 904 break; 905 if (frag == frag1) 906 { 907 *offset = off; 908 return TRUE; 909 } 910 } 911 912 return FALSE; 913} 914 915/* Optimize a difference of symbols which have rs_align_test frag if 916 possible. */ 917 918int 919sh_optimize_expr (expressionS *l, operatorT op, expressionS *r) 920{ 921 bfd_vma frag_off; 922 923 if (op == O_subtract 924 && l->X_op == O_symbol 925 && r->X_op == O_symbol 926 && S_GET_SEGMENT (l->X_add_symbol) == S_GET_SEGMENT (r->X_add_symbol) 927 && (SEG_NORMAL (S_GET_SEGMENT (l->X_add_symbol)) 928 || r->X_add_symbol == l->X_add_symbol) 929 && align_test_frag_offset_fixed_p (symbol_get_frag (l->X_add_symbol), 930 symbol_get_frag (r->X_add_symbol), 931 &frag_off)) 932 { 933 offsetT symval_diff = S_GET_VALUE (l->X_add_symbol) 934 - S_GET_VALUE (r->X_add_symbol); 935 subtract_from_result (l, r->X_add_number, r->X_extrabit); 936 subtract_from_result (l, frag_off / OCTETS_PER_BYTE, 0); 937 add_to_result (l, symval_diff, symval_diff < 0); 938 l->X_op = O_constant; 939 l->X_add_symbol = 0; 940 return 1; 941 } 942 return 0; 943} 944#endif /* OBJ_ELF */ 945 946/* This function is called once, at assembler startup time. This should 947 set up all the tables, etc that the MD part of the assembler needs. */ 948 949void 950md_begin (void) 951{ 952 const sh_opcode_info *opcode; 953 const char *prev_name = ""; 954 unsigned int target_arch; 955 956 target_arch 957 = preset_target_arch ? preset_target_arch : arch_sh_up & ~arch_sh_has_dsp; 958 valid_arch = target_arch; 959 960#ifdef HAVE_SH64 961 shmedia_md_begin (); 962#endif 963 964 opcode_hash_control = hash_new (); 965 966 /* Insert unique names into hash table. */ 967 for (opcode = sh_table; opcode->name; opcode++) 968 { 969 if (strcmp (prev_name, opcode->name) != 0) 970 { 971 if (!SH_MERGE_ARCH_SET_VALID (opcode->arch, target_arch)) 972 continue; 973 prev_name = opcode->name; 974 hash_insert (opcode_hash_control, opcode->name, (char *) opcode); 975 } 976 } 977} 978 979static int reg_m; 980static int reg_n; 981static int reg_x, reg_y; 982static int reg_efg; 983static int reg_b; 984 985#define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_') 986 987/* Try to parse a reg name. Return the number of chars consumed. */ 988 989static unsigned int 990parse_reg_without_prefix (char *src, sh_arg_type *mode, int *reg) 991{ 992 char l0 = TOLOWER (src[0]); 993 char l1 = l0 ? TOLOWER (src[1]) : 0; 994 995 /* We use ! IDENT_CHAR for the next character after the register name, to 996 make sure that we won't accidentally recognize a symbol name such as 997 'sram' or sr_ram as being a reference to the register 'sr'. */ 998 999 if (l0 == 'r') 1000 { 1001 if (l1 == '1') 1002 { 1003 if (src[2] >= '0' && src[2] <= '5' 1004 && ! IDENT_CHAR ((unsigned char) src[3])) 1005 { 1006 *mode = A_REG_N; 1007 *reg = 10 + src[2] - '0'; 1008 return 3; 1009 } 1010 } 1011 if (l1 >= '0' && l1 <= '9' 1012 && ! IDENT_CHAR ((unsigned char) src[2])) 1013 { 1014 *mode = A_REG_N; 1015 *reg = (l1 - '0'); 1016 return 2; 1017 } 1018 if (l1 >= '0' && l1 <= '7' && strncasecmp (&src[2], "_bank", 5) == 0 1019 && ! IDENT_CHAR ((unsigned char) src[7])) 1020 { 1021 *mode = A_REG_B; 1022 *reg = (l1 - '0'); 1023 return 7; 1024 } 1025 1026 if (l1 == 'e' && ! IDENT_CHAR ((unsigned char) src[2])) 1027 { 1028 *mode = A_RE; 1029 return 2; 1030 } 1031 if (l1 == 's' && ! IDENT_CHAR ((unsigned char) src[2])) 1032 { 1033 *mode = A_RS; 1034 return 2; 1035 } 1036 } 1037 1038 if (l0 == 'a') 1039 { 1040 if (l1 == '0') 1041 { 1042 if (! IDENT_CHAR ((unsigned char) src[2])) 1043 { 1044 *mode = DSP_REG_N; 1045 *reg = A_A0_NUM; 1046 return 2; 1047 } 1048 if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) 1049 { 1050 *mode = DSP_REG_N; 1051 *reg = A_A0G_NUM; 1052 return 3; 1053 } 1054 } 1055 if (l1 == '1') 1056 { 1057 if (! IDENT_CHAR ((unsigned char) src[2])) 1058 { 1059 *mode = DSP_REG_N; 1060 *reg = A_A1_NUM; 1061 return 2; 1062 } 1063 if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) 1064 { 1065 *mode = DSP_REG_N; 1066 *reg = A_A1G_NUM; 1067 return 3; 1068 } 1069 } 1070 1071 if (l1 == 'x' && src[2] >= '0' && src[2] <= '1' 1072 && ! IDENT_CHAR ((unsigned char) src[3])) 1073 { 1074 *mode = A_REG_N; 1075 *reg = 4 + (l1 - '0'); 1076 return 3; 1077 } 1078 if (l1 == 'y' && src[2] >= '0' && src[2] <= '1' 1079 && ! IDENT_CHAR ((unsigned char) src[3])) 1080 { 1081 *mode = A_REG_N; 1082 *reg = 6 + (l1 - '0'); 1083 return 3; 1084 } 1085 if (l1 == 's' && src[2] >= '0' && src[2] <= '3' 1086 && ! IDENT_CHAR ((unsigned char) src[3])) 1087 { 1088 int n = l1 - '0'; 1089 1090 *mode = A_REG_N; 1091 *reg = n | ((~n & 2) << 1); 1092 return 3; 1093 } 1094 } 1095 1096 if (l0 == 'i' && l1 && ! IDENT_CHAR ((unsigned char) src[2])) 1097 { 1098 if (l1 == 's') 1099 { 1100 *mode = A_REG_N; 1101 *reg = 8; 1102 return 2; 1103 } 1104 if (l1 == 'x') 1105 { 1106 *mode = A_REG_N; 1107 *reg = 8; 1108 return 2; 1109 } 1110 if (l1 == 'y') 1111 { 1112 *mode = A_REG_N; 1113 *reg = 9; 1114 return 2; 1115 } 1116 } 1117 1118 if (l0 == 'x' && l1 >= '0' && l1 <= '1' 1119 && ! IDENT_CHAR ((unsigned char) src[2])) 1120 { 1121 *mode = DSP_REG_N; 1122 *reg = A_X0_NUM + l1 - '0'; 1123 return 2; 1124 } 1125 1126 if (l0 == 'y' && l1 >= '0' && l1 <= '1' 1127 && ! IDENT_CHAR ((unsigned char) src[2])) 1128 { 1129 *mode = DSP_REG_N; 1130 *reg = A_Y0_NUM + l1 - '0'; 1131 return 2; 1132 } 1133 1134 if (l0 == 'm' && l1 >= '0' && l1 <= '1' 1135 && ! IDENT_CHAR ((unsigned char) src[2])) 1136 { 1137 *mode = DSP_REG_N; 1138 *reg = l1 == '0' ? A_M0_NUM : A_M1_NUM; 1139 return 2; 1140 } 1141 1142 if (l0 == 's' 1143 && l1 == 's' 1144 && TOLOWER (src[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src[3])) 1145 { 1146 *mode = A_SSR; 1147 return 3; 1148 } 1149 1150 if (l0 == 's' && l1 == 'p' && TOLOWER (src[2]) == 'c' 1151 && ! IDENT_CHAR ((unsigned char) src[3])) 1152 { 1153 *mode = A_SPC; 1154 return 3; 1155 } 1156 1157 if (l0 == 's' && l1 == 'g' && TOLOWER (src[2]) == 'r' 1158 && ! IDENT_CHAR ((unsigned char) src[3])) 1159 { 1160 *mode = A_SGR; 1161 return 3; 1162 } 1163 1164 if (l0 == 'd' && l1 == 's' && TOLOWER (src[2]) == 'r' 1165 && ! IDENT_CHAR ((unsigned char) src[3])) 1166 { 1167 *mode = A_DSR; 1168 return 3; 1169 } 1170 1171 if (l0 == 'd' && l1 == 'b' && TOLOWER (src[2]) == 'r' 1172 && ! IDENT_CHAR ((unsigned char) src[3])) 1173 { 1174 *mode = A_DBR; 1175 return 3; 1176 } 1177 1178 if (l0 == 's' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) 1179 { 1180 *mode = A_SR; 1181 return 2; 1182 } 1183 1184 if (l0 == 's' && l1 == 'p' && ! IDENT_CHAR ((unsigned char) src[2])) 1185 { 1186 *mode = A_REG_N; 1187 *reg = 15; 1188 return 2; 1189 } 1190 1191 if (l0 == 'p' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) 1192 { 1193 *mode = A_PR; 1194 return 2; 1195 } 1196 if (l0 == 'p' && l1 == 'c' && ! IDENT_CHAR ((unsigned char) src[2])) 1197 { 1198 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0' 1199 and use an uninitialized immediate. */ 1200 *mode = A_PC; 1201 return 2; 1202 } 1203 if (l0 == 'g' && l1 == 'b' && TOLOWER (src[2]) == 'r' 1204 && ! IDENT_CHAR ((unsigned char) src[3])) 1205 { 1206 *mode = A_GBR; 1207 return 3; 1208 } 1209 if (l0 == 'v' && l1 == 'b' && TOLOWER (src[2]) == 'r' 1210 && ! IDENT_CHAR ((unsigned char) src[3])) 1211 { 1212 *mode = A_VBR; 1213 return 3; 1214 } 1215 1216 if (l0 == 't' && l1 == 'b' && TOLOWER (src[2]) == 'r' 1217 && ! IDENT_CHAR ((unsigned char) src[3])) 1218 { 1219 *mode = A_TBR; 1220 return 3; 1221 } 1222 if (l0 == 'm' && l1 == 'a' && TOLOWER (src[2]) == 'c' 1223 && ! IDENT_CHAR ((unsigned char) src[4])) 1224 { 1225 if (TOLOWER (src[3]) == 'l') 1226 { 1227 *mode = A_MACL; 1228 return 4; 1229 } 1230 if (TOLOWER (src[3]) == 'h') 1231 { 1232 *mode = A_MACH; 1233 return 4; 1234 } 1235 } 1236 if (l0 == 'm' && l1 == 'o' && TOLOWER (src[2]) == 'd' 1237 && ! IDENT_CHAR ((unsigned char) src[3])) 1238 { 1239 *mode = A_MOD; 1240 return 3; 1241 } 1242 if (l0 == 'f' && l1 == 'r') 1243 { 1244 if (src[2] == '1') 1245 { 1246 if (src[3] >= '0' && src[3] <= '5' 1247 && ! IDENT_CHAR ((unsigned char) src[4])) 1248 { 1249 *mode = F_REG_N; 1250 *reg = 10 + src[3] - '0'; 1251 return 4; 1252 } 1253 } 1254 if (src[2] >= '0' && src[2] <= '9' 1255 && ! IDENT_CHAR ((unsigned char) src[3])) 1256 { 1257 *mode = F_REG_N; 1258 *reg = (src[2] - '0'); 1259 return 3; 1260 } 1261 } 1262 if (l0 == 'd' && l1 == 'r') 1263 { 1264 if (src[2] == '1') 1265 { 1266 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) 1267 && ! IDENT_CHAR ((unsigned char) src[4])) 1268 { 1269 *mode = D_REG_N; 1270 *reg = 10 + src[3] - '0'; 1271 return 4; 1272 } 1273 } 1274 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) 1275 && ! IDENT_CHAR ((unsigned char) src[3])) 1276 { 1277 *mode = D_REG_N; 1278 *reg = (src[2] - '0'); 1279 return 3; 1280 } 1281 } 1282 if (l0 == 'x' && l1 == 'd') 1283 { 1284 if (src[2] == '1') 1285 { 1286 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) 1287 && ! IDENT_CHAR ((unsigned char) src[4])) 1288 { 1289 *mode = X_REG_N; 1290 *reg = 11 + src[3] - '0'; 1291 return 4; 1292 } 1293 } 1294 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) 1295 && ! IDENT_CHAR ((unsigned char) src[3])) 1296 { 1297 *mode = X_REG_N; 1298 *reg = (src[2] - '0') + 1; 1299 return 3; 1300 } 1301 } 1302 if (l0 == 'f' && l1 == 'v') 1303 { 1304 if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4])) 1305 { 1306 *mode = V_REG_N; 1307 *reg = 12; 1308 return 4; 1309 } 1310 if ((src[2] == '0' || src[2] == '4' || src[2] == '8') 1311 && ! IDENT_CHAR ((unsigned char) src[3])) 1312 { 1313 *mode = V_REG_N; 1314 *reg = (src[2] - '0'); 1315 return 3; 1316 } 1317 } 1318 if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 'u' 1319 && TOLOWER (src[3]) == 'l' 1320 && ! IDENT_CHAR ((unsigned char) src[4])) 1321 { 1322 *mode = FPUL_N; 1323 return 4; 1324 } 1325 1326 if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 's' 1327 && TOLOWER (src[3]) == 'c' 1328 && TOLOWER (src[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src[5])) 1329 { 1330 *mode = FPSCR_N; 1331 return 5; 1332 } 1333 1334 if (l0 == 'x' && l1 == 'm' && TOLOWER (src[2]) == 't' 1335 && TOLOWER (src[3]) == 'r' 1336 && TOLOWER (src[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src[5])) 1337 { 1338 *mode = XMTRX_M4; 1339 return 5; 1340 } 1341 1342 return 0; 1343} 1344 1345/* Like parse_reg_without_prefix, but this version supports 1346 $-prefixed register names if enabled by the user. */ 1347 1348static unsigned int 1349parse_reg (char *src, sh_arg_type *mode, int *reg) 1350{ 1351 unsigned int prefix; 1352 unsigned int consumed; 1353 1354 if (src[0] == '$') 1355 { 1356 if (allow_dollar_register_prefix) 1357 { 1358 src ++; 1359 prefix = 1; 1360 } 1361 else 1362 return 0; 1363 } 1364 else 1365 prefix = 0; 1366 1367 consumed = parse_reg_without_prefix (src, mode, reg); 1368 1369 if (consumed == 0) 1370 return 0; 1371 1372 return consumed + prefix; 1373} 1374 1375static char * 1376parse_exp (char *s, sh_operand_info *op) 1377{ 1378 char *save; 1379 char *new_pointer; 1380 1381 save = input_line_pointer; 1382 input_line_pointer = s; 1383 expression (&op->immediate); 1384 if (op->immediate.X_op == O_absent) 1385 as_bad (_("missing operand")); 1386 new_pointer = input_line_pointer; 1387 input_line_pointer = save; 1388 return new_pointer; 1389} 1390 1391/* The many forms of operand: 1392 1393 Rn Register direct 1394 @Rn Register indirect 1395 @Rn+ Autoincrement 1396 @-Rn Autodecrement 1397 @(disp:4,Rn) 1398 @(disp:8,GBR) 1399 @(disp:8,PC) 1400 1401 @(R0,Rn) 1402 @(R0,GBR) 1403 1404 disp:8 1405 disp:12 1406 #imm8 1407 pr, gbr, vbr, macl, mach 1408 */ 1409 1410static char * 1411parse_at (char *src, sh_operand_info *op) 1412{ 1413 int len; 1414 sh_arg_type mode; 1415 src++; 1416 if (src[0] == '@') 1417 { 1418 src = parse_at (src, op); 1419 if (op->type == A_DISP_TBR) 1420 op->type = A_DISP2_TBR; 1421 else 1422 as_bad (_("illegal double indirection")); 1423 } 1424 else if (src[0] == '-') 1425 { 1426 /* Must be predecrement. */ 1427 src++; 1428 1429 len = parse_reg (src, &mode, &(op->reg)); 1430 if (mode != A_REG_N) 1431 as_bad (_("illegal register after @-")); 1432 1433 op->type = A_DEC_N; 1434 src += len; 1435 } 1436 else if (src[0] == '(') 1437 { 1438 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or 1439 @(r0, rn). */ 1440 src++; 1441 len = parse_reg (src, &mode, &(op->reg)); 1442 if (len && mode == A_REG_N) 1443 { 1444 src += len; 1445 if (op->reg != 0) 1446 { 1447 as_bad (_("must be @(r0,...)")); 1448 } 1449 if (src[0] == ',') 1450 { 1451 src++; 1452 /* Now can be rn or gbr. */ 1453 len = parse_reg (src, &mode, &(op->reg)); 1454 } 1455 else 1456 { 1457 len = 0; 1458 } 1459 if (len) 1460 { 1461 if (mode == A_GBR) 1462 { 1463 op->type = A_R0_GBR; 1464 } 1465 else if (mode == A_REG_N) 1466 { 1467 op->type = A_IND_R0_REG_N; 1468 } 1469 else 1470 { 1471 as_bad (_("syntax error in @(r0,...)")); 1472 } 1473 } 1474 else 1475 { 1476 as_bad (_("syntax error in @(r0...)")); 1477 } 1478 } 1479 else 1480 { 1481 /* Must be an @(disp,.. thing). */ 1482 src = parse_exp (src, op); 1483 if (src[0] == ',') 1484 src++; 1485 /* Now can be rn, gbr or pc. */ 1486 len = parse_reg (src, &mode, &op->reg); 1487 if (len) 1488 { 1489 if (mode == A_REG_N) 1490 { 1491 op->type = A_DISP_REG_N; 1492 } 1493 else if (mode == A_GBR) 1494 { 1495 op->type = A_DISP_GBR; 1496 } 1497 else if (mode == A_TBR) 1498 { 1499 op->type = A_DISP_TBR; 1500 } 1501 else if (mode == A_PC) 1502 { 1503 /* We want @(expr, pc) to uniformly address . + expr, 1504 no matter if expr is a constant, or a more complex 1505 expression, e.g. sym-. or sym1-sym2. 1506 However, we also used to accept @(sym,pc) 1507 as addressing sym, i.e. meaning the same as plain sym. 1508 Some existing code does use the @(sym,pc) syntax, so 1509 we give it the old semantics for now, but warn about 1510 its use, so that users have some time to fix their code. 1511 1512 Note that due to this backward compatibility hack, 1513 we'll get unexpected results when @(offset, pc) is used, 1514 and offset is a symbol that is set later to an an address 1515 difference, or an external symbol that is set to an 1516 address difference in another source file, so we want to 1517 eventually remove it. */ 1518 if (op->immediate.X_op == O_symbol) 1519 { 1520 op->type = A_DISP_PC; 1521 as_warn (_("Deprecated syntax.")); 1522 } 1523 else 1524 { 1525 op->type = A_DISP_PC_ABS; 1526 /* Such operands don't get corrected for PC==.+4, so 1527 make the correction here. */ 1528 op->immediate.X_add_number -= 4; 1529 } 1530 } 1531 else 1532 { 1533 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); 1534 } 1535 } 1536 else 1537 { 1538 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); 1539 } 1540 } 1541 src += len; 1542 if (src[0] != ')') 1543 as_bad (_("expecting )")); 1544 else 1545 src++; 1546 } 1547 else 1548 { 1549 src += parse_reg (src, &mode, &(op->reg)); 1550 if (mode != A_REG_N) 1551 as_bad (_("illegal register after @")); 1552 1553 if (src[0] == '+') 1554 { 1555 char l0, l1; 1556 1557 src++; 1558 l0 = TOLOWER (src[0]); 1559 l1 = TOLOWER (src[1]); 1560 1561 if ((l0 == 'r' && l1 == '8') 1562 || (l0 == 'i' && (l1 == 'x' || l1 == 's'))) 1563 { 1564 src += 2; 1565 op->type = AX_PMOD_N; 1566 } 1567 else if ( (l0 == 'r' && l1 == '9') 1568 || (l0 == 'i' && l1 == 'y')) 1569 { 1570 src += 2; 1571 op->type = AY_PMOD_N; 1572 } 1573 else 1574 op->type = A_INC_N; 1575 } 1576 else 1577 op->type = A_IND_N; 1578 } 1579 return src; 1580} 1581 1582static void 1583get_operand (char **ptr, sh_operand_info *op) 1584{ 1585 char *src = *ptr; 1586 sh_arg_type mode = (sh_arg_type) -1; 1587 unsigned int len; 1588 1589 if (src[0] == '#') 1590 { 1591 src++; 1592 *ptr = parse_exp (src, op); 1593 op->type = A_IMM; 1594 return; 1595 } 1596 1597 else if (src[0] == '@') 1598 { 1599 *ptr = parse_at (src, op); 1600 return; 1601 } 1602 len = parse_reg (src, &mode, &(op->reg)); 1603 if (len) 1604 { 1605 *ptr = src + len; 1606 op->type = mode; 1607 return; 1608 } 1609 else 1610 { 1611 /* Not a reg, the only thing left is a displacement. */ 1612 *ptr = parse_exp (src, op); 1613 op->type = A_DISP_PC; 1614 return; 1615 } 1616} 1617 1618static char * 1619get_operands (sh_opcode_info *info, char *args, sh_operand_info *operand) 1620{ 1621 char *ptr = args; 1622 if (info->arg[0]) 1623 { 1624 /* The pre-processor will eliminate whitespace in front of '@' 1625 after the first argument; we may be called multiple times 1626 from assemble_ppi, so don't insist on finding whitespace here. */ 1627 if (*ptr == ' ') 1628 ptr++; 1629 1630 get_operand (&ptr, operand + 0); 1631 if (info->arg[1]) 1632 { 1633 if (*ptr == ',') 1634 { 1635 ptr++; 1636 } 1637 get_operand (&ptr, operand + 1); 1638 /* ??? Hack: psha/pshl have a varying operand number depending on 1639 the type of the first operand. We handle this by having the 1640 three-operand version first and reducing the number of operands 1641 parsed to two if we see that the first operand is an immediate. 1642 This works because no insn with three operands has an immediate 1643 as first operand. */ 1644 if (info->arg[2] && operand[0].type != A_IMM) 1645 { 1646 if (*ptr == ',') 1647 { 1648 ptr++; 1649 } 1650 get_operand (&ptr, operand + 2); 1651 } 1652 else 1653 { 1654 operand[2].type = 0; 1655 } 1656 } 1657 else 1658 { 1659 operand[1].type = 0; 1660 operand[2].type = 0; 1661 } 1662 } 1663 else 1664 { 1665 operand[0].type = 0; 1666 operand[1].type = 0; 1667 operand[2].type = 0; 1668 } 1669 return ptr; 1670} 1671 1672/* Passed a pointer to a list of opcodes which use different 1673 addressing modes, return the opcode which matches the opcodes 1674 provided. */ 1675 1676static sh_opcode_info * 1677get_specific (sh_opcode_info *opcode, sh_operand_info *operands) 1678{ 1679 sh_opcode_info *this_try = opcode; 1680 const char *name = opcode->name; 1681 int n = 0; 1682 1683 while (opcode->name) 1684 { 1685 this_try = opcode++; 1686 if ((this_try->name != name) && (strcmp (this_try->name, name) != 0)) 1687 { 1688 /* We've looked so far down the table that we've run out of 1689 opcodes with the same name. */ 1690 return 0; 1691 } 1692 1693 /* Look at both operands needed by the opcodes and provided by 1694 the user - since an arg test will often fail on the same arg 1695 again and again, we'll try and test the last failing arg the 1696 first on each opcode try. */ 1697 for (n = 0; this_try->arg[n]; n++) 1698 { 1699 sh_operand_info *user = operands + n; 1700 sh_arg_type arg = this_try->arg[n]; 1701 1702 switch (arg) 1703 { 1704 case A_DISP_PC: 1705 if (user->type == A_DISP_PC_ABS) 1706 break; 1707 /* Fall through. */ 1708 case A_IMM: 1709 case A_BDISP12: 1710 case A_BDISP8: 1711 case A_DISP_GBR: 1712 case A_DISP2_TBR: 1713 case A_MACH: 1714 case A_PR: 1715 case A_MACL: 1716 if (user->type != arg) 1717 goto fail; 1718 break; 1719 case A_R0: 1720 /* opcode needs r0 */ 1721 if (user->type != A_REG_N || user->reg != 0) 1722 goto fail; 1723 break; 1724 case A_R0_GBR: 1725 if (user->type != A_R0_GBR || user->reg != 0) 1726 goto fail; 1727 break; 1728 case F_FR0: 1729 if (user->type != F_REG_N || user->reg != 0) 1730 goto fail; 1731 break; 1732 1733 case A_REG_N: 1734 case A_INC_N: 1735 case A_DEC_N: 1736 case A_IND_N: 1737 case A_IND_R0_REG_N: 1738 case A_DISP_REG_N: 1739 case F_REG_N: 1740 case D_REG_N: 1741 case X_REG_N: 1742 case V_REG_N: 1743 case FPUL_N: 1744 case FPSCR_N: 1745 case DSP_REG_N: 1746 /* Opcode needs rn */ 1747 if (user->type != arg) 1748 goto fail; 1749 reg_n = user->reg; 1750 break; 1751 case DX_REG_N: 1752 if (user->type != D_REG_N && user->type != X_REG_N) 1753 goto fail; 1754 reg_n = user->reg; 1755 break; 1756 case A_GBR: 1757 case A_TBR: 1758 case A_SR: 1759 case A_VBR: 1760 case A_DSR: 1761 case A_MOD: 1762 case A_RE: 1763 case A_RS: 1764 case A_SSR: 1765 case A_SPC: 1766 case A_SGR: 1767 case A_DBR: 1768 if (user->type != arg) 1769 goto fail; 1770 break; 1771 1772 case A_REG_B: 1773 if (user->type != arg) 1774 goto fail; 1775 reg_b = user->reg; 1776 break; 1777 1778 case A_INC_R15: 1779 if (user->type != A_INC_N) 1780 goto fail; 1781 if (user->reg != 15) 1782 goto fail; 1783 reg_n = user->reg; 1784 break; 1785 1786 case A_DEC_R15: 1787 if (user->type != A_DEC_N) 1788 goto fail; 1789 if (user->reg != 15) 1790 goto fail; 1791 reg_n = user->reg; 1792 break; 1793 1794 case A_REG_M: 1795 case A_INC_M: 1796 case A_DEC_M: 1797 case A_IND_M: 1798 case A_IND_R0_REG_M: 1799 case A_DISP_REG_M: 1800 case DSP_REG_M: 1801 /* Opcode needs rn */ 1802 if (user->type != arg - A_REG_M + A_REG_N) 1803 goto fail; 1804 reg_m = user->reg; 1805 break; 1806 1807 case AS_DEC_N: 1808 if (user->type != A_DEC_N) 1809 goto fail; 1810 if (user->reg < 2 || user->reg > 5) 1811 goto fail; 1812 reg_n = user->reg; 1813 break; 1814 1815 case AS_INC_N: 1816 if (user->type != A_INC_N) 1817 goto fail; 1818 if (user->reg < 2 || user->reg > 5) 1819 goto fail; 1820 reg_n = user->reg; 1821 break; 1822 1823 case AS_IND_N: 1824 if (user->type != A_IND_N) 1825 goto fail; 1826 if (user->reg < 2 || user->reg > 5) 1827 goto fail; 1828 reg_n = user->reg; 1829 break; 1830 1831 case AS_PMOD_N: 1832 if (user->type != AX_PMOD_N) 1833 goto fail; 1834 if (user->reg < 2 || user->reg > 5) 1835 goto fail; 1836 reg_n = user->reg; 1837 break; 1838 1839 case AX_INC_N: 1840 if (user->type != A_INC_N) 1841 goto fail; 1842 if (user->reg < 4 || user->reg > 5) 1843 goto fail; 1844 reg_n = user->reg; 1845 break; 1846 1847 case AX_IND_N: 1848 if (user->type != A_IND_N) 1849 goto fail; 1850 if (user->reg < 4 || user->reg > 5) 1851 goto fail; 1852 reg_n = user->reg; 1853 break; 1854 1855 case AX_PMOD_N: 1856 if (user->type != AX_PMOD_N) 1857 goto fail; 1858 if (user->reg < 4 || user->reg > 5) 1859 goto fail; 1860 reg_n = user->reg; 1861 break; 1862 1863 case AXY_INC_N: 1864 if (user->type != A_INC_N) 1865 goto fail; 1866 if ((user->reg < 4 || user->reg > 5) 1867 && (user->reg < 0 || user->reg > 1)) 1868 goto fail; 1869 reg_n = user->reg; 1870 break; 1871 1872 case AXY_IND_N: 1873 if (user->type != A_IND_N) 1874 goto fail; 1875 if ((user->reg < 4 || user->reg > 5) 1876 && (user->reg < 0 || user->reg > 1)) 1877 goto fail; 1878 reg_n = user->reg; 1879 break; 1880 1881 case AXY_PMOD_N: 1882 if (user->type != AX_PMOD_N) 1883 goto fail; 1884 if ((user->reg < 4 || user->reg > 5) 1885 && (user->reg < 0 || user->reg > 1)) 1886 goto fail; 1887 reg_n = user->reg; 1888 break; 1889 1890 case AY_INC_N: 1891 if (user->type != A_INC_N) 1892 goto fail; 1893 if (user->reg < 6 || user->reg > 7) 1894 goto fail; 1895 reg_n = user->reg; 1896 break; 1897 1898 case AY_IND_N: 1899 if (user->type != A_IND_N) 1900 goto fail; 1901 if (user->reg < 6 || user->reg > 7) 1902 goto fail; 1903 reg_n = user->reg; 1904 break; 1905 1906 case AY_PMOD_N: 1907 if (user->type != AY_PMOD_N) 1908 goto fail; 1909 if (user->reg < 6 || user->reg > 7) 1910 goto fail; 1911 reg_n = user->reg; 1912 break; 1913 1914 case AYX_INC_N: 1915 if (user->type != A_INC_N) 1916 goto fail; 1917 if ((user->reg < 6 || user->reg > 7) 1918 && (user->reg < 2 || user->reg > 3)) 1919 goto fail; 1920 reg_n = user->reg; 1921 break; 1922 1923 case AYX_IND_N: 1924 if (user->type != A_IND_N) 1925 goto fail; 1926 if ((user->reg < 6 || user->reg > 7) 1927 && (user->reg < 2 || user->reg > 3)) 1928 goto fail; 1929 reg_n = user->reg; 1930 break; 1931 1932 case AYX_PMOD_N: 1933 if (user->type != AY_PMOD_N) 1934 goto fail; 1935 if ((user->reg < 6 || user->reg > 7) 1936 && (user->reg < 2 || user->reg > 3)) 1937 goto fail; 1938 reg_n = user->reg; 1939 break; 1940 1941 case DSP_REG_A_M: 1942 if (user->type != DSP_REG_N) 1943 goto fail; 1944 if (user->reg != A_A0_NUM 1945 && user->reg != A_A1_NUM) 1946 goto fail; 1947 reg_m = user->reg; 1948 break; 1949 1950 case DSP_REG_AX: 1951 if (user->type != DSP_REG_N) 1952 goto fail; 1953 switch (user->reg) 1954 { 1955 case A_A0_NUM: 1956 reg_x = 0; 1957 break; 1958 case A_A1_NUM: 1959 reg_x = 2; 1960 break; 1961 case A_X0_NUM: 1962 reg_x = 1; 1963 break; 1964 case A_X1_NUM: 1965 reg_x = 3; 1966 break; 1967 default: 1968 goto fail; 1969 } 1970 break; 1971 1972 case DSP_REG_XY: 1973 if (user->type != DSP_REG_N) 1974 goto fail; 1975 switch (user->reg) 1976 { 1977 case A_X0_NUM: 1978 reg_x = 0; 1979 break; 1980 case A_X1_NUM: 1981 reg_x = 2; 1982 break; 1983 case A_Y0_NUM: 1984 reg_x = 1; 1985 break; 1986 case A_Y1_NUM: 1987 reg_x = 3; 1988 break; 1989 default: 1990 goto fail; 1991 } 1992 break; 1993 1994 case DSP_REG_AY: 1995 if (user->type != DSP_REG_N) 1996 goto fail; 1997 switch (user->reg) 1998 { 1999 case A_A0_NUM: 2000 reg_y = 0; 2001 break; 2002 case A_A1_NUM: 2003 reg_y = 1; 2004 break; 2005 case A_Y0_NUM: 2006 reg_y = 2; 2007 break; 2008 case A_Y1_NUM: 2009 reg_y = 3; 2010 break; 2011 default: 2012 goto fail; 2013 } 2014 break; 2015 2016 case DSP_REG_YX: 2017 if (user->type != DSP_REG_N) 2018 goto fail; 2019 switch (user->reg) 2020 { 2021 case A_Y0_NUM: 2022 reg_y = 0; 2023 break; 2024 case A_Y1_NUM: 2025 reg_y = 1; 2026 break; 2027 case A_X0_NUM: 2028 reg_y = 2; 2029 break; 2030 case A_X1_NUM: 2031 reg_y = 3; 2032 break; 2033 default: 2034 goto fail; 2035 } 2036 break; 2037 2038 case DSP_REG_X: 2039 if (user->type != DSP_REG_N) 2040 goto fail; 2041 switch (user->reg) 2042 { 2043 case A_X0_NUM: 2044 reg_x = 0; 2045 break; 2046 case A_X1_NUM: 2047 reg_x = 1; 2048 break; 2049 case A_A0_NUM: 2050 reg_x = 2; 2051 break; 2052 case A_A1_NUM: 2053 reg_x = 3; 2054 break; 2055 default: 2056 goto fail; 2057 } 2058 break; 2059 2060 case DSP_REG_Y: 2061 if (user->type != DSP_REG_N) 2062 goto fail; 2063 switch (user->reg) 2064 { 2065 case A_Y0_NUM: 2066 reg_y = 0; 2067 break; 2068 case A_Y1_NUM: 2069 reg_y = 1; 2070 break; 2071 case A_M0_NUM: 2072 reg_y = 2; 2073 break; 2074 case A_M1_NUM: 2075 reg_y = 3; 2076 break; 2077 default: 2078 goto fail; 2079 } 2080 break; 2081 2082 case DSP_REG_E: 2083 if (user->type != DSP_REG_N) 2084 goto fail; 2085 switch (user->reg) 2086 { 2087 case A_X0_NUM: 2088 reg_efg = 0 << 10; 2089 break; 2090 case A_X1_NUM: 2091 reg_efg = 1 << 10; 2092 break; 2093 case A_Y0_NUM: 2094 reg_efg = 2 << 10; 2095 break; 2096 case A_A1_NUM: 2097 reg_efg = 3 << 10; 2098 break; 2099 default: 2100 goto fail; 2101 } 2102 break; 2103 2104 case DSP_REG_F: 2105 if (user->type != DSP_REG_N) 2106 goto fail; 2107 switch (user->reg) 2108 { 2109 case A_Y0_NUM: 2110 reg_efg |= 0 << 8; 2111 break; 2112 case A_Y1_NUM: 2113 reg_efg |= 1 << 8; 2114 break; 2115 case A_X0_NUM: 2116 reg_efg |= 2 << 8; 2117 break; 2118 case A_A1_NUM: 2119 reg_efg |= 3 << 8; 2120 break; 2121 default: 2122 goto fail; 2123 } 2124 break; 2125 2126 case DSP_REG_G: 2127 if (user->type != DSP_REG_N) 2128 goto fail; 2129 switch (user->reg) 2130 { 2131 case A_M0_NUM: 2132 reg_efg |= 0 << 2; 2133 break; 2134 case A_M1_NUM: 2135 reg_efg |= 1 << 2; 2136 break; 2137 case A_A0_NUM: 2138 reg_efg |= 2 << 2; 2139 break; 2140 case A_A1_NUM: 2141 reg_efg |= 3 << 2; 2142 break; 2143 default: 2144 goto fail; 2145 } 2146 break; 2147 2148 case A_A0: 2149 if (user->type != DSP_REG_N || user->reg != A_A0_NUM) 2150 goto fail; 2151 break; 2152 case A_X0: 2153 if (user->type != DSP_REG_N || user->reg != A_X0_NUM) 2154 goto fail; 2155 break; 2156 case A_X1: 2157 if (user->type != DSP_REG_N || user->reg != A_X1_NUM) 2158 goto fail; 2159 break; 2160 case A_Y0: 2161 if (user->type != DSP_REG_N || user->reg != A_Y0_NUM) 2162 goto fail; 2163 break; 2164 case A_Y1: 2165 if (user->type != DSP_REG_N || user->reg != A_Y1_NUM) 2166 goto fail; 2167 break; 2168 2169 case F_REG_M: 2170 case D_REG_M: 2171 case X_REG_M: 2172 case V_REG_M: 2173 case FPUL_M: 2174 case FPSCR_M: 2175 /* Opcode needs rn */ 2176 if (user->type != arg - F_REG_M + F_REG_N) 2177 goto fail; 2178 reg_m = user->reg; 2179 break; 2180 case DX_REG_M: 2181 if (user->type != D_REG_N && user->type != X_REG_N) 2182 goto fail; 2183 reg_m = user->reg; 2184 break; 2185 case XMTRX_M4: 2186 if (user->type != XMTRX_M4) 2187 goto fail; 2188 reg_m = 4; 2189 break; 2190 2191 default: 2192 printf (_("unhandled %d\n"), arg); 2193 goto fail; 2194 } 2195 if (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh2a_nofpu_up) 2196 && ( arg == A_DISP_REG_M 2197 || arg == A_DISP_REG_N)) 2198 { 2199 /* Check a few key IMM* fields for overflow. */ 2200 int opf; 2201 long val = user->immediate.X_add_number; 2202 2203 for (opf = 0; opf < 4; opf ++) 2204 switch (this_try->nibbles[opf]) 2205 { 2206 case IMM0_4: 2207 case IMM1_4: 2208 if (val < 0 || val > 15) 2209 goto fail; 2210 break; 2211 case IMM0_4BY2: 2212 case IMM1_4BY2: 2213 if (val < 0 || val > 15 * 2) 2214 goto fail; 2215 break; 2216 case IMM0_4BY4: 2217 case IMM1_4BY4: 2218 if (val < 0 || val > 15 * 4) 2219 goto fail; 2220 break; 2221 default: 2222 break; 2223 } 2224 } 2225 } 2226 if ( !SH_MERGE_ARCH_SET_VALID (valid_arch, this_try->arch)) 2227 goto fail; 2228 valid_arch = SH_MERGE_ARCH_SET (valid_arch, this_try->arch); 2229 return this_try; 2230 fail: 2231 ; 2232 } 2233 2234 return 0; 2235} 2236 2237static void 2238insert (char *where, bfd_reloc_code_real_type how, int pcrel, 2239 sh_operand_info *op) 2240{ 2241 fix_new_exp (frag_now, 2242 where - frag_now->fr_literal, 2243 2, 2244 &op->immediate, 2245 pcrel, 2246 how); 2247} 2248 2249static void 2250insert4 (char * where, bfd_reloc_code_real_type how, int pcrel, 2251 sh_operand_info * op) 2252{ 2253 fix_new_exp (frag_now, 2254 where - frag_now->fr_literal, 2255 4, 2256 & op->immediate, 2257 pcrel, 2258 how); 2259} 2260static void 2261build_relax (sh_opcode_info *opcode, sh_operand_info *op) 2262{ 2263 int high_byte = target_big_endian ? 0 : 1; 2264 char *p; 2265 2266 if (opcode->arg[0] == A_BDISP8) 2267 { 2268 int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP; 2269 p = frag_var (rs_machine_dependent, 2270 md_relax_table[C (what, COND32)].rlx_length, 2271 md_relax_table[C (what, COND8)].rlx_length, 2272 C (what, 0), 2273 op->immediate.X_add_symbol, 2274 op->immediate.X_add_number, 2275 0); 2276 p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]); 2277 } 2278 else if (opcode->arg[0] == A_BDISP12) 2279 { 2280 p = frag_var (rs_machine_dependent, 2281 md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length, 2282 md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length, 2283 C (UNCOND_JUMP, 0), 2284 op->immediate.X_add_symbol, 2285 op->immediate.X_add_number, 2286 0); 2287 p[high_byte] = (opcode->nibbles[0] << 4); 2288 } 2289 2290} 2291 2292/* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */ 2293 2294static char * 2295insert_loop_bounds (char *output, sh_operand_info *operand) 2296{ 2297 symbolS *end_sym; 2298 2299 /* Since the low byte of the opcode will be overwritten by the reloc, we 2300 can just stash the high byte into both bytes and ignore endianness. */ 2301 output[0] = 0x8c; 2302 output[1] = 0x8c; 2303 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); 2304 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); 2305 2306 if (sh_relax) 2307 { 2308 static int count = 0; 2309 char name[11]; 2310 2311 /* If the last loop insn is a two-byte-insn, it is in danger of being 2312 swapped with the insn after it. To prevent this, create a new 2313 symbol - complete with SH_LABEL reloc - after the last loop insn. 2314 If the last loop insn is four bytes long, the symbol will be 2315 right in the middle, but four byte insns are not swapped anyways. */ 2316 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space. 2317 Hence a 9 digit number should be enough to count all REPEATs. */ 2318 sprintf (name, "_R%x", count++ & 0x3fffffff); 2319 end_sym = symbol_new (name, undefined_section, 0, &zero_address_frag); 2320 /* Make this a local symbol. */ 2321#ifdef OBJ_COFF 2322 SF_SET_LOCAL (end_sym); 2323#endif /* OBJ_COFF */ 2324 symbol_table_insert (end_sym); 2325 end_sym->sy_value = operand[1].immediate; 2326 end_sym->sy_value.X_add_number += 2; 2327 fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL); 2328 } 2329 2330 output = frag_more (2); 2331 output[0] = 0x8e; 2332 output[1] = 0x8e; 2333 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); 2334 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); 2335 2336 return frag_more (2); 2337} 2338 2339/* Now we know what sort of opcodes it is, let's build the bytes. */ 2340 2341static unsigned int 2342build_Mytes (sh_opcode_info *opcode, sh_operand_info *operand) 2343{ 2344 int indx; 2345 char nbuf[8]; 2346 char *output; 2347 unsigned int size = 2; 2348 int low_byte = target_big_endian ? 1 : 0; 2349 int max_index = 4; 2350 bfd_reloc_code_real_type r_type; 2351#ifdef OBJ_ELF 2352 int unhandled_pic = 0; 2353#endif 2354 2355 nbuf[0] = 0; 2356 nbuf[1] = 0; 2357 nbuf[2] = 0; 2358 nbuf[3] = 0; 2359 nbuf[4] = 0; 2360 nbuf[5] = 0; 2361 nbuf[6] = 0; 2362 nbuf[7] = 0; 2363 2364#ifdef OBJ_ELF 2365 for (indx = 0; indx < 3; indx++) 2366 if (opcode->arg[indx] == A_IMM 2367 && operand[indx].type == A_IMM 2368 && (operand[indx].immediate.X_op == O_PIC_reloc 2369 || sh_PIC_related_p (operand[indx].immediate.X_add_symbol) 2370 || sh_PIC_related_p (operand[indx].immediate.X_op_symbol))) 2371 unhandled_pic = 1; 2372#endif 2373 2374 if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32)) 2375 { 2376 output = frag_more (4); 2377 size = 4; 2378 max_index = 8; 2379 } 2380 else 2381 output = frag_more (2); 2382 2383 for (indx = 0; indx < max_index; indx++) 2384 { 2385 sh_nibble_type i = opcode->nibbles[indx]; 2386 if (i < 16) 2387 { 2388 nbuf[indx] = i; 2389 } 2390 else 2391 { 2392 switch (i) 2393 { 2394 case REG_N: 2395 case REG_N_D: 2396 nbuf[indx] = reg_n; 2397 break; 2398 case REG_M: 2399 nbuf[indx] = reg_m; 2400 break; 2401 case SDT_REG_N: 2402 if (reg_n < 2 || reg_n > 5) 2403 as_bad (_("Invalid register: 'r%d'"), reg_n); 2404 nbuf[indx] = (reg_n & 3) | 4; 2405 break; 2406 case REG_NM: 2407 nbuf[indx] = reg_n | (reg_m >> 2); 2408 break; 2409 case REG_B: 2410 nbuf[indx] = reg_b | 0x08; 2411 break; 2412 case REG_N_B01: 2413 nbuf[indx] = reg_n | 0x01; 2414 break; 2415 case IMM0_3s: 2416 nbuf[indx] |= 0x08; 2417 /* Fall through. */ 2418 case IMM0_3c: 2419 insert (output + low_byte, BFD_RELOC_SH_IMM3, 0, operand); 2420 break; 2421 case IMM0_3Us: 2422 nbuf[indx] |= 0x80; 2423 /* Fall through. */ 2424 case IMM0_3Uc: 2425 insert (output + low_byte, BFD_RELOC_SH_IMM3U, 0, operand); 2426 break; 2427 case DISP0_12: 2428 insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand); 2429 break; 2430 case DISP0_12BY2: 2431 insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand); 2432 break; 2433 case DISP0_12BY4: 2434 insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand); 2435 break; 2436 case DISP0_12BY8: 2437 insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand); 2438 break; 2439 case DISP1_12: 2440 insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand+1); 2441 break; 2442 case DISP1_12BY2: 2443 insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand+1); 2444 break; 2445 case DISP1_12BY4: 2446 insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand+1); 2447 break; 2448 case DISP1_12BY8: 2449 insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand+1); 2450 break; 2451 case IMM0_20_4: 2452 break; 2453 case IMM0_20: 2454 r_type = BFD_RELOC_SH_DISP20; 2455#ifdef OBJ_ELF 2456 if (sh_check_fixup (&operand->immediate, &r_type)) 2457 as_bad (_("Invalid PIC expression.")); 2458 unhandled_pic = 0; 2459#endif 2460 insert4 (output, r_type, 0, operand); 2461 break; 2462 case IMM0_20BY8: 2463 insert4 (output, BFD_RELOC_SH_DISP20BY8, 0, operand); 2464 break; 2465 case IMM0_4BY4: 2466 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand); 2467 break; 2468 case IMM0_4BY2: 2469 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand); 2470 break; 2471 case IMM0_4: 2472 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand); 2473 break; 2474 case IMM1_4BY4: 2475 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1); 2476 break; 2477 case IMM1_4BY2: 2478 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1); 2479 break; 2480 case IMM1_4: 2481 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1); 2482 break; 2483 case IMM0_8BY4: 2484 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand); 2485 break; 2486 case IMM0_8BY2: 2487 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand); 2488 break; 2489 case IMM0_8: 2490 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand); 2491 break; 2492 case IMM1_8BY4: 2493 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1); 2494 break; 2495 case IMM1_8BY2: 2496 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1); 2497 break; 2498 case IMM1_8: 2499 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1); 2500 break; 2501 case PCRELIMM_8BY4: 2502 insert (output, BFD_RELOC_SH_PCRELIMM8BY4, 2503 operand->type != A_DISP_PC_ABS, operand); 2504 break; 2505 case PCRELIMM_8BY2: 2506 insert (output, BFD_RELOC_SH_PCRELIMM8BY2, 2507 operand->type != A_DISP_PC_ABS, operand); 2508 break; 2509 case REPEAT: 2510 output = insert_loop_bounds (output, operand); 2511 nbuf[indx] = opcode->nibbles[3]; 2512 operand += 2; 2513 break; 2514 default: 2515 printf (_("failed for %d\n"), i); 2516 } 2517 } 2518 } 2519#ifdef OBJ_ELF 2520 if (unhandled_pic) 2521 as_bad (_("misplaced PIC operand")); 2522#endif 2523 if (!target_big_endian) 2524 { 2525 output[1] = (nbuf[0] << 4) | (nbuf[1]); 2526 output[0] = (nbuf[2] << 4) | (nbuf[3]); 2527 } 2528 else 2529 { 2530 output[0] = (nbuf[0] << 4) | (nbuf[1]); 2531 output[1] = (nbuf[2] << 4) | (nbuf[3]); 2532 } 2533 if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32)) 2534 { 2535 if (!target_big_endian) 2536 { 2537 output[3] = (nbuf[4] << 4) | (nbuf[5]); 2538 output[2] = (nbuf[6] << 4) | (nbuf[7]); 2539 } 2540 else 2541 { 2542 output[2] = (nbuf[4] << 4) | (nbuf[5]); 2543 output[3] = (nbuf[6] << 4) | (nbuf[7]); 2544 } 2545 } 2546 return size; 2547} 2548 2549/* Find an opcode at the start of *STR_P in the hash table, and set 2550 *STR_P to the first character after the last one read. */ 2551 2552static sh_opcode_info * 2553find_cooked_opcode (char **str_p) 2554{ 2555 char *str = *str_p; 2556 unsigned char *op_start; 2557 unsigned char *op_end; 2558 char name[20]; 2559 unsigned int nlen = 0; 2560 2561 /* Drop leading whitespace. */ 2562 while (*str == ' ') 2563 str++; 2564 2565 /* Find the op code end. 2566 The pre-processor will eliminate whitespace in front of 2567 any '@' after the first argument; we may be called from 2568 assemble_ppi, so the opcode might be terminated by an '@'. */ 2569 for (op_start = op_end = (unsigned char *) str; 2570 *op_end 2571 && nlen < sizeof (name) - 1 2572 && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@'; 2573 op_end++) 2574 { 2575 unsigned char c = op_start[nlen]; 2576 2577 /* The machine independent code will convert CMP/EQ into cmp/EQ 2578 because it thinks the '/' is the end of the symbol. Moreover, 2579 all but the first sub-insn is a parallel processing insn won't 2580 be capitalized. Instead of hacking up the machine independent 2581 code, we just deal with it here. */ 2582 c = TOLOWER (c); 2583 name[nlen] = c; 2584 nlen++; 2585 } 2586 2587 name[nlen] = 0; 2588 *str_p = (char *) op_end; 2589 2590 if (nlen == 0) 2591 as_bad (_("can't find opcode ")); 2592 2593 return (sh_opcode_info *) hash_find (opcode_hash_control, name); 2594} 2595 2596/* Assemble a parallel processing insn. */ 2597#define DDT_BASE 0xf000 /* Base value for double data transfer insns */ 2598 2599static unsigned int 2600assemble_ppi (char *op_end, sh_opcode_info *opcode) 2601{ 2602 int movx = 0; 2603 int movy = 0; 2604 int cond = 0; 2605 int field_b = 0; 2606 char *output; 2607 int move_code; 2608 unsigned int size; 2609 2610 for (;;) 2611 { 2612 sh_operand_info operand[3]; 2613 2614 /* Some insn ignore one or more register fields, e.g. psts machl,a0. 2615 Make sure we encode a defined insn pattern. */ 2616 reg_x = 0; 2617 reg_y = 0; 2618 reg_n = 0; 2619 2620 if (opcode->arg[0] != A_END) 2621 op_end = get_operands (opcode, op_end, operand); 2622 try_another_opcode: 2623 opcode = get_specific (opcode, operand); 2624 if (opcode == 0) 2625 { 2626 /* Couldn't find an opcode which matched the operands. */ 2627 char *where = frag_more (2); 2628 size = 2; 2629 2630 where[0] = 0x0; 2631 where[1] = 0x0; 2632 as_bad (_("invalid operands for opcode")); 2633 return size; 2634 } 2635 2636 if (opcode->nibbles[0] != PPI) 2637 as_bad (_("insn can't be combined with parallel processing insn")); 2638 2639 switch (opcode->nibbles[1]) 2640 { 2641 2642 case NOPX: 2643 if (movx) 2644 as_bad (_("multiple movx specifications")); 2645 movx = DDT_BASE; 2646 break; 2647 case NOPY: 2648 if (movy) 2649 as_bad (_("multiple movy specifications")); 2650 movy = DDT_BASE; 2651 break; 2652 2653 case MOVX_NOPY: 2654 if (movx) 2655 as_bad (_("multiple movx specifications")); 2656 if ((reg_n < 4 || reg_n > 5) 2657 && (reg_n < 0 || reg_n > 1)) 2658 as_bad (_("invalid movx address register")); 2659 if (movy && movy != DDT_BASE) 2660 as_bad (_("insn cannot be combined with non-nopy")); 2661 movx = ((((reg_n & 1) != 0) << 9) 2662 + (((reg_n & 4) == 0) << 8) 2663 + (reg_x << 6) 2664 + (opcode->nibbles[2] << 4) 2665 + opcode->nibbles[3] 2666 + DDT_BASE); 2667 break; 2668 2669 case MOVY_NOPX: 2670 if (movy) 2671 as_bad (_("multiple movy specifications")); 2672 if ((reg_n < 6 || reg_n > 7) 2673 && (reg_n < 2 || reg_n > 3)) 2674 as_bad (_("invalid movy address register")); 2675 if (movx && movx != DDT_BASE) 2676 as_bad (_("insn cannot be combined with non-nopx")); 2677 movy = ((((reg_n & 1) != 0) << 8) 2678 + (((reg_n & 4) == 0) << 9) 2679 + (reg_y << 6) 2680 + (opcode->nibbles[2] << 4) 2681 + opcode->nibbles[3] 2682 + DDT_BASE); 2683 break; 2684 2685 case MOVX: 2686 if (movx) 2687 as_bad (_("multiple movx specifications")); 2688 if (movy & 0x2ac) 2689 as_bad (_("previous movy requires nopx")); 2690 if (reg_n < 4 || reg_n > 5) 2691 as_bad (_("invalid movx address register")); 2692 if (opcode->nibbles[2] & 8) 2693 { 2694 if (reg_m == A_A1_NUM) 2695 movx = 1 << 7; 2696 else if (reg_m != A_A0_NUM) 2697 as_bad (_("invalid movx dsp register")); 2698 } 2699 else 2700 { 2701 if (reg_x > 1) 2702 as_bad (_("invalid movx dsp register")); 2703 movx = reg_x << 7; 2704 } 2705 movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE; 2706 break; 2707 2708 case MOVY: 2709 if (movy) 2710 as_bad (_("multiple movy specifications")); 2711 if (movx & 0x153) 2712 as_bad (_("previous movx requires nopy")); 2713 if (opcode->nibbles[2] & 8) 2714 { 2715 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode, 2716 so add 8 more. */ 2717 movy = 8; 2718 if (reg_m == A_A1_NUM) 2719 movy += 1 << 6; 2720 else if (reg_m != A_A0_NUM) 2721 as_bad (_("invalid movy dsp register")); 2722 } 2723 else 2724 { 2725 if (reg_y > 1) 2726 as_bad (_("invalid movy dsp register")); 2727 movy = reg_y << 6; 2728 } 2729 if (reg_n < 6 || reg_n > 7) 2730 as_bad (_("invalid movy address register")); 2731 movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE; 2732 break; 2733 2734 case PSH: 2735 if (operand[0].immediate.X_op != O_constant) 2736 as_bad (_("dsp immediate shift value not constant")); 2737 field_b = ((opcode->nibbles[2] << 12) 2738 | (operand[0].immediate.X_add_number & 127) << 4 2739 | reg_n); 2740 break; 2741 case PPI3NC: 2742 if (cond) 2743 { 2744 opcode++; 2745 goto try_another_opcode; 2746 } 2747 /* Fall through. */ 2748 case PPI3: 2749 if (field_b) 2750 as_bad (_("multiple parallel processing specifications")); 2751 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) 2752 + (reg_x << 6) + (reg_y << 4) + reg_n); 2753 switch (opcode->nibbles[4]) 2754 { 2755 case HEX_0: 2756 case HEX_XX00: 2757 case HEX_00YY: 2758 break; 2759 case HEX_1: 2760 case HEX_4: 2761 field_b += opcode->nibbles[4] << 4; 2762 break; 2763 default: 2764 abort (); 2765 } 2766 break; 2767 case PDC: 2768 if (cond) 2769 as_bad (_("multiple condition specifications")); 2770 cond = opcode->nibbles[2] << 8; 2771 if (*op_end) 2772 goto skip_cond_check; 2773 break; 2774 case PPIC: 2775 if (field_b) 2776 as_bad (_("multiple parallel processing specifications")); 2777 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) 2778 + cond + (reg_x << 6) + (reg_y << 4) + reg_n); 2779 cond = 0; 2780 switch (opcode->nibbles[4]) 2781 { 2782 case HEX_0: 2783 case HEX_XX00: 2784 case HEX_00YY: 2785 break; 2786 case HEX_1: 2787 case HEX_4: 2788 field_b += opcode->nibbles[4] << 4; 2789 break; 2790 default: 2791 abort (); 2792 } 2793 break; 2794 case PMUL: 2795 if (field_b) 2796 { 2797 if ((field_b & 0xef00) == 0xa100) 2798 field_b -= 0x8100; 2799 /* pclr Dz pmuls Se,Sf,Dg */ 2800 else if ((field_b & 0xff00) == 0x8d00 2801 && (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh4al_dsp_up))) 2802 { 2803 valid_arch = SH_MERGE_ARCH_SET (valid_arch, arch_sh4al_dsp_up); 2804 field_b -= 0x8cf0; 2805 } 2806 else 2807 as_bad (_("insn cannot be combined with pmuls")); 2808 switch (field_b & 0xf) 2809 { 2810 case A_X0_NUM: 2811 field_b += 0 - A_X0_NUM; 2812 break; 2813 case A_Y0_NUM: 2814 field_b += 1 - A_Y0_NUM; 2815 break; 2816 case A_A0_NUM: 2817 field_b += 2 - A_A0_NUM; 2818 break; 2819 case A_A1_NUM: 2820 field_b += 3 - A_A1_NUM; 2821 break; 2822 default: 2823 as_bad (_("bad combined pmuls output operand")); 2824 } 2825 /* Generate warning if the destination register for padd / psub 2826 and pmuls is the same ( only for A0 or A1 ). 2827 If the last nibble is 1010 then A0 is used in both 2828 padd / psub and pmuls. If it is 1111 then A1 is used 2829 as destination register in both padd / psub and pmuls. */ 2830 2831 if ((((field_b | reg_efg) & 0x000F) == 0x000A) 2832 || (((field_b | reg_efg) & 0x000F) == 0x000F)) 2833 as_warn (_("destination register is same for parallel insns")); 2834 } 2835 field_b += 0x4000 + reg_efg; 2836 break; 2837 default: 2838 abort (); 2839 } 2840 if (cond) 2841 { 2842 as_bad (_("condition not followed by conditionalizable insn")); 2843 cond = 0; 2844 } 2845 if (! *op_end) 2846 break; 2847 skip_cond_check: 2848 opcode = find_cooked_opcode (&op_end); 2849 if (opcode == NULL) 2850 { 2851 (as_bad 2852 (_("unrecognized characters at end of parallel processing insn"))); 2853 break; 2854 } 2855 } 2856 2857 move_code = movx | movy; 2858 if (field_b) 2859 { 2860 /* Parallel processing insn. */ 2861 unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b; 2862 2863 output = frag_more (4); 2864 size = 4; 2865 if (! target_big_endian) 2866 { 2867 output[3] = ppi_code >> 8; 2868 output[2] = ppi_code; 2869 } 2870 else 2871 { 2872 output[2] = ppi_code >> 8; 2873 output[3] = ppi_code; 2874 } 2875 move_code |= 0xf800; 2876 } 2877 else 2878 { 2879 /* Just a double data transfer. */ 2880 output = frag_more (2); 2881 size = 2; 2882 } 2883 if (! target_big_endian) 2884 { 2885 output[1] = move_code >> 8; 2886 output[0] = move_code; 2887 } 2888 else 2889 { 2890 output[0] = move_code >> 8; 2891 output[1] = move_code; 2892 } 2893 return size; 2894} 2895 2896/* This is the guts of the machine-dependent assembler. STR points to a 2897 machine dependent instruction. This function is supposed to emit 2898 the frags/bytes it assembles to. */ 2899 2900void 2901md_assemble (char *str) 2902{ 2903 char *op_end; 2904 sh_operand_info operand[3]; 2905 sh_opcode_info *opcode; 2906 unsigned int size = 0; 2907 char *initial_str = str; 2908 2909#ifdef HAVE_SH64 2910 if (sh64_isa_mode == sh64_isa_shmedia) 2911 { 2912 shmedia_md_assemble (str); 2913 return; 2914 } 2915 else 2916 { 2917 /* If we've seen pseudo-directives, make sure any emitted data or 2918 frags are marked as data. */ 2919 if (!seen_insn) 2920 { 2921 sh64_update_contents_mark (TRUE); 2922 sh64_set_contents_type (CRT_SH5_ISA16); 2923 } 2924 2925 seen_insn = TRUE; 2926 } 2927#endif /* HAVE_SH64 */ 2928 2929 opcode = find_cooked_opcode (&str); 2930 op_end = str; 2931 2932 if (opcode == NULL) 2933 { 2934 /* The opcode is not in the hash table. 2935 This means we definitely have an assembly failure, 2936 but the instruction may be valid in another CPU variant. 2937 In this case emit something better than 'unknown opcode'. 2938 Search the full table in sh-opc.h to check. */ 2939 2940 char *name = initial_str; 2941 int name_length = 0; 2942 const sh_opcode_info *op; 2943 int found = 0; 2944 2945 /* identify opcode in string */ 2946 while (ISSPACE (*name)) 2947 { 2948 name++; 2949 } 2950 while (!ISSPACE (name[name_length])) 2951 { 2952 name_length++; 2953 } 2954 2955 /* search for opcode in full list */ 2956 for (op = sh_table; op->name; op++) 2957 { 2958 if (strncasecmp (op->name, name, name_length) == 0 2959 && op->name[name_length] == '\0') 2960 { 2961 found = 1; 2962 break; 2963 } 2964 } 2965 2966 if ( found ) 2967 { 2968 as_bad (_("opcode not valid for this cpu variant")); 2969 } 2970 else 2971 { 2972 as_bad (_("unknown opcode")); 2973 } 2974 return; 2975 } 2976 2977 if (sh_relax 2978 && ! seg_info (now_seg)->tc_segment_info_data.in_code) 2979 { 2980 /* Output a CODE reloc to tell the linker that the following 2981 bytes are instructions, not data. */ 2982 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, 2983 BFD_RELOC_SH_CODE); 2984 seg_info (now_seg)->tc_segment_info_data.in_code = 1; 2985 } 2986 2987 if (opcode->nibbles[0] == PPI) 2988 { 2989 size = assemble_ppi (op_end, opcode); 2990 } 2991 else 2992 { 2993 if (opcode->arg[0] == A_BDISP12 2994 || opcode->arg[0] == A_BDISP8) 2995 { 2996 /* Since we skip get_specific here, we have to check & update 2997 valid_arch now. */ 2998 if (SH_MERGE_ARCH_SET_VALID (valid_arch, opcode->arch)) 2999 valid_arch = SH_MERGE_ARCH_SET (valid_arch, opcode->arch); 3000 else 3001 as_bad (_("Delayed branches not available on SH1")); 3002 parse_exp (op_end + 1, &operand[0]); 3003 build_relax (opcode, &operand[0]); 3004 3005 /* All branches are currently 16 bit. */ 3006 size = 2; 3007 } 3008 else 3009 { 3010 if (opcode->arg[0] == A_END) 3011 { 3012 /* Ignore trailing whitespace. If there is any, it has already 3013 been compressed to a single space. */ 3014 if (*op_end == ' ') 3015 op_end++; 3016 } 3017 else 3018 { 3019 op_end = get_operands (opcode, op_end, operand); 3020 } 3021 opcode = get_specific (opcode, operand); 3022 3023 if (opcode == 0) 3024 { 3025 /* Couldn't find an opcode which matched the operands. */ 3026 char *where = frag_more (2); 3027 size = 2; 3028 3029 where[0] = 0x0; 3030 where[1] = 0x0; 3031 as_bad (_("invalid operands for opcode")); 3032 } 3033 else 3034 { 3035 if (*op_end) 3036 as_bad (_("excess operands: '%s'"), op_end); 3037 3038 size = build_Mytes (opcode, operand); 3039 } 3040 } 3041 } 3042 3043 dwarf2_emit_insn (size); 3044} 3045 3046/* This routine is called each time a label definition is seen. It 3047 emits a BFD_RELOC_SH_LABEL reloc if necessary. */ 3048 3049void 3050sh_frob_label (symbolS *sym) 3051{ 3052 static fragS *last_label_frag; 3053 static int last_label_offset; 3054 3055 if (sh_relax 3056 && seg_info (now_seg)->tc_segment_info_data.in_code) 3057 { 3058 int offset; 3059 3060 offset = frag_now_fix (); 3061 if (frag_now != last_label_frag 3062 || offset != last_label_offset) 3063 { 3064 fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL); 3065 last_label_frag = frag_now; 3066 last_label_offset = offset; 3067 } 3068 } 3069 3070 dwarf2_emit_label (sym); 3071} 3072 3073/* This routine is called when the assembler is about to output some 3074 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */ 3075 3076void 3077sh_flush_pending_output (void) 3078{ 3079 if (sh_relax 3080 && seg_info (now_seg)->tc_segment_info_data.in_code) 3081 { 3082 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, 3083 BFD_RELOC_SH_DATA); 3084 seg_info (now_seg)->tc_segment_info_data.in_code = 0; 3085 } 3086} 3087 3088symbolS * 3089md_undefined_symbol (char *name ATTRIBUTE_UNUSED) 3090{ 3091 return 0; 3092} 3093 3094/* Various routines to kill one day. */ 3095 3096const char * 3097md_atof (int type, char *litP, int *sizeP) 3098{ 3099 return ieee_md_atof (type, litP, sizeP, target_big_endian); 3100} 3101 3102/* Handle the .uses pseudo-op. This pseudo-op is used just before a 3103 call instruction. It refers to a label of the instruction which 3104 loads the register which the call uses. We use it to generate a 3105 special reloc for the linker. */ 3106 3107static void 3108s_uses (int ignore ATTRIBUTE_UNUSED) 3109{ 3110 expressionS ex; 3111 3112 if (! sh_relax) 3113 as_warn (_(".uses pseudo-op seen when not relaxing")); 3114 3115 expression (&ex); 3116 3117 if (ex.X_op != O_symbol || ex.X_add_number != 0) 3118 { 3119 as_bad (_("bad .uses format")); 3120 ignore_rest_of_line (); 3121 return; 3122 } 3123 3124 fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES); 3125 3126 demand_empty_rest_of_line (); 3127} 3128 3129enum options 3130{ 3131 OPTION_RELAX = OPTION_MD_BASE, 3132 OPTION_BIG, 3133 OPTION_LITTLE, 3134 OPTION_SMALL, 3135 OPTION_DSP, 3136 OPTION_ISA, 3137 OPTION_RENESAS, 3138 OPTION_ALLOW_REG_PREFIX, 3139#ifdef HAVE_SH64 3140 OPTION_ABI, 3141 OPTION_NO_MIX, 3142 OPTION_SHCOMPACT_CONST_CRANGE, 3143 OPTION_NO_EXPAND, 3144 OPTION_PT32, 3145#endif 3146 OPTION_H_TICK_HEX, 3147#ifdef OBJ_ELF 3148 OPTION_FDPIC, 3149#endif 3150 OPTION_DUMMY /* Not used. This is just here to make it easy to add and subtract options from this enum. */ 3151}; 3152 3153const char *md_shortopts = ""; 3154struct option md_longopts[] = 3155{ 3156 {"relax", no_argument, NULL, OPTION_RELAX}, 3157 {"big", no_argument, NULL, OPTION_BIG}, 3158 {"little", no_argument, NULL, OPTION_LITTLE}, 3159 /* The next two switches are here because the 3160 generic parts of the linker testsuite uses them. */ 3161 {"EB", no_argument, NULL, OPTION_BIG}, 3162 {"EL", no_argument, NULL, OPTION_LITTLE}, 3163 {"small", no_argument, NULL, OPTION_SMALL}, 3164 {"dsp", no_argument, NULL, OPTION_DSP}, 3165 {"isa", required_argument, NULL, OPTION_ISA}, 3166 {"renesas", no_argument, NULL, OPTION_RENESAS}, 3167 {"allow-reg-prefix", no_argument, NULL, OPTION_ALLOW_REG_PREFIX}, 3168 3169#ifdef HAVE_SH64 3170 {"abi", required_argument, NULL, OPTION_ABI}, 3171 {"no-mix", no_argument, NULL, OPTION_NO_MIX}, 3172 {"shcompact-const-crange", no_argument, NULL, OPTION_SHCOMPACT_CONST_CRANGE}, 3173 {"no-expand", no_argument, NULL, OPTION_NO_EXPAND}, 3174 {"expand-pt32", no_argument, NULL, OPTION_PT32}, 3175#endif /* HAVE_SH64 */ 3176 { "h-tick-hex", no_argument, NULL, OPTION_H_TICK_HEX }, 3177 3178#ifdef OBJ_ELF 3179 {"fdpic", no_argument, NULL, OPTION_FDPIC}, 3180#endif 3181 3182 {NULL, no_argument, NULL, 0} 3183}; 3184size_t md_longopts_size = sizeof (md_longopts); 3185 3186int 3187md_parse_option (int c, const char *arg ATTRIBUTE_UNUSED) 3188{ 3189 switch (c) 3190 { 3191 case OPTION_RELAX: 3192 sh_relax = 1; 3193 break; 3194 3195 case OPTION_BIG: 3196 target_big_endian = 1; 3197 break; 3198 3199 case OPTION_LITTLE: 3200 target_big_endian = 0; 3201 break; 3202 3203 case OPTION_SMALL: 3204 sh_small = 1; 3205 break; 3206 3207 case OPTION_DSP: 3208 preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu); 3209 break; 3210 3211 case OPTION_RENESAS: 3212 dont_adjust_reloc_32 = 1; 3213 break; 3214 3215 case OPTION_ALLOW_REG_PREFIX: 3216 allow_dollar_register_prefix = 1; 3217 break; 3218 3219 case OPTION_ISA: 3220 if (strcasecmp (arg, "dsp") == 0) 3221 preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu); 3222 else if (strcasecmp (arg, "fp") == 0) 3223 preset_target_arch = arch_sh_up & ~arch_sh_has_dsp; 3224 else if (strcasecmp (arg, "any") == 0) 3225 preset_target_arch = arch_sh_up; 3226#ifdef HAVE_SH64 3227 else if (strcasecmp (arg, "shmedia") == 0) 3228 { 3229 if (sh64_isa_mode == sh64_isa_shcompact) 3230 as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia")); 3231 sh64_isa_mode = sh64_isa_shmedia; 3232 } 3233 else if (strcasecmp (arg, "shcompact") == 0) 3234 { 3235 if (sh64_isa_mode == sh64_isa_shmedia) 3236 as_bad (_("Invalid combination: --isa=SHmedia with --isa=SHcompact")); 3237 if (sh64_abi == sh64_abi_64) 3238 as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact")); 3239 sh64_isa_mode = sh64_isa_shcompact; 3240 } 3241#endif /* HAVE_SH64 */ 3242 else 3243 { 3244 extern const bfd_arch_info_type bfd_sh_arch; 3245 bfd_arch_info_type const *bfd_arch = &bfd_sh_arch; 3246 3247 preset_target_arch = 0; 3248 for (; bfd_arch; bfd_arch=bfd_arch->next) 3249 { 3250 int len = strlen(bfd_arch->printable_name); 3251 3252 if (bfd_arch->mach == bfd_mach_sh5) 3253 continue; 3254 3255 if (strncasecmp (bfd_arch->printable_name, arg, len) != 0) 3256 continue; 3257 3258 if (arg[len] == '\0') 3259 preset_target_arch = 3260 sh_get_arch_from_bfd_mach (bfd_arch->mach); 3261 else if (strcasecmp(&arg[len], "-up") == 0) 3262 preset_target_arch = 3263 sh_get_arch_up_from_bfd_mach (bfd_arch->mach); 3264 else 3265 continue; 3266 break; 3267 } 3268 3269 if (!preset_target_arch) 3270 as_bad (_("Invalid argument to --isa option: %s"), arg); 3271 } 3272 break; 3273 3274#ifdef HAVE_SH64 3275 case OPTION_ABI: 3276 if (strcmp (arg, "32") == 0) 3277 { 3278 if (sh64_abi == sh64_abi_64) 3279 as_bad (_("Invalid combination: --abi=32 with --abi=64")); 3280 sh64_abi = sh64_abi_32; 3281 } 3282 else if (strcmp (arg, "64") == 0) 3283 { 3284 if (sh64_abi == sh64_abi_32) 3285 as_bad (_("Invalid combination: --abi=64 with --abi=32")); 3286 if (sh64_isa_mode == sh64_isa_shcompact) 3287 as_bad (_("Invalid combination: --isa=SHcompact with --abi=64")); 3288 sh64_abi = sh64_abi_64; 3289 } 3290 else 3291 as_bad (_("Invalid argument to --abi option: %s"), arg); 3292 break; 3293 3294 case OPTION_NO_MIX: 3295 sh64_mix = FALSE; 3296 break; 3297 3298 case OPTION_SHCOMPACT_CONST_CRANGE: 3299 sh64_shcompact_const_crange = TRUE; 3300 break; 3301 3302 case OPTION_NO_EXPAND: 3303 sh64_expand = FALSE; 3304 break; 3305 3306 case OPTION_PT32: 3307 sh64_pt32 = TRUE; 3308 break; 3309#endif /* HAVE_SH64 */ 3310 3311 case OPTION_H_TICK_HEX: 3312 enable_h_tick_hex = 1; 3313 break; 3314 3315#ifdef OBJ_ELF 3316 case OPTION_FDPIC: 3317 sh_fdpic = TRUE; 3318 break; 3319#endif /* OBJ_ELF */ 3320 3321 default: 3322 return 0; 3323 } 3324 3325 return 1; 3326} 3327 3328void 3329md_show_usage (FILE *stream) 3330{ 3331 fprintf (stream, _("\ 3332SH options:\n\ 3333--little generate little endian code\n\ 3334--big generate big endian code\n\ 3335--relax alter jump instructions for long displacements\n\ 3336--renesas disable optimization with section symbol for\n\ 3337 compatibility with Renesas assembler.\n\ 3338--small align sections to 4 byte boundaries, not 16\n\ 3339--dsp enable sh-dsp insns, and disable floating-point ISAs.\n\ 3340--allow-reg-prefix allow '$' as a register name prefix.\n\ 3341--isa=[any use most appropriate isa\n\ 3342 | dsp same as '-dsp'\n\ 3343 | fp")); 3344 { 3345 extern const bfd_arch_info_type bfd_sh_arch; 3346 bfd_arch_info_type const *bfd_arch = &bfd_sh_arch; 3347 3348 for (; bfd_arch; bfd_arch=bfd_arch->next) 3349 if (bfd_arch->mach != bfd_mach_sh5) 3350 { 3351 fprintf (stream, "\n | %s", bfd_arch->printable_name); 3352 fprintf (stream, "\n | %s-up", bfd_arch->printable_name); 3353 } 3354 } 3355 fprintf (stream, "]\n"); 3356#ifdef HAVE_SH64 3357 fprintf (stream, _("\ 3358--isa=[shmedia set as the default instruction set for SH64\n\ 3359 | SHmedia\n\ 3360 | shcompact\n\ 3361 | SHcompact]\n")); 3362 fprintf (stream, _("\ 3363--abi=[32|64] set size of expanded SHmedia operands and object\n\ 3364 file type\n\ 3365--shcompact-const-crange emit code-range descriptors for constants in\n\ 3366 SHcompact code sections\n\ 3367--no-mix disallow SHmedia code in the same section as\n\ 3368 constants and SHcompact code\n\ 3369--no-expand do not expand MOVI, PT, PTA or PTB instructions\n\ 3370--expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\ 3371 to 32 bits only\n")); 3372#endif /* HAVE_SH64 */ 3373#ifdef OBJ_ELF 3374 fprintf (stream, _("\ 3375--fdpic generate an FDPIC object file\n")); 3376#endif /* OBJ_ELF */ 3377} 3378 3379/* This struct is used to pass arguments to sh_count_relocs through 3380 bfd_map_over_sections. */ 3381 3382struct sh_count_relocs 3383{ 3384 /* Symbol we are looking for. */ 3385 symbolS *sym; 3386 /* Count of relocs found. */ 3387 int count; 3388}; 3389 3390/* Count the number of fixups in a section which refer to a particular 3391 symbol. This is called via bfd_map_over_sections. */ 3392 3393static void 3394sh_count_relocs (bfd *abfd ATTRIBUTE_UNUSED, segT sec, void *data) 3395{ 3396 struct sh_count_relocs *info = (struct sh_count_relocs *) data; 3397 segment_info_type *seginfo; 3398 symbolS *sym; 3399 fixS *fix; 3400 3401 seginfo = seg_info (sec); 3402 if (seginfo == NULL) 3403 return; 3404 3405 sym = info->sym; 3406 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) 3407 { 3408 if (fix->fx_addsy == sym) 3409 { 3410 ++info->count; 3411 fix->fx_tcbit = 1; 3412 } 3413 } 3414} 3415 3416/* Handle the count relocs for a particular section. 3417 This is called via bfd_map_over_sections. */ 3418 3419static void 3420sh_frob_section (bfd *abfd ATTRIBUTE_UNUSED, segT sec, 3421 void *ignore ATTRIBUTE_UNUSED) 3422{ 3423 segment_info_type *seginfo; 3424 fixS *fix; 3425 3426 seginfo = seg_info (sec); 3427 if (seginfo == NULL) 3428 return; 3429 3430 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) 3431 { 3432 symbolS *sym; 3433 3434 sym = fix->fx_addsy; 3435 /* Check for a local_symbol. */ 3436 if (sym && sym->bsym == NULL) 3437 { 3438 struct local_symbol *ls = (struct local_symbol *)sym; 3439 /* See if it's been converted. If so, canonicalize. */ 3440 if (local_symbol_converted_p (ls)) 3441 fix->fx_addsy = local_symbol_get_real_symbol (ls); 3442 } 3443 } 3444 3445 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) 3446 { 3447 symbolS *sym; 3448 bfd_vma val; 3449 fixS *fscan; 3450 struct sh_count_relocs info; 3451 3452 if (fix->fx_r_type != BFD_RELOC_SH_USES) 3453 continue; 3454 3455 /* The BFD_RELOC_SH_USES reloc should refer to a defined local 3456 symbol in the same section. */ 3457 sym = fix->fx_addsy; 3458 if (sym == NULL 3459 || fix->fx_subsy != NULL 3460 || fix->fx_addnumber != 0 3461 || S_GET_SEGMENT (sym) != sec 3462 || S_IS_EXTERNAL (sym)) 3463 { 3464 as_warn_where (fix->fx_file, fix->fx_line, 3465 _(".uses does not refer to a local symbol in the same section")); 3466 continue; 3467 } 3468 3469 /* Look through the fixups again, this time looking for one 3470 at the same location as sym. */ 3471 val = S_GET_VALUE (sym); 3472 for (fscan = seginfo->fix_root; 3473 fscan != NULL; 3474 fscan = fscan->fx_next) 3475 if (val == fscan->fx_frag->fr_address + fscan->fx_where 3476 && fscan->fx_r_type != BFD_RELOC_SH_ALIGN 3477 && fscan->fx_r_type != BFD_RELOC_SH_CODE 3478 && fscan->fx_r_type != BFD_RELOC_SH_DATA 3479 && fscan->fx_r_type != BFD_RELOC_SH_LABEL) 3480 break; 3481 if (fscan == NULL) 3482 { 3483 as_warn_where (fix->fx_file, fix->fx_line, 3484 _("can't find fixup pointed to by .uses")); 3485 continue; 3486 } 3487 3488 if (fscan->fx_tcbit) 3489 { 3490 /* We've already done this one. */ 3491 continue; 3492 } 3493 3494 /* The variable fscan should also be a fixup to a local symbol 3495 in the same section. */ 3496 sym = fscan->fx_addsy; 3497 if (sym == NULL 3498 || fscan->fx_subsy != NULL 3499 || fscan->fx_addnumber != 0 3500 || S_GET_SEGMENT (sym) != sec 3501 || S_IS_EXTERNAL (sym)) 3502 { 3503 as_warn_where (fix->fx_file, fix->fx_line, 3504 _(".uses target does not refer to a local symbol in the same section")); 3505 continue; 3506 } 3507 3508 /* Now we look through all the fixups of all the sections, 3509 counting the number of times we find a reference to sym. */ 3510 info.sym = sym; 3511 info.count = 0; 3512 bfd_map_over_sections (stdoutput, sh_count_relocs, &info); 3513 3514 if (info.count < 1) 3515 abort (); 3516 3517 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym. 3518 We have already adjusted the value of sym to include the 3519 fragment address, so we undo that adjustment here. */ 3520 subseg_change (sec, 0); 3521 fix_new (fscan->fx_frag, 3522 S_GET_VALUE (sym) - fscan->fx_frag->fr_address, 3523 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT); 3524 } 3525} 3526 3527/* This function is called after the symbol table has been completed, 3528 but before the relocs or section contents have been written out. 3529 If we have seen any .uses pseudo-ops, they point to an instruction 3530 which loads a register with the address of a function. We look 3531 through the fixups to find where the function address is being 3532 loaded from. We then generate a COUNT reloc giving the number of 3533 times that function address is referred to. The linker uses this 3534 information when doing relaxing, to decide when it can eliminate 3535 the stored function address entirely. */ 3536 3537void 3538sh_frob_file (void) 3539{ 3540#ifdef HAVE_SH64 3541 shmedia_frob_file_before_adjust (); 3542#endif 3543 3544 if (! sh_relax) 3545 return; 3546 3547 bfd_map_over_sections (stdoutput, sh_frob_section, NULL); 3548} 3549 3550/* Called after relaxing. Set the correct sizes of the fragments, and 3551 create relocs so that md_apply_fix will fill in the correct values. */ 3552 3553void 3554md_convert_frag (bfd *headers ATTRIBUTE_UNUSED, segT seg, fragS *fragP) 3555{ 3556 int donerelax = 0; 3557 3558 switch (fragP->fr_subtype) 3559 { 3560 case C (COND_JUMP, COND8): 3561 case C (COND_JUMP_DELAY, COND8): 3562 subseg_change (seg, 0); 3563 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, 3564 1, BFD_RELOC_SH_PCDISP8BY2); 3565 fragP->fr_fix += 2; 3566 fragP->fr_var = 0; 3567 break; 3568 3569 case C (UNCOND_JUMP, UNCOND12): 3570 subseg_change (seg, 0); 3571 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, 3572 1, BFD_RELOC_SH_PCDISP12BY2); 3573 fragP->fr_fix += 2; 3574 fragP->fr_var = 0; 3575 break; 3576 3577 case C (UNCOND_JUMP, UNCOND32): 3578 case C (UNCOND_JUMP, UNDEF_WORD_DISP): 3579 if (fragP->fr_symbol == NULL) 3580 as_bad_where (fragP->fr_file, fragP->fr_line, 3581 _("displacement overflows 12-bit field")); 3582 else if (S_IS_DEFINED (fragP->fr_symbol)) 3583 as_bad_where (fragP->fr_file, fragP->fr_line, 3584 _("displacement to defined symbol %s overflows 12-bit field"), 3585 S_GET_NAME (fragP->fr_symbol)); 3586 else 3587 as_bad_where (fragP->fr_file, fragP->fr_line, 3588 _("displacement to undefined symbol %s overflows 12-bit field"), 3589 S_GET_NAME (fragP->fr_symbol)); 3590 /* Stabilize this frag, so we don't trip an assert. */ 3591 fragP->fr_fix += fragP->fr_var; 3592 fragP->fr_var = 0; 3593 break; 3594 3595 case C (COND_JUMP, COND12): 3596 case C (COND_JUMP_DELAY, COND12): 3597 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */ 3598 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c 3599 was due to gas incorrectly relaxing an out-of-range conditional 3600 branch with delay slot. It turned: 3601 bf.s L6 (slot mov.l r12,@(44,r0)) 3602 into: 3603 36042c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6) 360530: 00 09 nop 360632: 10 cb mov.l r12,@(44,r0) 3607 Therefore, branches with delay slots have to be handled 3608 differently from ones without delay slots. */ 3609 { 3610 unsigned char *buffer = 3611 (unsigned char *) (fragP->fr_fix + fragP->fr_literal); 3612 int highbyte = target_big_endian ? 0 : 1; 3613 int lowbyte = target_big_endian ? 1 : 0; 3614 int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12); 3615 3616 /* Toggle the true/false bit of the bcond. */ 3617 buffer[highbyte] ^= 0x2; 3618 3619 /* If this is a delayed branch, we may not put the bra in the 3620 slot. So we change it to a non-delayed branch, like that: 3621 b! cond slot_label; bra disp; slot_label: slot_insn 3622 ??? We should try if swapping the conditional branch and 3623 its delay-slot insn already makes the branch reach. */ 3624 3625 /* Build a relocation to six / four bytes farther on. */ 3626 subseg_change (seg, 0); 3627 fix_new (fragP, fragP->fr_fix, 2, section_symbol (seg), 3628 fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6), 3629 1, BFD_RELOC_SH_PCDISP8BY2); 3630 3631 /* Set up a jump instruction. */ 3632 buffer[highbyte + 2] = 0xa0; 3633 buffer[lowbyte + 2] = 0; 3634 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, 3635 fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2); 3636 3637 if (delay) 3638 { 3639 buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */ 3640 fragP->fr_fix += 4; 3641 } 3642 else 3643 { 3644 /* Fill in a NOP instruction. */ 3645 buffer[highbyte + 4] = 0x0; 3646 buffer[lowbyte + 4] = 0x9; 3647 3648 fragP->fr_fix += 6; 3649 } 3650 fragP->fr_var = 0; 3651 donerelax = 1; 3652 } 3653 break; 3654 3655 case C (COND_JUMP, COND32): 3656 case C (COND_JUMP_DELAY, COND32): 3657 case C (COND_JUMP, UNDEF_WORD_DISP): 3658 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): 3659 if (fragP->fr_symbol == NULL) 3660 as_bad_where (fragP->fr_file, fragP->fr_line, 3661 _("displacement overflows 8-bit field")); 3662 else if (S_IS_DEFINED (fragP->fr_symbol)) 3663 as_bad_where (fragP->fr_file, fragP->fr_line, 3664 _("displacement to defined symbol %s overflows 8-bit field"), 3665 S_GET_NAME (fragP->fr_symbol)); 3666 else 3667 as_bad_where (fragP->fr_file, fragP->fr_line, 3668 _("displacement to undefined symbol %s overflows 8-bit field "), 3669 S_GET_NAME (fragP->fr_symbol)); 3670 /* Stabilize this frag, so we don't trip an assert. */ 3671 fragP->fr_fix += fragP->fr_var; 3672 fragP->fr_var = 0; 3673 break; 3674 3675 default: 3676#ifdef HAVE_SH64 3677 shmedia_md_convert_frag (headers, seg, fragP, TRUE); 3678#else 3679 abort (); 3680#endif 3681 } 3682 3683 if (donerelax && !sh_relax) 3684 as_warn_where (fragP->fr_file, fragP->fr_line, 3685 _("overflow in branch to %s; converted into longer instruction sequence"), 3686 (fragP->fr_symbol != NULL 3687 ? S_GET_NAME (fragP->fr_symbol) 3688 : "")); 3689} 3690 3691valueT 3692md_section_align (segT seg ATTRIBUTE_UNUSED, valueT size) 3693{ 3694#ifdef OBJ_ELF 3695 return size; 3696#else /* ! OBJ_ELF */ 3697 return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1) 3698 & -(1 << bfd_get_section_alignment (stdoutput, seg))); 3699#endif /* ! OBJ_ELF */ 3700} 3701 3702/* This static variable is set by s_uacons to tell sh_cons_align that 3703 the expression does not need to be aligned. */ 3704 3705static int sh_no_align_cons = 0; 3706 3707/* This handles the unaligned space allocation pseudo-ops, such as 3708 .uaword. .uaword is just like .word, but the value does not need 3709 to be aligned. */ 3710 3711static void 3712s_uacons (int bytes) 3713{ 3714 /* Tell sh_cons_align not to align this value. */ 3715 sh_no_align_cons = 1; 3716 cons (bytes); 3717} 3718 3719/* If a .word, et. al., pseud-op is seen, warn if the value is not 3720 aligned correctly. Note that this can cause warnings to be issued 3721 when assembling initialized structured which were declared with the 3722 packed attribute. FIXME: Perhaps we should require an option to 3723 enable this warning? */ 3724 3725void 3726sh_cons_align (int nbytes) 3727{ 3728 int nalign; 3729 3730 if (sh_no_align_cons) 3731 { 3732 /* This is an unaligned pseudo-op. */ 3733 sh_no_align_cons = 0; 3734 return; 3735 } 3736 3737 nalign = 0; 3738 while ((nbytes & 1) == 0) 3739 { 3740 ++nalign; 3741 nbytes >>= 1; 3742 } 3743 3744 if (nalign == 0) 3745 return; 3746 3747 if (now_seg == absolute_section) 3748 { 3749 if ((abs_section_offset & ((1 << nalign) - 1)) != 0) 3750 as_warn (_("misaligned data")); 3751 return; 3752 } 3753 3754 frag_var (rs_align_test, 1, 1, (relax_substateT) 0, 3755 (symbolS *) NULL, (offsetT) nalign, (char *) NULL); 3756 3757 record_alignment (now_seg, nalign); 3758} 3759 3760/* When relaxing, we need to output a reloc for any .align directive 3761 that requests alignment to a four byte boundary or larger. This is 3762 also where we check for misaligned data. */ 3763 3764void 3765sh_handle_align (fragS *frag) 3766{ 3767 int bytes = frag->fr_next->fr_address - frag->fr_address - frag->fr_fix; 3768 3769 if (frag->fr_type == rs_align_code) 3770 { 3771 static const unsigned char big_nop_pattern[] = { 0x00, 0x09 }; 3772 static const unsigned char little_nop_pattern[] = { 0x09, 0x00 }; 3773 3774 char *p = frag->fr_literal + frag->fr_fix; 3775 3776 if (bytes & 1) 3777 { 3778 *p++ = 0; 3779 bytes--; 3780 frag->fr_fix += 1; 3781 } 3782 3783 if (target_big_endian) 3784 { 3785 memcpy (p, big_nop_pattern, sizeof big_nop_pattern); 3786 frag->fr_var = sizeof big_nop_pattern; 3787 } 3788 else 3789 { 3790 memcpy (p, little_nop_pattern, sizeof little_nop_pattern); 3791 frag->fr_var = sizeof little_nop_pattern; 3792 } 3793 } 3794 else if (frag->fr_type == rs_align_test) 3795 { 3796 if (bytes != 0) 3797 as_bad_where (frag->fr_file, frag->fr_line, _("misaligned data")); 3798 } 3799 3800 if (sh_relax 3801 && (frag->fr_type == rs_align 3802 || frag->fr_type == rs_align_code) 3803 && frag->fr_address + frag->fr_fix > 0 3804 && frag->fr_offset > 1 3805 && now_seg != bss_section) 3806 fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0, 3807 BFD_RELOC_SH_ALIGN); 3808} 3809 3810/* See whether the relocation should be resolved locally. */ 3811 3812static bfd_boolean 3813sh_local_pcrel (fixS *fix) 3814{ 3815 return (! sh_relax 3816 && (fix->fx_r_type == BFD_RELOC_SH_PCDISP8BY2 3817 || fix->fx_r_type == BFD_RELOC_SH_PCDISP12BY2 3818 || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2 3819 || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4 3820 || fix->fx_r_type == BFD_RELOC_8_PCREL 3821 || fix->fx_r_type == BFD_RELOC_SH_SWITCH16 3822 || fix->fx_r_type == BFD_RELOC_SH_SWITCH32)); 3823} 3824 3825/* See whether we need to force a relocation into the output file. 3826 This is used to force out switch and PC relative relocations when 3827 relaxing. */ 3828 3829int 3830sh_force_relocation (fixS *fix) 3831{ 3832 /* These relocations can't make it into a DSO, so no use forcing 3833 them for global symbols. */ 3834 if (sh_local_pcrel (fix)) 3835 return 0; 3836 3837 /* Make sure some relocations get emitted. */ 3838 if (fix->fx_r_type == BFD_RELOC_SH_LOOP_START 3839 || fix->fx_r_type == BFD_RELOC_SH_LOOP_END 3840 || fix->fx_r_type == BFD_RELOC_SH_TLS_GD_32 3841 || fix->fx_r_type == BFD_RELOC_SH_TLS_LD_32 3842 || fix->fx_r_type == BFD_RELOC_SH_TLS_IE_32 3843 || fix->fx_r_type == BFD_RELOC_SH_TLS_LDO_32 3844 || fix->fx_r_type == BFD_RELOC_SH_TLS_LE_32 3845 || generic_force_reloc (fix)) 3846 return 1; 3847 3848 if (! sh_relax) 3849 return 0; 3850 3851 return (fix->fx_pcrel 3852 || SWITCH_TABLE (fix) 3853 || fix->fx_r_type == BFD_RELOC_SH_COUNT 3854 || fix->fx_r_type == BFD_RELOC_SH_ALIGN 3855 || fix->fx_r_type == BFD_RELOC_SH_CODE 3856 || fix->fx_r_type == BFD_RELOC_SH_DATA 3857#ifdef HAVE_SH64 3858 || fix->fx_r_type == BFD_RELOC_SH_SHMEDIA_CODE 3859#endif 3860 || fix->fx_r_type == BFD_RELOC_SH_LABEL); 3861} 3862 3863#ifdef OBJ_ELF 3864bfd_boolean 3865sh_fix_adjustable (fixS *fixP) 3866{ 3867 if (fixP->fx_r_type == BFD_RELOC_32_PLT_PCREL 3868 || fixP->fx_r_type == BFD_RELOC_32_GOT_PCREL 3869 || fixP->fx_r_type == BFD_RELOC_SH_GOT20 3870 || fixP->fx_r_type == BFD_RELOC_SH_GOTPC 3871 || fixP->fx_r_type == BFD_RELOC_SH_GOTFUNCDESC 3872 || fixP->fx_r_type == BFD_RELOC_SH_GOTFUNCDESC20 3873 || fixP->fx_r_type == BFD_RELOC_SH_GOTOFFFUNCDESC 3874 || fixP->fx_r_type == BFD_RELOC_SH_GOTOFFFUNCDESC20 3875 || fixP->fx_r_type == BFD_RELOC_SH_FUNCDESC 3876 || ((fixP->fx_r_type == BFD_RELOC_32) && dont_adjust_reloc_32) 3877 || fixP->fx_r_type == BFD_RELOC_RVA) 3878 return 0; 3879 3880 /* We need the symbol name for the VTABLE entries */ 3881 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT 3882 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) 3883 return 0; 3884 3885 return 1; 3886} 3887 3888void 3889sh_elf_final_processing (void) 3890{ 3891 int val; 3892 3893 /* Set file-specific flags to indicate if this code needs 3894 a processor with the sh-dsp / sh2e ISA to execute. */ 3895#ifdef HAVE_SH64 3896 /* SH5 and above don't know about the valid_arch arch_sh* bits defined 3897 in sh-opc.h, so check SH64 mode before checking valid_arch. */ 3898 if (sh64_isa_mode != sh64_isa_unspecified) 3899 val = EF_SH5; 3900 else 3901#elif defined TARGET_SYMBIAN 3902 if (1) 3903 { 3904 extern int sh_symbian_find_elf_flags (unsigned int); 3905 3906 val = sh_symbian_find_elf_flags (valid_arch); 3907 } 3908 else 3909#endif /* HAVE_SH64 */ 3910 val = sh_find_elf_flags (valid_arch); 3911 3912 elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK; 3913 elf_elfheader (stdoutput)->e_flags |= val; 3914 3915 if (sh_fdpic) 3916 elf_elfheader (stdoutput)->e_flags |= EF_SH_FDPIC; 3917} 3918#endif 3919 3920#ifdef TE_UCLINUX 3921/* Return the target format for uClinux. */ 3922 3923const char * 3924sh_uclinux_target_format (void) 3925{ 3926 if (sh_fdpic) 3927 return (!target_big_endian ? "elf32-sh-fdpic" : "elf32-shbig-fdpic"); 3928 else 3929 return (!target_big_endian ? "elf32-shl" : "elf32-sh"); 3930} 3931#endif 3932 3933/* Apply fixup FIXP to SIZE-byte field BUF given that VAL is its 3934 assembly-time value. If we're generating a reloc for FIXP, 3935 see whether the addend should be stored in-place or whether 3936 it should be in an ELF r_addend field. */ 3937 3938static void 3939apply_full_field_fix (fixS *fixP, char *buf, bfd_vma val, int size) 3940{ 3941 reloc_howto_type *howto; 3942 3943 if (fixP->fx_addsy != NULL || fixP->fx_pcrel) 3944 { 3945 howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type); 3946 if (howto && !howto->partial_inplace) 3947 { 3948 fixP->fx_addnumber = val; 3949 return; 3950 } 3951 } 3952 md_number_to_chars (buf, val, size); 3953} 3954 3955/* Apply a fixup to the object file. */ 3956 3957void 3958md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) 3959{ 3960 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; 3961 int lowbyte = target_big_endian ? 1 : 0; 3962 int highbyte = target_big_endian ? 0 : 1; 3963 long val = (long) *valP; 3964 long max, min; 3965 int shift; 3966 3967 /* A difference between two symbols, the second of which is in the 3968 current section, is transformed in a PC-relative relocation to 3969 the other symbol. We have to adjust the relocation type here. */ 3970 if (fixP->fx_pcrel) 3971 { 3972#ifndef HAVE_SH64 3973 /* Safeguard; this must not occur for non-sh64 configurations. */ 3974 gas_assert (fixP->fx_r_type != BFD_RELOC_64); 3975#endif 3976 3977 switch (fixP->fx_r_type) 3978 { 3979 default: 3980 break; 3981 3982 case BFD_RELOC_32: 3983 fixP->fx_r_type = BFD_RELOC_32_PCREL; 3984 break; 3985 3986 /* Currently, we only support 32-bit PCREL relocations. 3987 We'd need a new reloc type to handle 16_PCREL, and 3988 8_PCREL is already taken for R_SH_SWITCH8, which 3989 apparently does something completely different than what 3990 we need. FIXME. */ 3991 case BFD_RELOC_16: 3992 bfd_set_error (bfd_error_bad_value); 3993 return; 3994 3995 case BFD_RELOC_8: 3996 bfd_set_error (bfd_error_bad_value); 3997 return; 3998 } 3999 } 4000 4001 /* The function adjust_reloc_syms won't convert a reloc against a weak 4002 symbol into a reloc against a section, but bfd_install_relocation 4003 will screw up if the symbol is defined, so we have to adjust val here 4004 to avoid the screw up later. 4005 4006 For ordinary relocs, this does not happen for ELF, since for ELF, 4007 bfd_install_relocation uses the "special function" field of the 4008 howto, and does not execute the code that needs to be undone, as long 4009 as the special function does not return bfd_reloc_continue. 4010 It can happen for GOT- and PLT-type relocs the way they are 4011 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it 4012 doesn't matter here since those relocs don't use VAL; see below. */ 4013 if (OUTPUT_FLAVOR != bfd_target_elf_flavour 4014 && fixP->fx_addsy != NULL 4015 && S_IS_WEAK (fixP->fx_addsy)) 4016 val -= S_GET_VALUE (fixP->fx_addsy); 4017 4018 if (SWITCH_TABLE (fixP)) 4019 val -= S_GET_VALUE (fixP->fx_subsy); 4020 4021 max = min = 0; 4022 shift = 0; 4023 switch (fixP->fx_r_type) 4024 { 4025 case BFD_RELOC_SH_IMM3: 4026 max = 0x7; 4027 * buf = (* buf & 0xf8) | (val & 0x7); 4028 break; 4029 case BFD_RELOC_SH_IMM3U: 4030 max = 0x7; 4031 * buf = (* buf & 0x8f) | ((val & 0x7) << 4); 4032 break; 4033 case BFD_RELOC_SH_DISP12: 4034 max = 0xfff; 4035 buf[lowbyte] = val & 0xff; 4036 buf[highbyte] |= (val >> 8) & 0x0f; 4037 break; 4038 case BFD_RELOC_SH_DISP12BY2: 4039 max = 0xfff; 4040 shift = 1; 4041 buf[lowbyte] = (val >> 1) & 0xff; 4042 buf[highbyte] |= (val >> 9) & 0x0f; 4043 break; 4044 case BFD_RELOC_SH_DISP12BY4: 4045 max = 0xfff; 4046 shift = 2; 4047 buf[lowbyte] = (val >> 2) & 0xff; 4048 buf[highbyte] |= (val >> 10) & 0x0f; 4049 break; 4050 case BFD_RELOC_SH_DISP12BY8: 4051 max = 0xfff; 4052 shift = 3; 4053 buf[lowbyte] = (val >> 3) & 0xff; 4054 buf[highbyte] |= (val >> 11) & 0x0f; 4055 break; 4056 case BFD_RELOC_SH_DISP20: 4057 if (! target_big_endian) 4058 abort(); 4059 max = 0x7ffff; 4060 min = -0x80000; 4061 buf[1] = (buf[1] & 0x0f) | ((val >> 12) & 0xf0); 4062 buf[2] = (val >> 8) & 0xff; 4063 buf[3] = val & 0xff; 4064 break; 4065 case BFD_RELOC_SH_DISP20BY8: 4066 if (!target_big_endian) 4067 abort(); 4068 max = 0x7ffff; 4069 min = -0x80000; 4070 shift = 8; 4071 buf[1] = (buf[1] & 0x0f) | ((val >> 20) & 0xf0); 4072 buf[2] = (val >> 16) & 0xff; 4073 buf[3] = (val >> 8) & 0xff; 4074 break; 4075 4076 case BFD_RELOC_SH_IMM4: 4077 max = 0xf; 4078 *buf = (*buf & 0xf0) | (val & 0xf); 4079 break; 4080 4081 case BFD_RELOC_SH_IMM4BY2: 4082 max = 0xf; 4083 shift = 1; 4084 *buf = (*buf & 0xf0) | ((val >> 1) & 0xf); 4085 break; 4086 4087 case BFD_RELOC_SH_IMM4BY4: 4088 max = 0xf; 4089 shift = 2; 4090 *buf = (*buf & 0xf0) | ((val >> 2) & 0xf); 4091 break; 4092 4093 case BFD_RELOC_SH_IMM8BY2: 4094 max = 0xff; 4095 shift = 1; 4096 *buf = val >> 1; 4097 break; 4098 4099 case BFD_RELOC_SH_IMM8BY4: 4100 max = 0xff; 4101 shift = 2; 4102 *buf = val >> 2; 4103 break; 4104 4105 case BFD_RELOC_8: 4106 case BFD_RELOC_SH_IMM8: 4107 /* Sometimes the 8 bit value is sign extended (e.g., add) and 4108 sometimes it is not (e.g., and). We permit any 8 bit value. 4109 Note that adding further restrictions may invalidate 4110 reasonable looking assembly code, such as ``and -0x1,r0''. */ 4111 max = 0xff; 4112 min = -0xff; 4113 *buf++ = val; 4114 break; 4115 4116 case BFD_RELOC_SH_PCRELIMM8BY4: 4117 /* If we are dealing with a known destination ... */ 4118 if ((fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) 4119 && (fixP->fx_subsy == NULL || S_IS_DEFINED (fixP->fx_addsy))) 4120 { 4121 /* Don't silently move the destination due to misalignment. 4122 The absolute address is the fragment base plus the offset into 4123 the fragment plus the pc relative offset to the label. */ 4124 if ((fixP->fx_frag->fr_address + fixP->fx_where + val) & 3) 4125 as_bad_where (fixP->fx_file, fixP->fx_line, 4126 _("offset to unaligned destination")); 4127 4128 /* The displacement cannot be zero or backward even if aligned. 4129 Allow -2 because val has already been adjusted somewhere. */ 4130 if (val < -2) 4131 as_bad_where (fixP->fx_file, fixP->fx_line, _("negative offset")); 4132 } 4133 4134 /* The lower two bits of the PC are cleared before the 4135 displacement is added in. We can assume that the destination 4136 is on a 4 byte boundary. If this instruction is also on a 4 4137 byte boundary, then we want 4138 (target - here) / 4 4139 and target - here is a multiple of 4. 4140 Otherwise, we are on a 2 byte boundary, and we want 4141 (target - (here - 2)) / 4 4142 and target - here is not a multiple of 4. Computing 4143 (target - (here - 2)) / 4 == (target - here + 2) / 4 4144 works for both cases, since in the first case the addition of 4145 2 will be removed by the division. target - here is in the 4146 variable val. */ 4147 val = (val + 2) / 4; 4148 if (val & ~0xff) 4149 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 4150 buf[lowbyte] = val; 4151 break; 4152 4153 case BFD_RELOC_SH_PCRELIMM8BY2: 4154 val /= 2; 4155 if (val & ~0xff) 4156 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 4157 buf[lowbyte] = val; 4158 break; 4159 4160 case BFD_RELOC_SH_PCDISP8BY2: 4161 val /= 2; 4162 if (val < -0x80 || val > 0x7f) 4163 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 4164 buf[lowbyte] = val; 4165 break; 4166 4167 case BFD_RELOC_SH_PCDISP12BY2: 4168 val /= 2; 4169 if (val < -0x800 || val > 0x7ff) 4170 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 4171 buf[lowbyte] = val & 0xff; 4172 buf[highbyte] |= (val >> 8) & 0xf; 4173 break; 4174 4175#ifndef HAVE_SH64 4176 case BFD_RELOC_64: 4177 apply_full_field_fix (fixP, buf, *valP, 8); 4178 break; 4179#endif 4180 4181 case BFD_RELOC_32: 4182 case BFD_RELOC_32_PCREL: 4183 apply_full_field_fix (fixP, buf, val, 4); 4184 break; 4185 4186 case BFD_RELOC_16: 4187 apply_full_field_fix (fixP, buf, val, 2); 4188 break; 4189 4190 case BFD_RELOC_SH_USES: 4191 /* Pass the value into sh_reloc(). */ 4192 fixP->fx_addnumber = val; 4193 break; 4194 4195 case BFD_RELOC_SH_COUNT: 4196 case BFD_RELOC_SH_ALIGN: 4197 case BFD_RELOC_SH_CODE: 4198 case BFD_RELOC_SH_DATA: 4199 case BFD_RELOC_SH_LABEL: 4200 /* Nothing to do here. */ 4201 break; 4202 4203 case BFD_RELOC_SH_LOOP_START: 4204 case BFD_RELOC_SH_LOOP_END: 4205 4206 case BFD_RELOC_VTABLE_INHERIT: 4207 case BFD_RELOC_VTABLE_ENTRY: 4208 fixP->fx_done = 0; 4209 return; 4210 4211#ifdef OBJ_ELF 4212 case BFD_RELOC_32_PLT_PCREL: 4213 /* Make the jump instruction point to the address of the operand. At 4214 runtime we merely add the offset to the actual PLT entry. */ 4215 * valP = 0xfffffffc; 4216 val = fixP->fx_offset; 4217 if (fixP->fx_subsy) 4218 val -= S_GET_VALUE (fixP->fx_subsy); 4219 apply_full_field_fix (fixP, buf, val, 4); 4220 break; 4221 4222 case BFD_RELOC_SH_GOTPC: 4223 /* This is tough to explain. We end up with this one if we have 4224 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". 4225 The goal here is to obtain the absolute address of the GOT, 4226 and it is strongly preferable from a performance point of 4227 view to avoid using a runtime relocation for this. There are 4228 cases where you have something like: 4229 4230 .long _GLOBAL_OFFSET_TABLE_+[.-.L66] 4231 4232 and here no correction would be required. Internally in the 4233 assembler we treat operands of this form as not being pcrel 4234 since the '.' is explicitly mentioned, and I wonder whether 4235 it would simplify matters to do it this way. Who knows. In 4236 earlier versions of the PIC patches, the pcrel_adjust field 4237 was used to store the correction, but since the expression is 4238 not pcrel, I felt it would be confusing to do it this way. */ 4239 * valP -= 1; 4240 apply_full_field_fix (fixP, buf, val, 4); 4241 break; 4242 4243 case BFD_RELOC_SH_TLS_GD_32: 4244 case BFD_RELOC_SH_TLS_LD_32: 4245 case BFD_RELOC_SH_TLS_IE_32: 4246 S_SET_THREAD_LOCAL (fixP->fx_addsy); 4247 /* Fallthrough */ 4248 case BFD_RELOC_32_GOT_PCREL: 4249 case BFD_RELOC_SH_GOT20: 4250 case BFD_RELOC_SH_GOTPLT32: 4251 case BFD_RELOC_SH_GOTFUNCDESC: 4252 case BFD_RELOC_SH_GOTFUNCDESC20: 4253 case BFD_RELOC_SH_GOTOFFFUNCDESC: 4254 case BFD_RELOC_SH_GOTOFFFUNCDESC20: 4255 case BFD_RELOC_SH_FUNCDESC: 4256 * valP = 0; /* Fully resolved at runtime. No addend. */ 4257 apply_full_field_fix (fixP, buf, 0, 4); 4258 break; 4259 4260 case BFD_RELOC_SH_TLS_LDO_32: 4261 case BFD_RELOC_SH_TLS_LE_32: 4262 S_SET_THREAD_LOCAL (fixP->fx_addsy); 4263 /* Fallthrough */ 4264 case BFD_RELOC_32_GOTOFF: 4265 case BFD_RELOC_SH_GOTOFF20: 4266 apply_full_field_fix (fixP, buf, val, 4); 4267 break; 4268#endif 4269 4270 default: 4271#ifdef HAVE_SH64 4272 shmedia_md_apply_fix (fixP, valP); 4273 return; 4274#else 4275 abort (); 4276#endif 4277 } 4278 4279 if (shift != 0) 4280 { 4281 if ((val & ((1 << shift) - 1)) != 0) 4282 as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset")); 4283 if (val >= 0) 4284 val >>= shift; 4285 else 4286 val = ((val >> shift) 4287 | ((long) -1 & ~ ((long) -1 >> shift))); 4288 } 4289 4290 /* Extend sign for 64-bit host. */ 4291 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000; 4292 if (max != 0 && (val < min || val > max)) 4293 as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range")); 4294 else if (max != 0) 4295 /* Stop the generic code from trying to overlow check the value as well. 4296 It may not have the correct value anyway, as we do not store val back 4297 into *valP. */ 4298 fixP->fx_no_overflow = 1; 4299 4300 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0) 4301 fixP->fx_done = 1; 4302} 4303 4304/* Called just before address relaxation. Return the length 4305 by which a fragment must grow to reach it's destination. */ 4306 4307int 4308md_estimate_size_before_relax (fragS *fragP, segT segment_type) 4309{ 4310 int what; 4311 4312 switch (fragP->fr_subtype) 4313 { 4314 default: 4315#ifdef HAVE_SH64 4316 return shmedia_md_estimate_size_before_relax (fragP, segment_type); 4317#else 4318 abort (); 4319#endif 4320 4321 4322 case C (UNCOND_JUMP, UNDEF_DISP): 4323 /* Used to be a branch to somewhere which was unknown. */ 4324 if (!fragP->fr_symbol) 4325 { 4326 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); 4327 } 4328 else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) 4329 { 4330 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); 4331 } 4332 else 4333 { 4334 fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP); 4335 } 4336 break; 4337 4338 case C (COND_JUMP, UNDEF_DISP): 4339 case C (COND_JUMP_DELAY, UNDEF_DISP): 4340 what = GET_WHAT (fragP->fr_subtype); 4341 /* Used to be a branch to somewhere which was unknown. */ 4342 if (fragP->fr_symbol 4343 && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) 4344 { 4345 /* Got a symbol and it's defined in this segment, become byte 4346 sized - maybe it will fix up. */ 4347 fragP->fr_subtype = C (what, COND8); 4348 } 4349 else if (fragP->fr_symbol) 4350 { 4351 /* Its got a segment, but its not ours, so it will always be long. */ 4352 fragP->fr_subtype = C (what, UNDEF_WORD_DISP); 4353 } 4354 else 4355 { 4356 /* We know the abs value. */ 4357 fragP->fr_subtype = C (what, COND8); 4358 } 4359 break; 4360 4361 case C (UNCOND_JUMP, UNCOND12): 4362 case C (UNCOND_JUMP, UNCOND32): 4363 case C (UNCOND_JUMP, UNDEF_WORD_DISP): 4364 case C (COND_JUMP, COND8): 4365 case C (COND_JUMP, COND12): 4366 case C (COND_JUMP, COND32): 4367 case C (COND_JUMP, UNDEF_WORD_DISP): 4368 case C (COND_JUMP_DELAY, COND8): 4369 case C (COND_JUMP_DELAY, COND12): 4370 case C (COND_JUMP_DELAY, COND32): 4371 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): 4372 /* When relaxing a section for the second time, we don't need to 4373 do anything besides return the current size. */ 4374 break; 4375 } 4376 4377 fragP->fr_var = md_relax_table[fragP->fr_subtype].rlx_length; 4378 return fragP->fr_var; 4379} 4380 4381/* Put number into target byte order. */ 4382 4383void 4384md_number_to_chars (char *ptr, valueT use, int nbytes) 4385{ 4386#ifdef HAVE_SH64 4387 /* We might need to set the contents type to data. */ 4388 sh64_flag_output (); 4389#endif 4390 4391 if (! target_big_endian) 4392 number_to_chars_littleendian (ptr, use, nbytes); 4393 else 4394 number_to_chars_bigendian (ptr, use, nbytes); 4395} 4396 4397/* This version is used in obj-coff.c eg. for the sh-hms target. */ 4398 4399long 4400md_pcrel_from (fixS *fixP) 4401{ 4402 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2; 4403} 4404 4405long 4406md_pcrel_from_section (fixS *fixP, segT sec) 4407{ 4408 if (! sh_local_pcrel (fixP) 4409 && fixP->fx_addsy != (symbolS *) NULL 4410 && (generic_force_reloc (fixP) 4411 || S_GET_SEGMENT (fixP->fx_addsy) != sec)) 4412 { 4413 /* The symbol is undefined (or is defined but not in this section, 4414 or we're not sure about it being the final definition). Let the 4415 linker figure it out. We need to adjust the subtraction of a 4416 symbol to the position of the relocated data, though. */ 4417 return fixP->fx_subsy ? fixP->fx_where + fixP->fx_frag->fr_address : 0; 4418 } 4419 4420 return md_pcrel_from (fixP); 4421} 4422 4423/* Create a reloc. */ 4424 4425arelent * 4426tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp) 4427{ 4428 arelent *rel; 4429 bfd_reloc_code_real_type r_type; 4430 4431 rel = XNEW (arelent); 4432 rel->sym_ptr_ptr = XNEW (asymbol *); 4433 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 4434 rel->address = fixp->fx_frag->fr_address + fixp->fx_where; 4435 4436 r_type = fixp->fx_r_type; 4437 4438 if (SWITCH_TABLE (fixp)) 4439 { 4440 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy); 4441 rel->addend = rel->address - S_GET_VALUE(fixp->fx_subsy); 4442 if (r_type == BFD_RELOC_16) 4443 r_type = BFD_RELOC_SH_SWITCH16; 4444 else if (r_type == BFD_RELOC_8) 4445 r_type = BFD_RELOC_8_PCREL; 4446 else if (r_type == BFD_RELOC_32) 4447 r_type = BFD_RELOC_SH_SWITCH32; 4448 else 4449 abort (); 4450 } 4451 else if (r_type == BFD_RELOC_SH_USES) 4452 rel->addend = fixp->fx_addnumber; 4453 else if (r_type == BFD_RELOC_SH_COUNT) 4454 rel->addend = fixp->fx_offset; 4455 else if (r_type == BFD_RELOC_SH_ALIGN) 4456 rel->addend = fixp->fx_offset; 4457 else if (r_type == BFD_RELOC_VTABLE_INHERIT 4458 || r_type == BFD_RELOC_VTABLE_ENTRY) 4459 rel->addend = fixp->fx_offset; 4460 else if (r_type == BFD_RELOC_SH_LOOP_START 4461 || r_type == BFD_RELOC_SH_LOOP_END) 4462 rel->addend = fixp->fx_offset; 4463 else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel) 4464 { 4465 rel->addend = 0; 4466 rel->address = rel->addend = fixp->fx_offset; 4467 } 4468#ifdef HAVE_SH64 4469 else if (shmedia_init_reloc (rel, fixp)) 4470 ; 4471#endif 4472 else 4473 rel->addend = fixp->fx_addnumber; 4474 4475 rel->howto = bfd_reloc_type_lookup (stdoutput, r_type); 4476 4477 if (rel->howto == NULL) 4478 { 4479 as_bad_where (fixp->fx_file, fixp->fx_line, 4480 _("Cannot represent relocation type %s"), 4481 bfd_get_reloc_code_name (r_type)); 4482 /* Set howto to a garbage value so that we can keep going. */ 4483 rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); 4484 gas_assert (rel->howto != NULL); 4485 } 4486#ifdef OBJ_ELF 4487 else if (rel->howto->type == R_SH_IND12W) 4488 rel->addend += fixp->fx_offset - 4; 4489#endif 4490 4491 return rel; 4492} 4493 4494#ifdef OBJ_ELF 4495inline static char * 4496sh_end_of_match (char *cont, const char *what) 4497{ 4498 int len = strlen (what); 4499 4500 if (strncasecmp (cont, what, strlen (what)) == 0 4501 && ! is_part_of_name (cont[len])) 4502 return cont + len; 4503 4504 return NULL; 4505} 4506 4507int 4508sh_parse_name (char const *name, 4509 expressionS *exprP, 4510 enum expr_mode mode, 4511 char *nextcharP) 4512{ 4513 char *next = input_line_pointer; 4514 char *next_end; 4515 int reloc_type; 4516 segT segment; 4517 4518 exprP->X_op_symbol = NULL; 4519 4520 if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0) 4521 { 4522 if (! GOT_symbol) 4523 GOT_symbol = symbol_find_or_make (name); 4524 4525 exprP->X_add_symbol = GOT_symbol; 4526 no_suffix: 4527 /* If we have an absolute symbol or a reg, then we know its 4528 value now. */ 4529 segment = S_GET_SEGMENT (exprP->X_add_symbol); 4530 if (mode != expr_defer && segment == absolute_section) 4531 { 4532 exprP->X_op = O_constant; 4533 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); 4534 exprP->X_add_symbol = NULL; 4535 } 4536 else if (mode != expr_defer && segment == reg_section) 4537 { 4538 exprP->X_op = O_register; 4539 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); 4540 exprP->X_add_symbol = NULL; 4541 } 4542 else 4543 { 4544 exprP->X_op = O_symbol; 4545 exprP->X_add_number = 0; 4546 } 4547 4548 return 1; 4549 } 4550 4551 exprP->X_add_symbol = symbol_find_or_make (name); 4552 4553 if (*nextcharP != '@') 4554 goto no_suffix; 4555 else if ((next_end = sh_end_of_match (next + 1, "GOTOFF"))) 4556 reloc_type = BFD_RELOC_32_GOTOFF; 4557 else if ((next_end = sh_end_of_match (next + 1, "GOTPLT"))) 4558 reloc_type = BFD_RELOC_SH_GOTPLT32; 4559 else if ((next_end = sh_end_of_match (next + 1, "GOT"))) 4560 reloc_type = BFD_RELOC_32_GOT_PCREL; 4561 else if ((next_end = sh_end_of_match (next + 1, "PLT"))) 4562 reloc_type = BFD_RELOC_32_PLT_PCREL; 4563 else if ((next_end = sh_end_of_match (next + 1, "TLSGD"))) 4564 reloc_type = BFD_RELOC_SH_TLS_GD_32; 4565 else if ((next_end = sh_end_of_match (next + 1, "TLSLDM"))) 4566 reloc_type = BFD_RELOC_SH_TLS_LD_32; 4567 else if ((next_end = sh_end_of_match (next + 1, "GOTTPOFF"))) 4568 reloc_type = BFD_RELOC_SH_TLS_IE_32; 4569 else if ((next_end = sh_end_of_match (next + 1, "TPOFF"))) 4570 reloc_type = BFD_RELOC_SH_TLS_LE_32; 4571 else if ((next_end = sh_end_of_match (next + 1, "DTPOFF"))) 4572 reloc_type = BFD_RELOC_SH_TLS_LDO_32; 4573 else if ((next_end = sh_end_of_match (next + 1, "PCREL"))) 4574 reloc_type = BFD_RELOC_32_PCREL; 4575 else if ((next_end = sh_end_of_match (next + 1, "GOTFUNCDESC"))) 4576 reloc_type = BFD_RELOC_SH_GOTFUNCDESC; 4577 else if ((next_end = sh_end_of_match (next + 1, "GOTOFFFUNCDESC"))) 4578 reloc_type = BFD_RELOC_SH_GOTOFFFUNCDESC; 4579 else if ((next_end = sh_end_of_match (next + 1, "FUNCDESC"))) 4580 reloc_type = BFD_RELOC_SH_FUNCDESC; 4581 else 4582 goto no_suffix; 4583 4584 *input_line_pointer = *nextcharP; 4585 input_line_pointer = next_end; 4586 *nextcharP = *input_line_pointer; 4587 *input_line_pointer = '\0'; 4588 4589 exprP->X_op = O_PIC_reloc; 4590 exprP->X_add_number = 0; 4591 exprP->X_md = reloc_type; 4592 4593 return 1; 4594} 4595 4596void 4597sh_cfi_frame_initial_instructions (void) 4598{ 4599 cfi_add_CFA_def_cfa (15, 0); 4600} 4601 4602int 4603sh_regname_to_dw2regnum (char *regname) 4604{ 4605 unsigned int regnum = -1; 4606 unsigned int i; 4607 const char *p; 4608 char *q; 4609 static struct { const char *name; int dw2regnum; } regnames[] = 4610 { 4611 { "pr", 17 }, { "t", 18 }, { "gbr", 19 }, { "mach", 20 }, 4612 { "macl", 21 }, { "fpul", 23 } 4613 }; 4614 4615 for (i = 0; i < ARRAY_SIZE (regnames); ++i) 4616 if (strcmp (regnames[i].name, regname) == 0) 4617 return regnames[i].dw2regnum; 4618 4619 if (regname[0] == 'r') 4620 { 4621 p = regname + 1; 4622 regnum = strtoul (p, &q, 10); 4623 if (p == q || *q || regnum >= 16) 4624 return -1; 4625 } 4626 else if (regname[0] == 'f' && regname[1] == 'r') 4627 { 4628 p = regname + 2; 4629 regnum = strtoul (p, &q, 10); 4630 if (p == q || *q || regnum >= 16) 4631 return -1; 4632 regnum += 25; 4633 } 4634 else if (regname[0] == 'x' && regname[1] == 'd') 4635 { 4636 p = regname + 2; 4637 regnum = strtoul (p, &q, 10); 4638 if (p == q || *q || regnum >= 8) 4639 return -1; 4640 regnum += 87; 4641 } 4642 return regnum; 4643} 4644#endif /* OBJ_ELF */ 4645