1// Copyright 2017 The Fuchsia Authors. All rights reserved.
2// Use of this source code is governed by a BSD-style license that can be
3// found in the LICENSE file.
4
5#pragma once
6
7// Transfer Request Block
8typedef volatile struct {
9    uint32_t ptr_low;
10    uint32_t ptr_high;
11    uint32_t status;
12    uint32_t control;
13} __PACKED dwc3_trb_t;
14
15// TRB status fields
16#define TRB_BUFSIZ_START    0           // Buffer Size
17#define TRB_BUFSIZ_BITS     24
18#define TRB_BUFSIZ(n)       (((n) & 0xffffff) << 0)
19#define TRB_PCM1_START      24          // Packet Count M1
20#define TRB_PCM1_BITS       2
21#define TRB_SPR             (1 << 26)   // Short Packet Received
22#define TRB_TRBSTS_START    28          // TRB Status
23#define TRB_TRBSTS_BITS     4
24
25// TRB control fields
26#define TRB_HWO                 (1 << 0)   // Hardware Owner of Descriptor
27#define TRB_LST                 (1 << 1)   // Last TRB
28#define TRB_CHN                 (1 << 2)   // Chain Buffers
29#define TRB_CSP                 (1 << 3)   // Continue on Short Packet
30#define TRB_TRBCTL_START        4
31#define TRB_TRBCTL_BITS         5
32#define TRB_TRBCTL(c)           ((c) & (((1 << TRB_TRBCTL_BITS) - 1) << TRB_TRBCTL_START))
33#define TRB_TRBCTL_NORMAL       (1 << TRB_TRBCTL_START)
34#define TRB_TRBCTL_SETUP        (2 << TRB_TRBCTL_START)
35#define TRB_TRBCTL_STATUS_2     (3 << TRB_TRBCTL_START)
36#define TRB_TRBCTL_STATUS_3     (4 << TRB_TRBCTL_START)
37#define TRB_TRBCTL_CONTROL_DATA (5 << TRB_TRBCTL_START)
38#define TRB_TRBCTL_ISOCH_FIRST  (6 << TRB_TRBCTL_START)
39#define TRB_TRBCTL_ISOCH        (7 << TRB_TRBCTL_START)
40#define TRB_TRBCTL_LINK         (8 << TRB_TRBCTL_START)
41#define TRB_ISP                 (1 << 10)  // Interrupt on Short Packet
42#define TRB_IMI                 (1 << 10)  // Interrupt on Missed ISOC
43#define TRB_IOC                 (1 << 11)  // Interrupt on Complete
44#define TRB_STREAM_ID_START     14          // Stream ID
45#define TRB_STREAM_ID_BITS      16
46#define TRB_SOF_NUM_START       14          // SOF Number
47#define TRB_SOF_NUM_BITS        16
48
49// DEPEVT (endpoint specific)
50#define DEPEVT_PARAMS_START         16          // Event Parameters
51#define DEPEVT_PARAMS_BITS          16
52#define DEPEVT_STATUS_START         12          // Event Status
53#define DEPEVT_STATUS_BITS          4
54#define DEPEVT_TYPE_START           6           // Event Type
55#define DEPEVT_TYPE_BITS            4
56#define DEPEVT_PHYS_EP_START        1
57#define DEPEVT_PHYS_EP_BITS         5
58#define DEPEVT_NON_EP               (1 << 0)    // Event is not endpoint specific
59
60#define DEPEVT_PARAMS(e)            (((e) >> DEPEVT_PARAMS_START) & ((1 << DEPEVT_PARAMS_BITS) - 1))
61#define DEPEVT_STATUS(e)            (((e) >> DEPEVT_STATUS_START) & ((1 << DEPEVT_STATUS_BITS) - 1))
62#define DEPEVT_TYPE(e)              (((e) >> DEPEVT_TYPE_START) & ((1 << DEPEVT_TYPE_BITS) - 1))
63#define DEPEVT_PHYS_EP(e)           (((e) >> DEPEVT_PHYS_EP_START) & \
64                                     ((1 << DEPEVT_PHYS_EP_BITS) - 1))
65
66// event parameters for DEPEVT_CMD_CMPLT
67#define DEPEVT_CMD_CMPLT_CMD_TYPE_START     24
68#define DEPEVT_CMD_CMPLT_CMD_TYPE_BITS      4
69#define DEPEVT_CMD_CMPLT_CMD_TYPE(e)        (((e) >> DEPEVT_CMD_CMPLT_CMD_TYPE_START) & \
70                                             ((1 << DEPEVT_CMD_CMPLT_CMD_TYPE_BITS) - 1))
71#define DEPEVT_CMD_CMPLT_RSRC_ID_START      16
72#define DEPEVT_CMD_CMPLT_RSRC_ID_BITS       7
73#define DEPEVT_CMD_CMPLT_RSRC_ID(e)         (((e) >> DEPEVT_CMD_CMPLT_RSRC_ID_START) & \
74                                             ((1 << DEPEVT_CMD_CMPLT_RSRC_ID_BITS) - 1))
75
76// event parameters for DEPEVT_XFER_NOT_READY
77#define DEPEVT_XFER_NOT_READY_REASON        (1 << 15)
78#define DEPEVT_XFER_NOT_READY_STAGE_START   12
79#define DEPEVT_XFER_NOT_READY_STAGE_BITS    2
80#define DEPEVT_XFER_NOT_READY_STAGE(e)      (((e) >> DEPEVT_XFER_NOT_READY_STAGE_START) & \
81                                             ((1 << DEPEVT_XFER_NOT_READY_STAGE_BITS) - 1))
82#define DEPEVT_XFER_NOT_READY_STAGE_DATA    1
83#define DEPEVT_XFER_NOT_READY_STAGE_STATUS  2
84
85
86// DEPEVT event types
87#define DEPEVT_XFER_COMPLETE        1
88#define DEPEVT_XFER_IN_PROGRESS     2
89#define DEPEVT_XFER_NOT_READY       3
90#define DEPEVT_STREAM_EVT           6
91#define DEPEVT_CMD_CMPLT            7
92
93// DEVT (device specific)
94#define DEVT_INFO_START             16          // Event Information Bits
95#define DEVT_INFO_BITS              16
96#define DEVT_TYPE_START             8           // Event type
97#define DEVT_TYPE_BITS              7
98#define DEVT_NON_EP                 (1 << 0)    // Event is not endpoint specific
99
100#define DEVT_INFO(e)                (((e) >> DEVT_INFO_START) & ((1 << DEVT_INFO_BITS) - 1))
101#define DEVT_TYPE(e)                (((e) >> DEVT_TYPE_START) & ((1 << DEVT_TYPE_BITS) - 1))
102
103// DEVT event types
104#define DEVT_DISCONNECT             0
105#define DEVT_USB_RESET              1
106#define DEVT_CONNECTION_DONE        2
107#define DEVT_LINK_STATE_CHANGE      3
108#define DEVT_REMOTE_WAKEUP          4
109#define DEVT_HIBERNATE_REQUEST      5
110#define DEVT_SUSPEND_ENTRY          6
111#define DEVT_SOF                    7
112#define DEVT_ERRATIC_ERROR          9
113#define DEVT_COMMAND_COMPLETE       10
114#define DEVT_EVENT_BUF_OVERFLOW     11
115#define DEVT_VENDOR_TEST_LMP        12
116#define DEVT_STOPPED_DISCONNECT     13
117#define DEVT_L1_RESUME_DETECT       14
118#define DEVT_LDM_RESPONSE           15
119
120// for DEVT_LINK_STATE_CHANGE
121#define DEVT_LINK_STATE_CHANGE_SS       (1 << 4)    // Set if link is super speed
122#define DEVT_LINK_STATE_CHANGE_STATE(s) ((s) & 0xf) // Same as DSTS state
123